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title.fm.(1.4)
January 28, 2003 - Preliminary

Datasheet

Preliminary

PowerPC

750CXe RISC Microprocessor

750cxe_TOC.fm.(1.4)
January 15, 2003

Page i of 36

Table of Contents

List of Tables ................................................................................................................. iii

List of Figures ................................................................................................................ v

1. General Information .................................................................................................... 1

1.1 Features ........................................................................................................................................... 1
1.2 Special Design Level Considerations/Features ........................................................................... 3
1.3 Ordering Information ...................................................................................................................... 3
1.4 Processor Version Register (PVR) ................................................................................................ 4

2. Overview ...................................................................................................................... 5

2.1 PowerPC 750CXe Block Diagram .................................................................................................. 5

3. General Parameters .................................................................................................... 6

4. Electrical and Thermal Characteristics ..................................................................... 7

4.1 DC Electrical Characteristics ......................................................................................................... 7
4.2 AC Electrical Characteristics ....................................................................................................... 10

4.2.1 Clock AC Specifications ........................................................................................................ 10

4.3 Spread Spectrum Clock Generator (SSCG) ................................................................................ 11
4.4 60x Bus Input AC Specifications ................................................................................................. 12
4.5 60x Bus Output AC Specifications .............................................................................................. 13

4.5.1 IEEE 1149.1 AC Timing Specifications ................................................................................. 16

5. PowerPC 750CXe Dimension and Physical Signal Assignments ........................ 18

6. System Design Information ..................................................................................... 26

6.1 PLL Configuration ......................................................................................................................... 26
6.2 PLL Power Supply Filtering ......................................................................................................... 27
6.3 Decoupling Recommendations ................................................................................................... 27
6.4 Connection Recommendations ................................................................................................... 28
6.5 Output Buffer DC Impedance ....................................................................................................... 28

6.5.1 Input-Output Usage ............................................................................................................... 29

6.6 Thermal Management Information .............................................................................................. 32

6.6.1 Thermal Assist Unit ............................................................................................................... 32
6.6.2 Heat Sink Considerations ...................................................................................................... 32
6.6.3 Internal Package Conduction Resistance .............................................................................. 33

6.7 Operational and Design Considerations ..................................................................................... 33

6.7.1 Level Protection ..................................................................................................................... 33
6.7.2 64- or 32-Bit Data Bus Mode ................................................................................................. 34
6.7.3 60x Bus Operation ................................................................................................................. 34
6.7.4 DBWO/L2_TSTCLK ............................................................................................................... 34
6.7.5 CHKSTP_OUT/CLKOUT ....................................................................................................... 34

Datasheet

Preliminary

PowerPC

750CXe RISC Microprocessor

750cxe_LOT.fm.(1.4)
January 15, 2003

List of Tables

Page iii of 36

List of Tables

Table 1-1. Process Version Register (PVR) ................................................................................................... 4

Table 3-1. General Parameters ...................................................................................................................... 6

Table 4-1. Absolute Maximum Ratings ........................................................................................................... 7

Table 4-2. Recommended Operating Conditions ........................................................................................... 7

Table 4-3. Package Thermal Characteristics ................................................................................................. 8

Table 4-4. DC Electrical Specifications .......................................................................................................... 8

Table 4-5. Power Consumption ...................................................................................................................... 9

Table 4-6. Clock AC Timing Specifications

1,6 ....................................................................................................................... 10

Table 4-7. 60x Bus Input Timing Specifications

1,6 .............................................................................................................. 12

Table 4-8. 60x Bus Output AC Timing Specifications

1,4,6 ................................................................................................ 13

Table 4-9. JTAG AC Timing Specifications (Independent of SYSCLK) ........................................................ 16

Table 5-1. Signal Listing for the 256 PBGA Package ................................................................................... 22

Table 5-2. PPC750 Signals Not Supported in the 750CXe .......................................................................... 23

Table 5-3. Signal Locations .......................................................................................................................... 24

Table 5-4. Voltage and Ground Assignments ............................................................................................... 25

Table 6-1. PowerPC 750CXe Microprocessor PLL Configuration ................................................................ 26

Table 6-2. Driver Impedance Characteristics ............................................................................................... 29

Table 6-3. Input-Output Usage ..................................................................................................................... 30

Электронный компонент: 750CXe

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