Document Outline

• Features
• description
• Pin Functions for Devices in the PQ Package
• Pin Functions for the TMS320LC57 in the PBK Package
• Pin Functions for Devices in the PZ Package
• Pin Functions for the TMS320C52, TMS320LC52 in the PJ Package
• Pin Functions for the TMS320C57S, TMS320LC57S in the PGE Package
• architecture
• functional block diagram
  • 32-bit ALU/accumulator
  • scaling shifters
  • parallel logic unit
  • 16-bit parallel multiplier
  • auxiliary registers and auxiliary-register arithmetic unit (ARAU)
• memory
• interrupts and subroutines
• power-down modes
• bus-keeper circuitry (TMS320LC56/�C57S/�LC57)
• external interface
  • external direct-memory access (DMA) capability
  • host port interface (HPI) (TMS320C57S, TMS320LC57, TMS320LC57S only)
  • serial ports
• software wait-state generators
• timer
• IEEE 1149.1 boundary scan interface
• on-chip analysis block
• multiprocessing
• instruction set
  • addressing modes
  • repeat feature
  • instruction set summary
  • instruction set summary (continued)
• development support
  • Software Development Tools:
  • Hardware Development Tools:
  • device and development support tool nomenclature
  • TMX
  • TMP
  • TMS
  • TMDX
  • TMDS
• documentation support
• absolute maximum ratings over operating ambient-air temperature range (unless otherwise noted) (� 320C5x only)�
• recommended operating conditions (�320C5x only)
• electrical characteristics over recommended ranges of supply voltage and operating ambient-air temperature ( unless otherwise noted) (� 320C5x only)
• absolute maximum ratings over specified temperature range (unless otherwise noted) (�320LC5x only)�
• recommended operating conditions (�320LC5x only)
• electrical characteristics over recommended ranges of supply voltage and operating free-air temperature ( unless otherwise noted) (� 320LC5x only)
• PARAMETER MEASUREMENT INFORMATION
• signal transition levels
• timing parameter symbology
• CLOCK CHARACTERISTICS AND TIMING
• internal divide-by-two clock option with external crystal
• recommended operating conditions for internal divide-by-two clock option
• external divide-by-two clock option
• switching characteristics over recommended operating conditions [ H = 0.5 tc(CO)] (�320C5x only) (see Figure 13)
• switching characteristics over recommended operating conditions [ H = 0.5 tc(CO)] (�320LC5x only) (see Figure 13)
• PLL clock generator option
• switching characteristics over recommended operating conditions [H = 0.5 tc(CO)] (�320C5x only) (see Figure 14)
• switching characteristics over recommended operating conditions [ H = 0.5 tc(CO)] (�320C5x only) (see Figure 14)
• MEMORY AND PARALLEL I/O INTERFACE READ
• switching characteristics over recommended operating conditions [H = 0.5tc(CO) (�320C5x only) (see Figure 15)
• switching characteristics over recommended operating conditions [H = 0.5 tc(CO)] ('320LC5x only) (see figure 15)
• timing requirements over recommended ranges of supply voltage and operating ambient-air temperature [H=0.5tc(CO)] ('320C5x only) (see Figure 15)
• timing requirements over recommended ranges of supply voltage and operating ambient-air temperature [H=0.5tc(CO)] ('320C5x only) (see Figure 15)
• MEMORY AND PARALLEL I/O INTERFACE WRITE
• switching characteristics over recommended operating conditions [H = 0.5tc(CO)] ('320C5x only) (see Figure 15)
• switching characteristics over recommended operating conditions [H =0.5tc(CO)] ('320C5x only) (see Figure 15)
• READY TIMING FOR EXTERNALLY-GENERATED WAIT STATES
• tining requirements over recommended ranges of supply voltage and operating ambient-air temperature (see Note 5) See Figure 18)
• RESET, INTERRUPT, AND BIO
• timing requirements over recommended ranges of supply voltage and operating ambient-air temperature [H=0.5tc(CO)] (see Figure 19)
• INSTRUCTION ACQUISITION (IAQ), INTERRUPT ACKNOWLEDGE (IACK), EXTERNAL FLAG ( XF), AND TOUT ( SEE NOTE 6)
• switching characteristics over recommended operating conditions [H=0.5tc(CO)] (see Figure 20)
• EXTERNAL DMA
• switching characteristics over recommended operating conditions [H = 0.5tc(CO)] (see Note 7) (see Figure 21)
• SERIAL-PORT RECEIVE TIMING
• timing requirements over recommended ranges of supply voltage and operating ambient-air temperature [H=0.5tc(CO)] (see Figure 22)
• SERIAL-PORT TRANSMIT TIMING, EXTERNAL CLOCKS, AND EXTERNAL FRAMES
• switching characteristics over recommended operating conditions (see Note 8) (see Fihure 23)
• timing requirements over recommended ranges of supply voltage and operating ambient-air temperature [H=0.5tc(CO)] (see Note 8) (see Fihure 23)
• SERIAL-PORT TRANSMIT TIMING, INTERNAL CLOCKS, AND INTERNAL FRAMES ( SEE NOTE 8)
• switching characteristics over recommended operating conditions [H = 0.5tc(CO)] (see Figure 24)
• SERIAL-PORT RECEIVE TIMING IN TDM MODE
• timing requirements over recommended ranges of supply voltage and operating ambient-air temperature [H=0.5tc(CO)] (see Figure 25)
• SERIAL-PORT TRANSMIT TIMING IN TDM MODE
• switching characteristics over recommended operating conditions [H = 0.5tc(CO)] (see Figure 26)
• timing requirements over recommended ranges of supply voltage and operating ambient-air temperature [H=0.5tc(CO)] (see Figure 26)
• BUFFERED SERIAL-PORT RECEIVE TIMING
• timing requirements over recommended ranges of supply voltage and operating ambient-air temperature [H=0.5tc(CO)] (see Figure 27)
• BUFFERED SERIAL-PORT TRANSMIT TIMING OF EXTERNAL FRAMES (SEE NOTES 9 AND 10)
• switching characteristics over recommended operating conditions (see Figure 28)
• timing requirements over recommended operating conditions (see Figure 28)
• BUFFERED SERIAL-PORT TRANSMIT TIMING OF INTERNAL FRAME AND INTERNAL CLOCK ( SEE NOTES 9 AND 10)
• switching characteristics over recommended operating conditions [H = 0.5tc(CO)] (see Figure 29)
• HOST PORT INTERFACE (TMS320C57S, TMS320LC57 ONLY)
• switching characteristics over recommended operating conditions [ H = 0.5tc(CO)] (see Notes 11 and 12) (see Figure 30 through Figure 33)
• timing requirements over recommended operating conditions [H =0.5tc(CO)] (See Note 11) (see Figure 30 through Figure 33)
• MECHANICAL DATA
  • PQ(S-PQFP-G132) PLASTIC QUAD FLATPACK
  • PBK(S-PQFP-G128) PLSTIC QUAD FLATPACK
  • PJ (R-PQFP-G100) PLASTIC QUAD FLATPACK
  • PZ (S-PQFP-G100) PLASTIC QUAD FLATPACK
  • PGE (S-PQFP-G144) PLASTIC QUAD FLATPACK