SN74AUC1G86
SINGLE 2 INPUT EXCLUSIVE OR GATE
SCES389G - MARCH 2002 - REVISED FEBRUARY 2004
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
D
Available in the Texas Instruments
NanoStar
and NanoFree
Packages
D
Optimized for 1.8-V Operation and Is 3.6-V
I/O Tolerant to Support Mixed-Mode Signal
Operation
D
I
off
Supports Partial-Power-Down Mode
Operation
D
Sub 1-V Operable
D
Max t
pd
of 2.5 ns at 1.8 V
D
Low Power Consumption, 10-
A Max I
CC
D
8-mA Output Drive at 1.8 V
D
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
D
ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)
description/ordering information
This single 2-input exclusive- OR gate is operational at 0.8-V to 2.7-V V
CC
, but is designed specifically for 1.65-V
to 1.95-V V
CC
operation.
The SN74AUC1G86 performs the Boolean function Y = A
B or Y = AB + AB in positive logic.
A common application is as a true/complement element. If the input is low, the other input is reproduced in true
form at the output. If the input is high, the signal on the other input is reproduced inverted at the output.
NanoStar
and NanoFree
package technology is a major breakthrough in IC packaging concepts, using the
die as the package.
This device is fully specified for partial-power-down applications using I
off
. The I
off
circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
ORDERING INFORMATION
TA
PACKAGE
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
NanoStar
WCSP (DSBGA) - YEA
Tape and reel
SN74AUC1G86YEAR
_ _ _UH_
-40
C to 85
C
NanoFree
WCSP (DSBGA) - YZA (Pb-free)
Tape and reel
SN74AUC1G86YZAR
_ _ _UH_
SOT (SOT-23) - DBV
Tape and reel
SN74AUC1G86DBVR
U86_
SOT (SC-70) - DCK
Tape and reel
SN74AUC1G86DCKR
UH_
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
DBV/DCK: The actual top-side marking has one additional character that designates the assembly/test site.
YEA/YZA: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one
following character to designate the assembly/test site.
Copyright
2004, Texas Instruments Incorporated
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
NanoStar and NanoFree are trademarks of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
DBV OR DCK PACKAGE
(TOP VIEW)
1
2
3
5
4
A
B
GND
V
CC
Y
3
2
1
4
5
GND
B
A
Y
V
CC
YEA OR YZA PACKAGE
(BOTTOM VIEW)
SN74AUC1G86
SINGLE 2 INPUT EXCLUSIVE OR GATE
SCES389G - MARCH 2002 - REVISED FEBRUARY 2004
2
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
FUNCTION TABLE
INPUTS
OUTPUT
A
B
OUTPUT
Y
L
L
L
L
H
H
H
L
H
H
H
L
exclusive-OR logic
An exclusive-OR gate has many applications, some of which can be represented better by alternative
logic symbols.
=1
EXCLUSIVE OR
These are five equivalent exclusive-OR symbols valid for an SN74AUC1G86 gate in positive logic; negation may be shown at any two ports.
=
2k
2k + 1
LOGIC-IDENTITY ELEMENT
EVEN-PARITY ELEMENT
ODD-PARITY ELEMENT
The output is active (low) if
all inputs stand at the same
logic level (i.e., A = B).
The output is active (low) if
an even number of inputs
(i.e., 0 or 2) are active.
The output is active (high) if
an odd number of inputs
(i.e., only 1 of the 2) are
active.
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
CC
-0.5 V to 3.6 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range, V
I
(see Note 1)
-0.5 V to 3.6 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage range applied to any output in the high-impedance or power-off state, V
O
(see Note 1)
-0.5 V to 3.6 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output voltage range, V
O
(see Note 1)
-0.5 V to V
CC
+ 0.5 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input clamp current, I
IK
(V
I
< 0)
-50 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output clamp current, I
OK
(V
O
< 0)
-50 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous output current, I
O
20 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous current through V
CC
or GND
100 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package thermal impedance,
JA
(see Note 2): DBV package
206
C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DCK package
252
C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
YEA/YZA package
154
C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, T
stg
-65
C to 150
C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES:
1. The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
SN74AUC1G86
SINGLE 2 INPUT EXCLUSIVE OR GATE
SCES389G - MARCH 2002 - REVISED FEBRUARY 2004
3
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
recommended operating conditions (see Note 3)
MIN
MAX
UNIT
VCC
Supply voltage
0.8
2.7
V
VCC = 0.8 V
VCC
VIH
High-level input voltage
VCC = 1.1 V to 1.95 V
0.65
VCC
V
VIH
High-level input voltage
VCC = 2.3 V to 2.7 V
1.7
V
VCC = 0.8 V
0
VIL
Low-level input voltage
VCC = 1.1 V to 1.95 V
0.35
VCC
V
VIL
Low-level input voltage
VCC = 2.3 V to 2.7 V
0.7
V
VI
Input voltage
0
3.6
V
VO
Output voltage
0
VCC
V
VCC = 0.8 V
-0.7
VCC = 1.1 V
-3
IOH
High-level output current
VCC = 1.4 V
-5
mA
IOH
High-level output current
VCC = 1.65 V
-8
mA
VCC = 2.3 V
-9
VCC = 0.8 V
0.7
VCC = 1.1 V
3
IOL
Low-level output current
VCC = 1.4 V
5
mA
IOL
Low-level output current
VCC = 1.65 V
8
mA
VCC = 2.3 V
9
t/
v
Input transition rise or fall rate
20
ns/V
TA
Operating free-air temperature
-40
85
C
NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
VCC
MIN
TYP
MAX
UNIT
IOH = -100
A
0.8 V to 2.7 V
VCC-0.1
IOH = -0.7 mA
0.8 V
0.55
VOH
IOH = -3 mA
1.1 V
0.8
V
VOH
IOH = -5 mA
1.4 V
1
V
IOH = -8 mA
1.65 V
1.2
IOH = -9 mA
2.3 V
1.8
IOL = 100
A
0.8 V to 2.7 V
0.2
IOL = 0.7 mA
0.8 V
0.25
VOL
IOL = 3 mA
1.1 V
0.3
V
VOL
IOL = 5 mA
1.4 V
0.4
V
IOL = 8 mA
1.65 V
0.45
IOL = 9 mA
2.3 V
0.6
II
A or B input
VI = VCC or GND
0 to 2.7 V
5
A
Ioff
VI or VO = 2.7 V
0
10
A
ICC
VI = VCC or GND,
IO = 0
0.8 V to 2.7 V
10
A
Ci
VI = VCC or GND
2.5 V
2.5
pF
All typical values are at TA = 25
C.
SN74AUC1G86
SINGLE 2 INPUT EXCLUSIVE OR GATE
SCES389G - MARCH 2002 - REVISED FEBRUARY 2004
4
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
switching characteristics over recommended operating free-air temperature range, C
L
= 15 pF
(unless otherwise noted) (see Figure 1)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
VCC = 0.8 V
VCC = 1.2 V
0.1 V
VCC = 1.5 V
0.1 V
VCC = 1.8 V
0.15 V
VCC = 2.5 V
0.2 V
UNIT
PARAMETER
(INPUT)
(OUTPUT)
TYP
MIN
MAX
MIN
MAX
MIN
TYP
MAX
MIN
MAX
UNIT
tpd
A
Y
5.5
0.8
3.8
0.5
2.6
0.4
1
1.7
0.3
1.3
ns
tpd
B
Y
5
0.8
3.8
0.5
2.6
0.4
1
1.7
0.3
1.2
ns
switching characteristics over recommended operating free-air temperature range, C
L
= 30 pF
(unless otherwise noted) (see Figure 1)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
VCC = 1.8 V
0.15 V
VCC = 2.5 V
0.2 V
UNIT
PARAMETER
(INPUT)
(OUTPUT)
MIN
TYP
MAX
MIN
MAX
UNIT
tpd
A
Y
0.8
1.5
2.6
0.7
2
ns
tpd
B
Y
0.8
1.5
2.6
0.7
2
ns
operating characteristics, T
A
= 25
C
PARAMETER
TEST
VCC = 0.8 V VCC = 1.2 V VCC = 1.5 V VCC = 1.8 V VCC = 2.5 V
UNIT
PARAMETER
TEST
CONDITIONS
TYP
TYP
TYP
TYP
TYP
UNIT
Cpd
Power dissipation
capacitance
f = 10 MHz
16
16
16.5
17
18.5
pF
SN74AUC1G86
SINGLE 2 INPUT EXCLUSIVE OR GATE
SCES389G - MARCH 2002 - REVISED FEBRUARY 2004
5
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
VCC/2
th
tsu
From Output
Under Test
CL
(see Note A)
LOAD CIRCUIT
S1
2
VCC
Open
GND
RL
RL
Data Input
Timing Input
VCC
0 V
VCC
0 V
0 V
tw
Input
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
VOLTAGE WAVEFORMS
PULSE DURATION
tPLH
tPHL
tPHL
tPLH
VOH
VOH
VOL
VOL
VCC
0 V
Input
Output
Waveform 1
S1 at 2
VCC
(see Note B)
Output
Waveform 2
S1 at GND
(see Note B)
VOL
VOH
tPZL
tPZH
tPLZ
tPHZ
VCC
0 V
VOL + V
VOH - V
0 V
VCC
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
Output
Output
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
Open
2
VCC
GND
TEST
S1
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR
10 MHz, ZO = 50
, slew rate
1 V/ns.
D. The outputs are measured one at a time, with one transition per measurement.
E. tPLZ and tPHZ are the same as tdis.
F. tPZL and tPZH are the same as ten.
G. tPLH and tPHL are the same as tpd.
H. All parameters and waveforms are not applicable to all devices.
Output
Control
VCC/2
VCC/2
VCC/2
VCC/2
VCC/2
VCC/2
VCC/2
VCC/2
VCC/2
VCC/2
VCC/2
VCC/2
VCC
VCC/2
VCC/2
0.8 V
1.2 V
0.1 V
1.5 V
0.1 V
1.8 V
0.15 V
2.5 V
0.2 V
1.8 V
0.15 V
2.5 V
0.2 V
2 k
2 k
2 k
2 k
2 k
1 k
500
VCC
RL
0.1 V
0.1 V
0.1 V
0.15 V
0.15 V
0.15 V
0.15 V
V
CL
15 pF
15 pF
15 pF
15 pF
15 pF
30 pF
30 pF
Figure 1. Load Circuit and Voltage Waveforms
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