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Электронный компонент: CD74AC280

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1
Data sheet acquired from Harris Semiconductor
SCHS250
Features
Buffered Inputs
Typical Propagation Delay
- 10ns at V
CC
= 5V, T
A
= 25
o
C, C
L
= 50pF
Exceeds 2kV ESD Protection MIL-STD-883, Method
3015
SCR-Latchup-Resistant CMOS Process and Circuit
Design
Speed of Bipolar FASTTM/AS/S with Significantly
Reduced Power Consumption
Balanced Propagation Delays
AC Types Feature 1.5V to 5.5V Operation and
Balanced Noise Immunity at 30% of the Supply
24mA Output Drive Current
- Fanout to 15 FASTTM ICs
- Drives 50
Transmission Lines
Pinout
CD74AC280, CD74ACT280
(PDIP, SOIC)
TOP VIEW
Description
The CD74AC280 and CD74ACT280 9-bit odd/even parity
generator/checkers that utilize the Harris Advanced CMOS
Logic technology. Bothe even and odd parity outputs are
available for checking or generating parity for words up to
nine bits long. Even parity is indicated (
Eoutput is HIGH)
when an even number of data inputs is HIGH. Odd parity is
indicated (
O output is HIGH) when an odd number of data
inputs is HIGH. Parity checking for words larger than nine
bits can be accomplished by tying the
E output to any input
of an additional AC/ACT280 parity checker.
Functional Diagram
I6
I7
NC
I8
E
O
GND
V
CC
I5
I4
I3
I2
I1
I0
1
2
3
4
5
6
7
14
13
12
11
10
9
8
Ordering Information
PART
NUMBER
TEMP.
RANGE (
o
C)
PACKAGE
PKG.
NO.
CD74AC280E
0 to 70
o
C, -40 to 85,
-55 to 125
14 Ld PDIP
E14.3
CD74ACT280E
0 to 70
o
C, -40 to 85,
-55 to 125
14 Ld PDIP
E14.3
CD74AC280M
0 to 70
o
C, -40 to 85,
-55 to 125
14 Ld SOIC
M14.15
CD74ACT280M
0 to 70
o
C, -40 to 85,
-55 to 125
14 Ld SOIC
M14.15
NOTES:
1. When ordering, use the entire part number. Add the suffix 96 to
obtain the variant in the tape and reel.
2. Wafer and die for this part number is available which meets all elec-
trical specifications. Please contact your local sales office or Harris
customer service for ordering information.
8
9
10
11
13
2
1
12
5
6
ODD
EVEN
I0
I1
I2
I3
I5
I6
I7
I4
4
I8
GND = 7
V
CC
= 14
NC = 3
August 1998
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
FASTTM is a Trademark of Fairchild Semiconductor.
Copyright
Harris Corporation 1998
CD74AC280,
CD74ACT280
9-Bit Odd/Even Parity Generator/Checker
File Number
1957.1
2
Absolute Maximum Ratings
Thermal Information
DC Supply Voltage, V
CC
. . . . . . . . . . . . . . . . . . . . . . . . -0.5V to 6V
DC Input Diode Current, I
IK
For V
I
< -0.5V or V
I
> V
CC
+ 0.5V
. . . . . . . . . . . . . . . . . . . . . .
20mA
DC Output Diode Current, I
OK
For V
O
< -0.5V or V
O
> V
CC
+ 0.5V
. . . . . . . . . . . . . . . . . . . .
50mA
DC Output Source or Sink Current per Output Pin, I
O
For V
O
> -0.5V or V
O
< V
CC
+ 0.5V
. . . . . . . . . . . . . . . . . . . .
50mA
DC V
CC
or Ground Current, I
CC or
I
GND
(Note 3)
. . . . . . . . .
100mA
Operating Conditions
Temperature Range, T
A
. . . . . . . . . . . . . . . . . . . . . . -55
o
C to 125
o
C
Supply Voltage Range, V
CC
(Note 4)
AC Types. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1.5V to 5.5V
ACT Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4.5V to 5.5V
DC Input or Output Voltage, V
I
, V
O
. . . . . . . . . . . . . . . . . 0V to V
CC
Input Rise and Fall Slew Rate, dt/dv
AC Types, 1.5V to 3V . . . . . . . . . . . . . . . . . . . . . . . . . 50ns (Max)
AC Types, 3.6V to 5.5V . . . . . . . . . . . . . . . . . . . . . . . . 20ns (Max)
ACT Types, 4.5V to 5.5V. . . . . . . . . . . . . . . . . . . . . . . 10ns (Max)
Thermal Resistance (Typical, Note 5)
JA
(
o
C/W)
PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
___
SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
___
Maximum Junction Temperature (Plastic Package) . . . . . . . . . . 150
o
C
Maximum Storage Temperature Range . . . . . . . . . .-65
o
C to 150
o
C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300
o
C
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
3. For up to 4 outputs per device, add
25mA for each additional output.
4. Unless otherwise specified, all voltages are referenced to ground.
5.
JA
is measured with the component mounted on an evaluation PC board in free air.
DC Electrical Specifications
PARAMETER
SYMBOL
TEST
CONDITIONS
V
CC
(V)
25
o
C
-40
o
C TO
85
o
C
-55
o
C TO
125
o
C
UNITS
V
I
(V)
I
O
(mA)
MIN
MAX
MIN
MAX
MIN
MAX
AC TYPES
High Level Input Voltage
V
IH
-
-
1.5
1.2
-
1.2
-
1.2
-
V
3
2.1
-
2.1
-
2.1
-
V
5.5
3.85
-
3.85
-
3.85
-
V
Low Level Input Voltage
V
IL
-
-
1.5
-
0.3
-
0.3
-
0.3
V
3
-
0.9
-
0.9
-
0.9
V
5.5
-
1.65
-
1.65
-
1.65
V
High Level Output Voltage
V
OH
V
IH
or V
IL
-0.05
1.5
1.4
-
1.4
-
1.4
-
V
-0.05
3
2.9
-
2.9
-
2.9
-
V
-0.05
4.5
4.4
-
4.4
-
4.4
-
V
-4
3
2.58
-
2.48
-
2.4
-
V
-24
4.5
3.94
-
3.8
-
3.7
-
V
-75
(Note 6, 7)
5.5
-
-
3.85
-
-
-
V
-50
(Note 6, 7)
5.5
-
-
-
-
3.85
-
V
CD74AC280, CD74ACT280
3
Low Level Output Voltage
V
OL
V
IH
or V
IL
0.05
1.5
-
0.1
-
0.1
-
0.1
V
0.05
3
-
0.1
-
0.1
-
0.1
V
0.05
4.5
-
0.1
-
0.1
-
0.1
V
12
3
-
0.36
-
0.44
-
0.5
V
24
4.5
-
0.36
-
0.44
-
0.5
V
75
(Note 6, 7)
5.5
-
-
-
1.65
-
-
V
50
(Note 6, 7)
5.5
-
-
-
-
-
1.65
V
Input Leakage Current
I
I
V
CC
or
GND
-
5.5
-
0.1
-
1
-
1
A
Quiescent Supply Current
MSI
I
CC
V
CC
or
GND
0
5.5
-
8
-
80
-
160
A
ACT TYPES
High Level Input Voltage
V
IH
-
-
4.5 to
5.5
2
-
2
-
2
-
V
Low Level Input Voltage
V
IL
-
-
4.5 to
5.5
-
0.8
-
0.8
-
0.8
V
High Level Output Voltage
V
OH
V
IH
or V
IL
-0.05
4.5
4.4
-
4.4
-
4.4
-
V
-24
4.5
3.94
-
3.8
-
3.7
-
V
-75
(Note 6, 7)
5.5
-
-
3.85
-
-
-
V
-50
(Note 6, 7)
5.5
-
-
-
-
3.85
-
V
Low Level Output Voltage
V
OL
V
IH
or V
IL
0.05
4.5
-
0.1
-
0.1
-
0.1
V
24
4.5
-
0.36
-
0.44
-
0.5
V
75
(Note 6, 7)
5.5
-
-
-
1.65
-
-
V
50
(Note 6, 7)
5.5
-
-
-
-
-
1.65
V
Input Leakage Current
I
I
V
CC
or
GND
-
5.5
-
0.1
-
1
-
1
A
Quiescent Supply Current
MSI
I
CC
V
CC
or
GND
0
5.5
-
8
-
80
-
160
A
Additional Supply Current per
Input Pin TTL Inputs High
1 Unit Load
I
CC
V
CC
-2.1
-
4.5 to
5.5
-
2.4
-
2.8
-
3
mA
NOTES:
6. Test one output at a time for a 1-second maximum duration. Measurement is made by forcing current and measuring voltage to minimize
power dissipation.
7. Test verifies a minimum 50
transmission-line-drive capability at 85
o
C, 75
at 125
o
C.
ACT Input Load Table
INPUT
UNIT LOAD
All
1.43
NOTE: Unit load is
I
CC
limit specified in DC Electrical Specifications
Table, e.g., 2.4mA max at 25
o
C.
DC Electrical Specifications
(Continued)
PARAMETER
SYMBOL
TEST
CONDITIONS
V
CC
(V)
25
o
C
-40
o
C TO
85
o
C
-55
o
C TO
125
o
C
UNITS
V
I
(V)
I
O
(mA)
MIN
MAX
MIN
MAX
MIN
MAX
CD74AC280, CD74ACT280
4
Switching Specifications
Input t
r
, t
f
= 3ns, C
L
= 50pF (Worst Case)
PARAMETER
SYMBOL
V
CC
(V)
-40
o
C TO 85
o
C
-55
o
C TO 125
o
C
UNITS
MIN
TYP
MAX
MIN
TYP
MAX
AC TYPES
Propagation Delay,
Any Input to
O
t
PLH
, t
PHL
1.5
-
-
239
-
-
263
ns
3.3
(Note 9)
7.5
-
26
7.3
-
29
ns
5
(Note 10)
5.4
-
19.1
5.3
-
21
ns
Propagation Delay,
Any Input to
E
t
PLH
, t
PHL
1.5
-
-
227
-
-
250
ns
3.3
7.2
-
25
7
-
28
ns
5
5.2
-
18.2
5
-
20
ns
Input Capacitance
C
I
-
-
-
10
-
-
10
pF
Power Dissipation Capacitance
C
PD
(Note 11)
-
-
115
-
-
115
-
pF
ACT TYPES
Propagation Delay,
Any Input to
O
t
PLH
, t
PHL
5
(Note 10)
5.6
-
19.6
5.4
-
21.6
ns
Propagation Delay,
Any Input to
E
t
PLH
, t
PHL
5
5.6
-
19.6
5.4
-
21.6
ns
Input Capacitance
C
I
-
-
-
10
-
-
10
pF
Power Dissipation Capacitance
C
PD
(Note 11)
-
-
115
-
-
115
-
pF
NOTES:
8. Limits tested 100%.
9. 3.3V Min is at 3.6V, Max is at 3V.
10. 5V Min is at 5.5V, Max is at 4.5V.
11. C
PD
is used to determine the dynamic power consumption per package.
AC: P
D
= V
CC
2
f
i
(C
PD
+ C
L
)
ACT: P
D
= V
CC
2
f
i
(C
PD
+ C
L
) + V
CC
I
CC
where f
i
= input frequency, C
L
= output load capacitance, V
CC
= supply voltage.
FIGURE 1.
10%
V
S
t
r
= 3ns
V
S
t
PHL
t
PLH
V
S
V
S
V
S
V
S
t
f
= 3ns
10%
INPUT
LEVEL
I
n
0V
O
E
0V
0V
t
PLH
t
PHL
DUT
OUTPUT
R
L
(NOTE)
OUTPUT
LOAD
500
C
L
50pF
NOTE: For AC Series Only: When V
CC
= 1.5V, R
L
= 1k
.
FIGURE 2. PROPAGATION DELAY TIMES
CD74AC
CD74ACT
Input Level
V
CC
3V
Input Switching Voltage, V
S
0.5 V
CC
1.5V
Output Switching Voltage, V
S
0.5 V
CC
0.5 V
CC
CD74AC280, CD74ACT280
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accordance with TI's standard warranty. Testing and other quality control techniques are utilized to the extent
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1999, Texas Instruments Incorporated