STPC CONSUMER
2/51
Issue 1.2
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X86 Processor core
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Fully static 32-bit 5-stage pipeline, x86
processor fully PC compatible.
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Can access up to 4GBytes of external
memory.
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8KByte unified instruction and data cache
with write back and write through capability.
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Parallel processing integral floating point unit,
with automatic power down.
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Clock core speeds up to of 100 MHz.
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Fully static design for dynamic clock control.
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Low power and system management modes.
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Optimized design for 3.3V operation.
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DRAM Controller
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Integrated system memory and graphic frame
memory.
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Supports up to 128 MBytes system memory
in 4 banks and down to as little as 2Mbytes.
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Supports 4MB, 8MB, 16MB, 32MB single-
sided and double-sided DRAM SIMMs.
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Four quad-word write buffers for CPU to
DRAM and PCI to DRAM cycles.
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Four 4-word read buffers for PCI masters.
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Supports Fast Page Mode & EDO DRAM.
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Programmable timing for DRAM parameters
including CAS pulse width, CAS pre-charge
time and RAS to CAS delay.
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60, 70, 80 & 100ns DRAM speeds.
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Memory hole between 1 MByte & 8 MByte
supported for PCI/ISA busses.
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Hidden refresh.
To check if your memory device is supported by
the STPC, please refer to Table 9-3 in the
Programming Manual.
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Graphics Engine
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64-bit windows accelerator.
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Backward compatibility to SVGA standards.
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Hardware acceleration for text, bitblts,
transparent blts and fills.
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Up to 64 x 64 bit graphics hardware cursor.
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Up to 4MB long linear frame buffer.
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8-, 16-, and 24-bit pixels.
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Drivers for Windows and other operating
systems.
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VGA Controller
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Integrated 135MHz triple RAMDAC allowing
for 1280 x 1024 x 75Hz display.
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Requires external frequency synthesizer and
reference sources.
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8-, 16-, 24-bit pixels.
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Interlaced or non-interlaced output.
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Video Input port
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Accepts video inputs in CCIR 601/656 or
ITU-R 601/656, and stream decoding.
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Optional 2:1 decimator
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Stores captured video in off setting area of
the onboard frame buffer.
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Video pass through to the onboard PAL/
NTSC encoder for full screen video images.
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HSYNC and B/T generation or lock onto
external video timing source.
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Video Pipeline
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Two-tap interpolative horizontal filter.
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Two-tap interpolative vertical filter.
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Color space conversion (RGB to YUV and
YUV to RGB).
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Programmable window size.
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Chroma and color keying for integrated video
overlay.
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Programmable two tap filter with gamma
correction or three tap flicker filter.
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Progressive to interlaced scan converter.
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Digital NTSC/PAL encoder
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NTSC-M, PAL-M,PAL-B,D,G,H,I,PAL-N easy
programmable video outputs.
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CCIR601 encoding with programmable color
subcarrier frequencies.
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Line skip/insert capability
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Interlaced or non-interlaced operation mode.
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625 lines/50Hz or 525 lines/60Hz 8 bit
multiplexed CB-Y-CR digital input.
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CVBS and R,G,B simultaneous analog
outputs through 10-bit DACs.
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Cross color reduction by specific trap filtering
on luma within CVBS flow.
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Power down mode available on each DAC.
STPC CONSUMER
3/51
Issue 1.2
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PCI Controller
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Fully compliant with PCI 2.1 specification.
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Integrated PCI arbitration interface. Up to 3
masters can connect directly. External PAL
allows for greater than 3 masters.
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Translation of PCI cycles to ISA bus.
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Translation of ISA master initiated cycle to
PCI.
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Support for burst read/write from PCI master.
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0.33X and 0.5X CPU clock PCI clock.
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ISA master/slave Interface
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Generates the ISA clock from either
14.318MHz oscillator clock or PCI clock
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Supports programmable extra wait state for
ISA cycles
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Supports I/O recovery time for back to back
I/O cycles.
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Fast Gate A20 and Fast reset.
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Supports the single ROM that C, D, or E.
blocks shares with F block BIOS ROM.
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Supports flash ROM.
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Supports ISA hidden refresh.
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Buffered DMA & ISA master cycles to reduce
bandwidth utilization of the PCI and Host bus.
NSP compliant.
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IDE Interface
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Supports PIO
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Supports up to Mode 5 Timings
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Transfer Rates to 22 MBytes/sec
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Supports up to 4 IDE devices
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Concurrent channel operation (PIO modes) -
4 x 32-Bit Buffer FIFOs per channel
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Support for PIO mode 3 & 4.
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Support for 11.1/16.6 MB/s, I/O Channel
Ready PIO data transfers.
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Individual drive timing for all four IDE devices
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Supports both legacy & native IDE modes
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Supports hard drives larger than 528MB
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Support for CD-ROM and tape peripherals
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Backward compatibility with IDE (ATA-1).
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Drivers for Windows and other Operating
Systems
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Integrated peripheral controller
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2X8237/AT compatible 7-channel DMA
controller.
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2X8259/AT compatible interrupt Controller.
16 interrupt inputs - ISA and PCI.
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Three 8254 compatible Timer/Counters.
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Co-processor error support logic.
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Power Management
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Four power saving modes: On, Doze,
Standby, Suspend.
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Programmable system activity detector
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Supports SMM and APM.
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Supports STOPCLK.
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Supports IO trap & restart.
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Independent peripheral time-out timer to
monitor hard disk, serial & parallel ports.
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Supports RTC, interrupts and DMAs wake-up
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