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STA306

October 2003

This is preliminary information on a new product foreseen to be developed. Details are subject to change without notice.

6 DDX

Channels Capability (24 bit)

From 32kHz to 192kHz Input Sample Rates
Supported

Volume Control from 0 to -127 dB (0.5 dB steps)

Variable Digital Gain from 0 to 24dB (0.5dB
steps) with Digital Limiter Functionality and
Variable Attack and Release Time

I2S Inputs and Outputs

Individual Channel and Master Gain/
Attenuation

Individual Channel Mute and Zero Input Detect
Auto-Mute

Selectable Serial Audio Data Interface

Bass/Treble Controls

Channel Mapping of any Input to any
Processing/DDX

Channel

Active Crossover Capability

DC Blocking Selectable High-Pass Filter

Selectable Bass Management on Channel 6

Selectable Adjacent Channel Mixing Capability

Selectable Clock Input Ratio

Selectable De-emphasis

Selectable DDX

Ternary, or Binary PWM

output

AM Interference Reduction Mode

I2C Control

DESCRIPTION

The STA306 is a single chip solution for digital audio
processing and control in multi-channel applications.
It provides output capabilities for DDX

(Direct Digi-

tal Amplification). In conjunction with a DDX

power

device, it provides high-quality, high-efficiency, all
digital amplification. The device is extremely versatile
allowing for input of most digital formats including
192kHz, 24-bit DVD-Audio.

The internal 24-bit DSP allows for high resolution
processing at all standard input sample frequencies.
Processing includes volume control, filtering, bass
management, gain compression/limiting and PCM
and DDX

outputs. Filtering includes five user-pro-

grammable 28-bit biquads for EQ per channel, as
well as bass, treble and DC blocking. External clock-
ing can be provided at 4 different ratios of the input
sample frequency. All sample frequencies are up-
sampled for processing. Each internal processing
channel can receive any input channel, allowing flex-
ibility and the ability to perform active digital cross-
over for powered loudspeaker systems.

The serial audio data interface accepts many differ-
ent formats, including the popular I2S format. STx-
channels of DDX processing are performed.

TQFP64

ORDERING NUMBER: STA306

PRODUCT PREVIEW

MULTICHANNEL DIGITAL AUDIO PROCESSOR WITH DDXTM

STA306

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BLOCK DIAGRAM

Figure 1. Signal Flow Diagram

OUT1A/B

OUT2A/B

OUT3A/B

OUT4A/B

OUT5A/B

OUT6A/B

LRCKI

BICKI

SDI12

SDI34

SDI56

SERIAL

DATA

CHANNEL
MAPPING

VARIABLE

OVER-

SAMPLING

TREBLE,

BASS, EQ

(BIQUADS)

VOLUME
LIMITING

SDO12

SDO34

SDO56

OVERSAMPLING

VARIABLE

DOWN-

SAMPLING

POWER
DOWN

PWDN

EAPD

PLL

PLLB

XTI

CKOUT

SCL

SDA

LRCKO

BICKO

MVO

SERIAL

DATA

OUT

SYSTEM

CONTROL

SYSTEM TIMING

DDX

OUT1A/B

OUT2A/B

OUT3A/B

OUT4A/B

OUT5A/B

OUT6A/B

LRCKI

BICKI

SDI12

SDI34

SDI56

SERIAL

DATA

CHANNEL
MAPPING

VARIABLE

OVER-

SAMPLING

TREBLE,

BASS, EQ

(BIQUADS)

VOLUME
LIMITING

SDO12

SDO34

SDO56

OVERSAMPLING

VARIABLE

DOWN-

SAMPLING

POWER
DOWN

PWDN

EAPD

PLL

PLLB

XTI

CKOUT

SCL

SDA

LRCKO

BICKO

MVO

SERIAL

DATA

OUT

SYSTEM

CONTROL

SYSTEM TIMING

DDX

Channel
Mapping

1x,2x,4x

Interp

Biquads

B/T

Volume

Limiter

Interp

Noise & Distortion Reduction

PWM

DDX
Output

Interp_Rate

6 Inputs
From I2S

Scale

& Mix

BME

Channels 1-6
1st Stage
Interpolation
Output

Bass Management

Channel
Mapping

1x,2x,4x

Interp

Biquads

B/T

Volume

Limiter

Interp

Noise & Distortion Reduction

PWM

DDX
Output

Interp_Rate

6 Inputs
From I2S

Scale

& Mix

BME

Channels 1-6
1st Stage
Interpolation
Output

Bass Management

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STA306

IN CONNECTION (Top view)

PIN FUNCTION

PIN

NAME

TYPE

DESCRIPTION

PAD TYPE

MVO

Master Volume Override

CMOS Input Buffer with
Pull-Down

3, 12, 24, 28,

35, 44, 52, 59

VDD3

3.3V Digital Supply

3.3V Digital Power
Supply Voltage (pad ring)

2, 4, 13, 27,

36, 45, 53, 60

GND

Digital Ground

5, 14, 26, 37,

46, 54, 61

VDD

2.5V Digital Supply

2.5V Digital Power
Supply Voltage (core +
ring)

SDI_56

Input I2S Serial Data Channels 5 & 6

5V Tolerant TTL Input Buffer

SDI_34

Input I2S Serial Data Channels 3 & 4

5V Tolerant TTL Input Buffer

SDI_12

Input I2S Serial Data Channels 1 & 2

5V Tolerant TTL Input Buffer

LRCKI

Inputs I2C Left/Right Clock

5V Tolerant TTL Input Buffer

BICKI

Inputs I2C Serial Clock

5V Tolerant TTL Input Buffer

RESET

Global Reset

5V Tolerant TTL Schmitt
Trigger Input Buffer

PLLB

PLL Bypass

CMOS Input Buffer with
Pull-Down

Select Address (I2C)

CMOS Input Buffer with
Pull-Down

SDA

I/O

I2C Serial Data

Bidirectional Buffer:
5V Tolerant TTL Schmitt
Trigger Input;
3.3V Capable 2 mA
Slew-rate control Output;

SCL

I2C Serial Clock

5V Tolerant TTL Schmitt
Trigger Input Buffer

28 29 30 31 32

59 58 57 56

53 52 51 50 49

N.C.

VDD

GND

TEST_MODE

MVO

VDD3

BICKI

LRCKI

SDI_12

SDI_56

SDI_34

VDDA

GNDA

VDD3

CKOUT

GND

VDD

VDD3

N.C.

VDD3

SDO_34

SDO_12

LRCKO

VDD

BICKO

GND

VDD3

EAPD

OUT1_A

OUT1_B

OUT3_A

OUT3_B

OUT4_A

OUT5_A

OUT5_B

OUT4_B

OUT2_A

OUT2_B

VDD

VDD3

GND

D02AU1522

22 23 24 25 26

GND

VDD

SDO_56

N.C.

PWDN

SDA

SCL

XTI

FILTER_PLL

17 18 19 20 21

VDD

GND

OUT6_A

OUT6_B

VDD3

PLLB

RESET

VDD

VDD3

GND

STA306

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PIN

NAME

TYPE

DESCRIPTION

PAD TYPE

XTI

Crystal Oscillator Input (Clock Input)

3.3V Tolerant TTL Schmitt
Trigger Input Buffer

FILTER_PLL

PLL Filter

Analog Pad

VDDA

PLL 2.5V Supply

2.5V Analog Power
Supply Voltage

GNDA

PLL Ground

Analog Ground

CKOUT

Clock Output

3.3V Capable TTL Tristate
4mA Output Buffer

OUT6_B

PWM Channel 6 Output B