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DATA BRIEFING
This is Brief Data from STMicroelectronics. Details are subject to change without notice. For complete data, please contact
your nearest Sales Office or SmartCard Products Divison, Rousset, France. Fax: (+33) 4 42 25 87 29
ST16ST2G
Smartcard MCU
With up to 16352 Bytes EEPROM & T2G
+
Authentication Library
s
8 BIT ARCHITECTURE CPU
s
15 K Bytes of USER ROM
s
1 K Byte of T2G
+
AUTHENTICATION LIBRARY
s
1.5 K Byte of SYSTEM ROM
s
384 Bytes of RAM
s
Up to 16352 Bytes of EEPROM, SECTOR
COMBINATIVE
Highly reliable CMOS EEPROM technology
10 year data retention
100,000 Erase/Write cycle endurance
Protected One Time Programmable block (32
or 64 bytes)
1 to 32 Byte block Erase or Write in single cy-
cle programming
s
SERIAL ACCESS, ISO 7816-3 COMPATIBLE
s
EXTENDED VOLTAGE OPERATION
V
CC
Range: 2.7 V to 5.5 V
I
CC
Operating:4 mA at 5 V (typical)
1.6 mA at 3 V (typical)
s
POWER SAVING STANDBY MODE
I
CC
Stand-by: 20
A at 5 V (typical)
4
A at 3 V (typical)
s
UP TO 5 MHz INTERNAL OPERATING
FREQUENCY
s
VERY HIGH SECURITY FEATURES
INCLUDING EEPROM FLASH ERASE
s
CONTACT ASSIGNMENT COMPATIBLE ISO
7816-2
s
ESD PROTECTION GREATER THAN 5000V
s
2 OPERATING CONFIGURATIONS
ISSUER
USER
s
MEETS GSM 11.11 AND 11.12
SPECIFICATIONS Contact Name
T2G
+
SPECIFIC FEATURES
s
AntiClone Function* by France Telecom
s
FRANCE TELECOM LICENCE
s
T2G
+
AUTHENTICATION LIBRARY WITH
CBC** (to build Security Module for ST133x and
ST135x ICs)
s
DEDICATED SOFTWARE TOOLS
s
T2G
+
Authentication Library
Emulator with pseudo-ACF*
Manager with full ACF*
System ROM Library
* AntiClone Function = ACF
** Cipher Block Chaining Mechanism = CBC
Wafer
Micromodule (D3)
3
3
3
3
October 1999
ST16ST2G
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DESCRIPTION
The ST16ST2G, a member of the standard
ST16SF4x device family, is a serial access micro-
controller especially designed for high volume and
cost competitive Smartcard applications where
firmware security algorithm must be implemented.
The ST16ST2G is based on 8 bit CPU core and in-
cludes on chip memories: 384 Bytes of RAM, 15 K
Bytes of USER ROM, 1.5 K Byte of SYSTEM
ROM, and up to 16352 Bytes of EEPROM. The
ST16ST2G also includes 1 KByte of T2G
+
Authen-
tication Library.
Both ROM and EEPROM memories can be config-
ured into two sectors. Access rules from any mem-
ory section or sector to any other are set-up by the
User's defined Memory Access Control Matrix
(MACM).
Reliability data related to the ST16ST2G product
manufactured using STMicroelectronics advanced
CMOS EEPROM technology confirm data reten-
tion up to 10 years and endurance up to 100,000
Erase/Write cycles.
As with all other ST16 family members, the
ST16ST2G is fully compatible with the ISO stand-
ards for Smartcard applications.
Software development (ROM code, options) can
be completed by the ST16-19HDSE development
system.
The ST16ST2G can be delivered either in unsawn
or sawn wafers, 180 or 275 micron thickness as
well as in micromodule package.
For ordering information and request for quotation
(RTQ) please contact your nearest ST sales office.
Figure 1. Block Diagram
SCP 102b/DS
MEMORY ACCESS CONTROL MATRIX
CPU
BYTES
SERIAL I/0's
INTERFACE
NUMBER
GENERATOR
INTERNAL BUS
RAM
SECT.
A
SECT.
B
SECTOR
A
SECTOR
B
SECTORS
COMBIN.
ROM
V GENERATION
EEPROM
SECTORS COMBINATIVE
RST
GND
V
I/O1
CLK
SYSTEM
ROM
SECT.
S
SECURITY
LOGIC
I/O2
PP
CC
8 BIT
384
1.5 K
BYTE
15 K BYTES
Up to 16352 BYTES
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