1/13

March 2000

M27V322

32 Mbit (2Mb x16) Low Voltage UV EPROM and OTP EPROM

3.3V ± 10% SUPPLY VOLTAGE in READ
OPERATION

READ ACCESS TIME

100ns at V

= 3.0V to 3.6V

PIN COMPATIBLE WITH M27C322

WORD-WIDE CONFIGURABLE

32 Mbit MASK ROM REPLACEMENT

LOW POWER CONSUMPTION

Active Current 30mA at 5MHz

Stand-by Current 60µA

PROGRAMMING VOLTAGE: 12V ± 0.25V

PROGRAMMING TIME: 50µs/word

ELECTRONIC SIGNATURE

Manufacturer Code: 0020h

Device Code: 0034h

DESCRIPTION
The M27V322 is a 32 Mbit EPROM offered in the
UV range (ultra violet erase) and OTP range. It is
ideally suited for microprocessor systems requir-
ing large data or program storage. It is organised
as 2 MWords of 16 bit. The pin-out is compatible
with a 32 Mbit Mask ROM.
The FDIP42W (window ceramic frit-seal package)
has a transparent lid which allows the user to ex-
pose the chip to ultraviolet light to erase the bit pat-
tern. A new pattern can then be written rapidly to
the device by following the programming proce-
dure.
For applications where the content is programmed
only one time and erasure is not required, the
M27V322 is offered in PDIP42 package.

FDIP42W (F)

PDIP42 (P)

Figure 1. Logic Diagram

AI03050

A0-A20

GVPP

Q0-Q15

VCC

M27V322

VSS

M27V322

2/13

Figure 2A. DIP Connections

GVPP

VSS

A13

VSS

A14

A15

A12

A16

A20

Q15

VCC

Q11

Q14

A17

A18

A19

AI03051

M27V322

Q13

A11

A10

Q10

Q12

from E to output (t

ELQV

). Data is available at the

output after a delay of t

GLQV

from the falling edge

of GV

, assuming that E has been low and the

addresses have been stable for at least t

AVQV

GLQV

Standby Mode
The M27V322 has a standby mode which reduces
the supply current from 30mA to 30µA. The
M27V322 is placed in the standby mode by apply-
ing a CMOS high signal to the E input.When in the
standby mode, the outputs are in a high imped-
ance state, independent of the GV

input.

Two Line Output Control
Because EPROMs are usually used in larger
memory arrays, this product features a 2 line con-
trol function which accommodates the use of mul-
tiple memory connection. The two line control
function allows:
a. the lowest possible memory power dissipation,
b. complete assurance that output bus contention

will not occur.

For the most efficient use of these two control
lines, E should be decoded and used as the prima-
ry device selecting function, while GV

should be

made a common connection to all devices in the
array and connected to the READ line from the
system control bus. This ensures that all deselect-
ed memory devices are in their low power standby
mode and that the output pins are only active
when data is required from a particular memory
device.

Table 1. Signal Names

A0-A20

Address Inputs

Q0-Q15

Data Outputs

Chip Enable

Output Enable / Program Supply

Supply Voltage

Ground

DEVICE OPERATION
The operating modes of the M27V322 are listed in
the Operating Modes Table. A single power supply
is required in the read mode. All inputs are TTL
compatible except for V

and 12V on A9 for the

Electronic Signature.
Read Mode
The M27V322 has a word-wide organization. Chip
Enable (E) is the power control and should be
used for device selection. Output Enable (G) is the
output control and should be used to gate data to
the output pins independent of device selection.
Assuming that the addresses are stable, the ad-
dress access time (t

AVQV

) is equal to the delay

3/13

M27V322

Table 2. Absolute Maximum Ratings

(1)

Note: 1. Except for the rating "Operating Temperature Range", stresses above those listed in the Table "Absolute Maximum Ratings" may

cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions
above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum Rating condi-
tions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant qual-
ity documents.

2. Minimum DC voltage on Input or Output is 0.5V with possible undershoot to 2.0V for a period less than 20ns. Maximum DC

voltage on Output is V

+0.5V with possible overshoot to V

+2V for a period less than 20ns.

3. Depends on range.

Table 3. Operating Modes

Note: X = V

or V

, V

= 12V ± 0.5V.

Table 4. Electronic Signature

Note: Outputs Q15-Q8 are set to '0'.

Symbol

Parameter

Value

Unit

Ambient Operating Temperature

(3)

40 to 125

°C

BIAS

Temperature Under Bias

50 to 125

°C

STG

Storage Temperature

65 to 150

°C

(2)

Input or Output Voltage (except A9)

2 to 7

Supply Voltage

2 to 7

(2)

A9 Voltage

2 to 13.5

Program Supply Voltage

2 to 14

Mode

Q15-Q0

Read

Data Out

Output Disable

Hi-Z

Program

Pulse

Data In

Program Inhibit

Hi-Z

Standby

Hi-Z

Electronic Signature

Codes

Identifier

Hex Data

Manufacturer's Code

20h

Device Code

34h

M27V322

4/13

Table 5. AC Measurement Conditions

High Speed

Standard

Input Rise and Fall Times

10ns

20ns

Input Pulse Voltages

0 to 3V

0.4V to 2.4V

Input and Output Timing Ref. Voltages

1.5V

0.8V and 2V

Figure 3. AC Testing Input Output Waveform

AI01822

High Speed

1.5V

2.4V

Standard

0.4V

2.0V

0.8V

Figure 4. AC Testing Load Circuit

AI01823B

1.3V

OUT

CL = 30pF for High Speed
CL = 100pF for Standard
CL includes JIG capacitance

3.3k

1N914

DEVICE

UNDER

TEST

Table 6. Capacitance

(1)

= 25 °C, f = 1 MHz)

Note: 1. Sampled only, not 100% tested.

Symbol

Parameter

Test Condition

Min

Max

Unit

Input Capacitance

= 0V

OUT

Output Capacitance

OUT

= 0V

put control and by properly selected decoupling
capacitors. It is recommended that a 0.1µF ceram-
ic capacitor is used on every device between V

and V

. This should be a high frequency type of

low inherent inductance and should be placed as
close as possible to the device. In addition, a
4.7µF electrolytic capacitor should be used be-
tween V

and V

for every eight devices. This

capacitor should be mounted near the power sup-
ply connection point. The purpose of this capacitor
is to overcome the voltage drop caused by the in-
ductive effects of PCB traces.

System Considerations
The power switching characteristics of Advanced
CMOS EPROMs require careful decoupling of the
supplies to the devices. The supply current ICC
has three segments of importance to the system
designer: the standby current, the active current
and the transient peaks that are produced by the
falling and rising edges of E. The magnitude of the
transient current peaks is dependent on the ca-
pacitive and inductive loading of the device out-
puts. The associated transient voltage peaks can
be suppressed by complying with the two line out-

5/13

M27V322

Table 7. Read Mode DC Characteristics

(1)

= 40 to 85 °C or 0 to 70 °C; V

= 3.3V ± 10%; V

= V

)

Note: 1. V

must be applied simultaneously with or before V

and removed simultaneously or after V

2. Maximum DC voltage on Output is V

+0.5V.

Table 8. Read Mode AC Characteristics

(1)

= 40 to 85 °C or 0 to 70 °C; V

= 3.3V ± 10%; V

= V

)

Note: 1. V

must be applied simultaneously with or before V

and removed simultaneously or after V

2. Sampled only, not 100% tested.
3. Speed obtained with High Speed measurement conditions.

Symbol

Parameter

Test Condition

Min

Max

Unit

Input Leakage Current

±1

µA

Output Leakage Current

OUT

±10

µA

Supply Current

E = V

, GV

= V

, I

OUT

= 0mA,

f = 5MHz

Supply Current (Standby) TTL

E = V

Supply Current (Standby) CMOS

E > V

0.2V

µA

Program Current

= V

µA

Input Low Voltage

0.6

0.2V

(2)

Input High Voltage

0.7V

+ 0.5

Output Low Voltage

= 2.1mA

0.4

Output High Voltage TTL

= 400µA

2.4

Symbol

Alt

Parameter

Test Condition

M27V322

Unit

-100

(3)

-120

-150

Min

Max

Min

Max

Min

Max

AVQV

ACC

Address Valid to Output Valid

E = V

, G = V

100

120

150

ELQV

Chip Enable Low to Output Valid

G = V

100

120

150

GLQV

Output Enable Low to Output
Valid

E = V

EHQZ

(2)

Chip Enable High to Output Hi-Z

G = V

GHQZ

(2)

Output Enable High to Output
Hi-Z

E = V

AXQX

Address Transition to Output
Transition

E = V

, G = V

M27V322

6/13

Figure 5. Read Mode AC Waveforms

AI02207

tAXQX

tEHQZ

A0-A20

GVPP

Q0-Q15

tAVQV

tGHQZ

tGLQV

tELQV

VALID

Hi-Z

VALID

Table 9. Programming Mode DC Characteristics

(1)

= 25 °C; V

= 6.25V ± 0.25V; V

= 12V ± 0.25V)

Note: 1. V

must be applied simultaneously with or before V

and removed simultaneously or after V

Symbol

Parameter

Test Condition

Min

Max

Unit

Input Leakage Current

±10

Supply Current

Program Current

E = V

Input Low Voltage

0.3

0.8

Input High Voltage

2.4

+ 0.5

Output Low Voltage

= 2.1mA

0.4

Output High Voltage TTL

= 2.5mA

3.5

A9 Voltage

11.5

12.5

7/13

M27V322

Table 10. MARGIN MODE AC Characteristics

(1)

= 25 °C; V

= 6.25V ± 0.25V; V

= 12V ± 0.25V)

Note: 1. V

must be applied simultaneously with or before V

and removed simultaneously or after V

Table 11. Programming Mode AC Characteristics

(1)

= 25 °C; V

= 6.25V ± 0.25V; V

= 12V ± 0.25V)

Note: 1. V

must be applied simultaneously with or before V

and removed simultaneously or after V

2. Sampled only, not 100% tested.

Symbol

Alt

Parameter

Test Condition

Min

Max

Unit

A9HVPH

AS9

High to V

High

µs

VPHEL

VPS

High to Chip Enable Low

µs

A10HEH

AS10

A10

High to Chip Enable High (Set)

µs

A10LEH

AS10

A10

Low to Chip Enable High (Reset)

µs

EXA10X

AH10

Chip Enable Transition to V

A10

Transition

µs

EXVPX

VPH

Chip Enable Transition to V

Transition

µs

VPXA9X

AH9

Transition to V

Transition

µs

Symbol

Alt

Parameter

Test Condition

Min

Max

Unit

AVEL

Address Valid to Chip Enable Low

µs

QVEL

Input Valid to Chip Enable Low

µs

VCHEL

VCS

High to Chip Enable Low

µs

VPHEL

OES

High to Chip Enable Low

µs

VPLVPH

PRT

Rise Time

ELEH

Chip Enable Program Pulse Width (Initial)

µs

EHQX

Chip Enable High to Input Transition

µs

EHVPX

OEH

Chip Enable High to V

Transition

µs

VPLEL

Low to Chip Enable Low

µs

ELQV

Chip Enable Low to Output Valid

µs

EHQZ

(2)

DFP

Chip Enable High to Output Hi-Z

130

EHAX

Chip Enable High to Address Transition

Programming
When delivered (and after each erasure for UV
EPROM), all bits of the M27V322 are in the "1"
state. Data is introduced by selectively program-
ming "0"s into the desired bit locations. Although
only "0"s will be programmed, both "1"s and "0"s
can be present in the data word. The only way to
change a "0" to a "1" is by die exposition to ultravi-

olet light (UV EPROM). The M27V322 is in the
programming mode when V

input is at 12.V,

is at V

and E is pulsed to V

. The data to

be programmed is applied to 16 bits in parallel to
the data output pins. The levels required for the
address and data inputs are TTL. V

is specified

to be 6.25V ± 0.25V.

9/13

M27V322

PRESTO III Programming Algorithm
The PRESTO III Programming Algorithm allows
the whole array to be programed with a guaran-
teed margin in a typical time of 100 seconds. Pro-
gramming with PRESTO III consists of applying a
sequence of 50µs program pulses to each word
until a correct verify occurs (see Figure 8). During
programing and verify operation a MARGIN
MODE circuit must be activated to guarantee that
each cell is programed with enough margin. No
overprogram pulse is applied since the verify in
MARGIN MODE provides the necessary margin to
each programmed cell.
Program Inhibit
Programming of multiple M27V322s in parallel
with different data is also easily accomplished. Ex-
cept for E, all like inputs including GV

of the par-

allel M27V322 may be common. A TTL low level
pulse applied to a M27V322's E input and V

12V, will program that M27V322. A high level E in-
put inhibits the other M27V322s from being pro-
grammed.
Program Verify
A verify (read) should be performed on the pro-
grammed bits to determine that they were correct-
ly programmed. The verify is accomplished with

Figure 8. Programming Flowchart

AI03059B

n = 0

Last

Addr

VERIFY

E = 50

s Pulse

++n

= 25

++ Addr

VCC = 6.25V, VPP = 12V

FAIL

CHECK ALL WORDS

1st: VCC = 5V

2nd: VCC = 3V

YES

SET MARGIN MODE

RESET MARGIN MODE

at V

. Data should be verified with t

ELQV

af-

ter the falling edge of E.
On-Board Programming
The M27V322 can be directly programmed in the
application circuit. See the relevant Application
Note AN620.
Electronic Signature
The Electronic Signature (ES) mode allows the
reading out of a binary code from an EPROM that
will identify its manufacturer and type. This mode
is intended for use by programming equipment to
automatically match the device to be programmed
with its corresponding programming algorithm.
The ES mode is functional in the 25°C ± 5°C am-
bient temperature range that is required when pro-
gramming the M27V322. To activate the ES mode,
the programming equipment must force 11.5V to
12.5V on address line A9 of the M27V322, with
V

= V

= 5V. Two identifier bytes may then be

sequenced from the device outputs by toggling ad-
dress line A0 from V

to V

. All other address

lines must be held at V

during Electronic Signa-

ture mode.
Byte 0 (A0 = V

) represents the manufacturer

code and byte 1 (A0 = V

) the device identifier

code. For the STMicroelectronics M27V322, these
two identifier bytes are given in Table 4 and can be
read-out on outputs Q0 to Q7.
ERASURE OPERATION (applies to UV EPROM)
The erasure characteristics of the M27V322 is
such that erasure begins when the cells are ex-
posed to light with wavelengths shorter than ap-
proximately 4000 Å. It should be noted that
sunlight and some type of fluorescent lamps have
wavelengths in the 3000-4000 Å range. Research
shows that constant exposure to room level fluo-
rescent lighting could erase a typical M27V322 in
about 3 years, while it would take approximately 1
week to cause erasure when exposed to direct
sunlight. If the M27V322 is to be exposed to these
types of lighting conditions for extended periods of
time, it is suggested that opaque labels be put over
the M27V322 window to prevent unintentional era-
sure. The recommended erasure procedure for
M27V322 is exposure to short wave ultraviolet
light which has a wavelength of 2537 Å. The inte-
grated dose (i.e. UV intensity x exposure time) for
erasure should be a minimum of 30 W-sec/cm

The erasure time with this dosage is approximate-
ly 30 to 40 minutes using an ultraviolet lamp with
12000 µW/cm

power rating. The M27V322

should be placed within 2.5cm (1 inch) of the lamp
tubes during the erasure. Some lamps have a filter
on their tubes which should be removed before
erasure.

M27V322

10/13

Table 12. Ordering Information Scheme

Note: 1. High Speed, see AC Characteristics section for further information.

For a list of available options (Speed, Package, etc...) or for further information on any aspect of this de-
vice, please contact the STMicroelectronics Sales Office nearest to you.

Example:

M27V322

-100 X

Device Type
M27

Supply Voltage

V = 3.3V ±10%

Device Function
322 = 32 Mbit (2Mb x16)

Speed

-100 = 100 ns

(1)

-120 = 120 ns
-150 = 150 ns

Tolerance

blank = 3.3V ±10%

X = 3.3V ±5%

Package
F = FDIP42W

P = PDIP42

Temperature Range
1 = 0 to 70 °C

6 = 40 to 85 °C

Table 13. Revision History

Date

Revision Details

July 1999

First Issue

02/09/00

Programming Flowchart changed (Figure 8)
PRESTO III Programming Algorithm paragraph changed
FDIP42W Package Dimension, L Max added (Table 14)

11/13

M27V322

Table 14. FDIP42W - 42 pin Ceramic Frit-seal DIP with window, Package Mechanical Data

Symb

inches

Typ

Min

Max

Typ

Min

Max

5.72

0.225

0.51

1.40

0.020

0.055

3.91

4.57

0.154

0.180

3.89

4.50

0.153

0.177

0.41

0.56

0.016

0.022

1.45

0.057

0.23

0.30

0.009

0.012

54.41

54.86

2.142

2.160

50.80

2.000

15.24

0.600

14.50

14.90

0.571

0.587

2.54

0.100

14.99

0.590

16.18

18.03

0.637

0.710

3.18

4.10

0.125

0.161

1.52

2.49

0.060

0.098

8.00

0.315

16.00

0.630

4°

11°

4°

11°

Figure 9. FDIP42W - 42 pin Ceramic Frit-seal DIP with window, Package Outline

Note: Drawing is not to scale.

FDIPW-b

13/13

M27V322

Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted
by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject
to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not
authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.

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All other names are the property of their respective owners.

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