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Электронный компонент: ST20P64

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ST
Sitronix
ST20P64
PRELIMINARY
8 BIT Microcontroller with 64K bytes PROM(OTP)
Notice: This is not a final specification. Some parameters are subject to change.
Ver 0.2
1
/
49 12/3/03
1
1
.
.
F
F
E
E
A
A
T
T
U
U
R
R
E
E
S
S
Totally static 65C02S CPU
ROM: 64K x 8-bit PROM(OTP)
RAM: 2432 x 8-bit
Stack: Up to 128-level deep
Operation voltage: 2.4V ~ 3.4V
Built-in double DC-DC voltage converter for LCD driver
I/O
ports
- 24 CMOS bidirectional bit programmable I/O pins,
sixteen (Port-B/C) are shared with LCD drives
- 8 open drain output pins are shared with LCD drives
- 2 COMS output pins are shared with PSG drives
- Bit programmable pull-up for input pins
- Hardware de-bounce option for Port-A
Low voltage detector
Timer/Counter:
- Two 8-bit timer/16-bit event counter
- One 8-bit Base timer
6 hardware interrupts with dedicated exception vectors
- External interrupt (edge triggered)
- Timer0 interrupt
- Timer1 interrupt
- Base timer interrupt
- Port-A[7~0] interrupt (transition triggered)
- DAC reload interrupt
Dual clock sources with warm-up timer
- Low frequency crystal oscillator
32768 Hz
- RC oscillator 500K ~ 4M Hz
- High frequency crystal/resonator oscillator (code option)
455K~4M Hz
LCD
controller/driver
- Resolution: 32x8 ~ 48x16, maximum 768 dots
- Two clock source options: RC and resonator oscillator
- Internal bias resistors (1/5 bias/1/4 bias) with 16-level
driving strength control
- Up to 16-level contrast control
- Keyboard scan function supported on 16 shared
segment drives
Programmable sound generator (PSG)
- Two channels with three playing modes
- Tone/noise generator
- 16-level volume control
- Dedicated outputs for directly connection to buzzer
PWM DAC: Three modes up to 8-bit resolution
Three power down modes:
- WAI0 mode
- WAI1 mode
- STP mode
2
2
.
.
G
G
E
E
N
N
E
E
R
R
A
A
L
L
D
D
E
E
S
S
C
C
R
R
I
I
P
P
T
T
I
I
O
O
N
N
The ST20P64 is a W65C02S based 8-bit microcontroller
designed with CMOS silicon gate technology. This single chip
microcontroller is useful for translator, databank and other
consumer applications. It integrates with SRAM, Programming
ROM(OTP), LCD controller/driver, DC-DC voltage converter,
I/O ports, timers, PSG and PWM DAC. This chip also builds in
dual oscillators for the chip performance enhancement.
Sitronix ST20P64
Ver 0.2
2/50
12/3/03
3
3
.
.
P
P
A
A
D
D
D
D
I
I
A
A
G
G
R
R
A
A
M
M
SEG
6
SEG
7
SEG
8
SEG
9
SE
G1
0
SE
G1
1
SE
G1
2
SE
G1
3
SE
G1
4
SE
G1
5
SE
G1
6
SE
G1
7
SE
G1
8
SE
G1
9
SE
G2
0
SE
G2
1
SE
G2
2
SE
G2
3
SE
G2
4
SE
G2
5
SE
G2
6
SEG27
PSGOB
PSGO
SEG47/PB7
SEG46/PB6
SEG45/PB5
SEG44/PB4
SEG43/PB3
SEG42/PB2
SEG41/PB1
SEG40/PB0
SEG39/PC7
SEG38/PC6
SEG37/PC5
SEG36/PC4
SEG35/PC3
SEG34/PC2
SEG33/PC1
SEG32/PC0
SEG31
SEG30
SEG29
SEG28
TEST
PV
DD
OS
CXO
OS
CX
I
RES
E
T
OS
C
I
XIO
GN
D
VD
D
PA
0
PA
1
PA
2
PA
3
PA
4
PA
5
PA
6
PA
7
CA
P1+
CAP1
-
V3
V2
VP
COM0
COM1
COM2
COM3
COM4
COM5
COM6
COM7
COM8
COM9
COM10
COM11
COM12
COM13
COM14
COM15
SEG0
SEG1
SEG2
SEG3
SEG4
SEG5
17
19
18
8
11
7
9 10
12
22
21
20
2
1
3 4
6
5
14
13
16
15
27
26
25
24
23
33
32
31
30
29
28
42
41
40
38
39
37
36
35
34
44
43
48
63
54
56
62
55
57
47
61
58
59
60
50
64
65
66
51
46
49
45
52
53
84
85
86
87
88
77
81
78
79
80
82
83
68
69
70
71
72
73
74
75
76
67
89
ST20P64
VP
P
LOGO

Sitronix ST20P64
Ver 0.2
3/50
12/3/03
4
4
.
.
P
P
A
A
D
D
C
C
E
E
N
N
T
T
E
E
R
R
C
C
O
O
O
O
R
R
D
D
I
I
N
N
A
A
T
T
E
E
S
S
Chip size: 2670m X3470 m
Coordinate: Pad center (m)
Origin: Chip center
Pad pitch: 110m, 120m
Substrate connection: GND
Unit: m
PAD NO.
NAME
X
Y
PAD NO.
NAME
X
Y
1 SEG6
-1133.5
-1660
31 SEG36/PC4
1260
-200.5
2 SEG7
-1006.6
-1660
32 SEG37/PC5
1260
-86.1
3 SEG8
-894.9
-1660
33 SEG38/PC6
1260
22.2
4 SEG9
-785.9
-1660
34 SEG39/PC7
1260
142.4
5 SEG10
-676.1
-1660
35 SEG40/PB0
1260
251.6
6 SEG11
-567.8
-1660
36 SEG41/PB1
1260
364.5
7 SEG12
-458.2
-1660
37 SEG42/PB2
1260
473.6
8 SEG13
-349.8
-1660
38 SEG43/PB3
1260
585.1
9 SEG14
-239.9
-1660
39 SEG44/PB4
1260
693.2
10 SEG15
-130.8
-1660
40 SEG45/PB5
1260
801.8
11 SEG16
-21.4
-1660
41 SEG46/PB6
1260
913.9
12 SEG17
87.4
-1660
42 SEG47/PB7
1260
1023.9
13 SEG18
196.4
-1660
43 PSGO
1260
1144.5
14 SEG19
305.9
-1660
44 PSGOB
1260
1249.3
15 SEG20
415.8
-1660
45
TEST
1256.1
1477.4
16 SEG21
524.4
-1660
46 PVDD
1225.6
1660
17 SEG22
634.7
-1660
47 OSCXO
1106.6
1660
18 SEG23
743.3
-1660
48 OSCXI
996.6
1660
19 SEG24
849.8
-1660
49
RESET
886.3
1660
20 SEG25
960.1
-1660
50
OSCI
777.1
1660
21 SEG26
1075.1
-1660
51
XIO
668.1
1660
22 SEG27
1260
-1445.2
52 VPP
565
1660
23 SEG28
1260
-1343.9
53
GND
439.8
1660
24 SEG29
1260
-1216.4
54
VDD
278.5
1660
25 SEG30
1260
-1101.3
55
PA0
152.9
1660
26 SEG31
1260
-1003.7
56
PA1
34.7
1660
27 SEG32/PC0
1260
-651.2
57
PA2
-74.3
1660
28 SEG33/PC1
1260
-533.2
58
PA3
-179.9
1660
29 SEG34/PC2
1260
-430.5
59
PA4
-308.2
1660
30 SEG35/PC3
1260
-320.5
60
PA5
-417.8
1660
Sitronix ST20P64
Ver 0.2
4/50
12/3/03
PAD NO.
NAME
X
Y
PAD NO.
NAME
X
Y
61
PA6
-524.6
1660
76
COM8
-1260
241.4
62
PA7
-634.7
1660
77
COM9
-1260
93
63
CAP1+
-753.5
1660
78 COM10
-1260
-51.6
64
CAP1-
-873.3
1660
79 COM11
-1260
-187.9
65
V3
-1006.4
1660
80 COM12
-1260
-331.2
66
V2
-1121.4
1660
81 COM13
-1260
-479.2
67
VP
-1274.9
1660
82 COM14
-1260
-625.7
68
COM0
-1260
1307.9
83 COM15
-1260
-755.6
69
COM1
-1260
1155.4
84 SEG0
-1260
-911.3
70
COM2
-1260
1013.4
85 SEG1
-1260
-1030.3
71
COM3
-1260
866.3
86 SEG2
-1260
-1142.7
72
COM4
-1260
746.1
87 SEG3
-1260
-1251.8
73
COM5
-1260
601.9
88 SEG4
-1260
-1357
74
COM6
-1260
480.4
89 SEG5
-1260
-1469.5
75
COM7
-1260
363.2
5
5
.
.
B
B
L
L
O
O
C
C
K
K
D
D
I
I
A
A
G
G
R
R
A
A
M
M
CLOCK
GENERATOR
LCD
RAM
ROM
TIMER
PSG
DAC
PORT
CPU
LOW
VOLTAGE
DETECTOR
Sitronix ST20P64
Ver 0.2
5/50
12/3/03
6
6
.
.
P
P
A
A
D
D
D
D
E
E
S
S
C
C
R
R
I
I
P
P
T
T
I
I
O
O
N
N
Pin No.
Designation
I/O
Description
70~73
COM2/SCK
COM3/SS
COM4/MOSI
COM5/MISO
I/O
LCD common drive output pins, drives 2~5
SPI interface for OTP programming.
68, 69, 74, 75
COM0,1, 6, 7
O
LCD common drive output pins, drives 0, 1, 6, 7
76~83 COM8~5
O
O
LCD common drive output pins, drives 8~15
Common open drain output port.
84~89, 0~26
SEG0~31
O
LCD segment drive output pins, drives 0~31
54 PA0
/
INTX
I/O
I
I
I
- Port-A bit programmable I/O
- Edge-trigger Interrupt.
- Transition-trigger Interrupt
- Programmable Timer1 clock source
56~62 PA1~7
I/O
I
- Port-A bit programmable I/O
- Transition-trigger Interrupt
35~42
SEG40/PB0~
SEG47/PB7
I/O
O
- Port-B bit programmable I/O
- LCD segment drives 40~47
27~33
SEG32/PC0~
SEG39/PC7
I/O
O
- Port-C bit programmable I/O
- LCD segment drives 32~39
44, 43
PSGOB,PSGO
O
PSG/ PWM DAC Outputs
47, 48
OSCXO, OSCXI
I/O
Low frequency crystal oscillator I/O pins. Connect to external 32768 Hz
crystal.
49
RESET
I
Reset signal input (low active)
50 OSCI
I
I
- RC oscillator input pin. Connected to external resistor
- High frequency crystal/resonator oscillator input pin. Connect to external
crystal/resonator.
51 XIO
O
- NC
- High frequency crystal/resonator oscillator output pin. Connect to external
crystal/resonator.
53 GND
P
Ground
pin
54 VDD
P
Power
supply
pin
63
CAP1+
I/O
Connect to booster capacitor positive(+) terminal
64
CAP1-
I/O
Connect to booster capacitor negative(-) terminal
66, 65
V2, V3
P
Multi-level power supply for the liquid crystal drive
67
VP
O
Voltage output of booster circuit
45
TEST
I
Chip test function. Leave it open.
Note: I = input, O = output, I/O = input/output, P = power.