Philips
Semiconductors
PCK857
66150MHz Phase Locked Loop
Differential 1:10 SDRAM Clock Driver
Preliminary specification
1998 Dec 10
INTEGRATED CIRCUITS
Philips Semiconductors
Preliminary specification
PCK857
66150MHz Phase Locked Loop Differential 1:10
SDRAM Clock Driver
2
1998 Dec 10
FEATURES
Optimized for clock distribution in DDR (Double Data Rate)
SDRAM applications
1-to-10 differential clock distribution
Very low skew (
<
100ps) and jitter (
<
100ps)
3V AV
CC
and 2.5V V
ddq
SSTL_2 interface clock inputs and outputs
CMOS control signal input
Test mode enables buffers while disabling PLL
Low current power-down mode
Tolerant of Spread Spectrum input clock
Full DDR solution provided when used with SSTL16857 and
CBT3857
DESCRIPTION
Zero delay buffer to distribute an SSTL differential clock input pair to
10 SSTL_2 differential output pairs. Outputs are slope controlled.
External feedback pin for synchronization of the outputs to the input.
A CMOS style Enable/Disable pin is provided for low power disable.
PIN CONFIGURATION
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
21
22
23
24
41
42
43
44
45
46
47
48
GND
Y
0
Y
0
V
DDQ
Y
1
Y
1
GND
Y
2
GND
Y
2
V
DDQ
V
DDQ
CLK
CLK
V
DDQ
AV
CC
AGND
GND
Y
3
Y
3
V
DDQ
Y
4
Y
4
GND
GND
Y
5
Y
5
V
DDQ
Y
6
Y
6
GND
GND
Y
7
Y
7
V
DDQ
G
FBIN
FBIN
V
DDQ
FBOUT
FBOUT
GND
Y
8
Y
8
V
DDQ
Y
9
Y
9
SW00358
GND
ORDERING INFORMATION
PACKAGES
TEMPERATURE RANGE
OUTSIDE NORTH AMERICA
NORTH AMERICA
DRAWING NUMBER
48-Pin Plastic TSSOP
0
C to +70
C
PCK857 DGG
PCK857 DGG
SOT362-1
PINS
SYMBOL
DESCRIPTION
1, 7, 8, 18, 24, 25, 31, 41, 42, 48
GND
SSTL_2 ground pins
2, 3, 5, 6, 9, 10, 19, 20, 22, 23, 26, 27, 29,
30, 32, 33, 39, 40, 43, 44, 46, 47
Y
n
, Y
nb
, FB
OUT
, FB
OUTb
SSTL_2 differential outputs
4, 11, 12, 15, 21, 28, 34
V
DDQ
SSTL_2 power pins
13, 14, 35, 36
CLK
IN
, CLK
INb
, FB
IN
, FB
INb
SSTL_2 differential inputs
16
AV
CC
Analog power
17
AGND
Analog ground
37
G
Power-down control input
Philips Semiconductors
Preliminary specification
PCK857
66150MHz Phase Locked Loop Differential 1:10
SDRAM Clock Driver
1998 Dec 10
3
FUNCTION TABLE
INPUTS
OUTPUTS
PLL ON/OFF
G
CLK
CLK
Y
Y
FBOUT
FBOUT
L
L
H
Z
Z
Z
1
Z
1
OFF
L
H
L
Z
Z
Z
1
Z
1
OFF
H
L
H
L
H
L
H
ON
H
H
L
H
L
H
L
ON
X
2
<
20MHz
<
20MHz
Z
Z
Z
1
Z
1
OFF
NOTES:
H = HIGH voltage level
L = LOW voltage level
Z = high impedance OFF-state
X = don't care
1. Subject to change. May cause conflict with FBIN pins.
2. Additional feature that senses when the clock input is less than 20MHz and places the part in sleep mode.
BLOCK DIAGRAM
PLL
G/
CLK
CLK/
FB
IN
FB
IN
/
AV
CC
Y
0
Y
0
/
Y
1
Y
1
/
Y
2
Y
2
/
Y
3
Y
3
/
Y
4
Y
4
/
Y
5
Y
5
/
Y
6
Y
6
/
Y
7
Y
7
/
Y
8
Y
8
/
Y
9
Y
9
/
FB
OUT
FB
OUT
/
SW00395
Philips Semiconductors
Preliminary specification
PCK857
66150MHz Phase Locked Loop Differential 1:10
SDRAM Clock Driver
1998 Dec 10
4
DC ELECTRICAL CHARACTERISTICS
Over recommended operating conditions. Voltages are referenced to GND (ground = 0V).
LIMITS
SYMBOL
PARAMETER
TEST CONDITIONS
UNIT
MIN
TYP
MAX
AV
CC
Analog supply voltage
3
3.3
3.6
V
V
DDQ
I/O supply voltage
2.3
2.5
2.7
V
V
IL
Input low voltage
0.3
V
ref
0.35
V
V
IH
Input high voltage
V
ref
+ 0.35
V
ddq
+ 0.3
V
V
OL
Output low voltage
1
0
0.5
V
V
OH
Output high voltage
1
2
V
ddq
V
NOTE:
1. This is intended to operate in the SSTL_2 type IV unterminated mode without series resistors on the outputs.
AC CHARACTERISTICS
GND = 0V; t
r
= t
f
2.5ns; C
L
= 50pF; R
L
= 1K
CONDITION
LIMITS
SYMBOL
PARAMETER
WAVEFORM
CONDITION
UNIT
MIN
TYP
MAX
f
CK
Clock frequency
50
133
150
MHz
f
PHASERROR
Phase error
150
0
150
ps
f
SK
Output clock skew
200
ps
fdif
SK
Differential clock skew
100
ps
f
SL
Output clock skew
1
1.5
V/ns
Jitter
pp
Peak-to-Peak jitter
(long term)
100
100
ps
Jitter
cc
Cycle-to-cycle jitter
(short term)
>
100
<
100
ps
O/P
impedance
Inherent series
resistance
25
f
DC
Duty cycle
45
55
%
C
in
Input capacitance
2.5
4
pF
Sync time
100
s
NOTE:
1. Rise and fall
Philips Semiconductors
Preliminary specification
PCK857
66150MHz Phase Locked Loop Differential 1:10
SDRAM Clock Driver
1998 Dec 10
5
184/200-pin DDR SDRAM DIMM
SDRAM
SDRAM
SDRAM
SDRAM
SDRAM
SDRAM
SDRAM
SDRAM
SDRAM
The PLL clock distribution device and SSTL registered drivers reduce
signal loads on the memory controller and prevent timing delays and
waveform distortions that would cause unreliable operation
SW00393
CBT3857 (9)
CBT
CBT
CBT
CBT
CBT
CBT
CBT
CBT
CBT
SDRAM
SDRAM
SDRAM
SDRAM
SDRAM
SDRAM
SDRAM
SDRAM
SDRAM
SSTL16857
PCK857
SSTL16857
BACK SIDE
FRONT SIDE
AC WAVEFORMS
skew
ANY TWO OUTPUTS
SW00396
Figure 1. Skew between any two outputs.
t
1
t
2
45%
v
t
1
t
1
)
t
2
v
55%
SW00397
Figure 2. Duty cycle limits and measurement
Philips Semiconductors
Preliminary specification
PCK857
66150MHz Phase Locked Loop Differential 1:10
SDRAM Clock Driver
1998 Dec 10
6
t
1
t
2
| t
1
t
2
|
v
100pS
SW00398
Figure 3. Jitter limit and measurement
TEST CIRCUIT
60
25pF
Vt
+
V
DDQ
2
SW00399
V
t
Philips Semiconductors
Preliminary specification
PCK857
66150MHz Phase Locked Loop Differential 1:10 SDRAM
Clock Driver
1998 Dec 10
7
TSSOP48:
plastic thin shrink small outline package; 48 leads; body width 6.1mm
SOT362-1
Philips Semiconductors
Preliminary specification
PCK857
66150MHz Phase Locked Loop Differential 1:10
SDRAM Clock Driver
yyyy mmm dd
8
Definitions
Short-form specification -- The data in a short-form specification is extracted from a full data sheet with the same type number and title. For
detailed information see the relevant data sheet or data handbook.
Limiting values definition -- Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or
at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended
periods may affect device reliability.
Application information -- Applications that are described herein for any of these products are for illustrative purposes only. Philips
Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or
modification.
Disclaimers
Life support -- These products are not designed for use in life support appliances, devices or systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications
do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.
Right to make changes -- Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard
cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless
otherwise specified.
Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Sunnyvale, California 940883409
Telephone 800-234-7381
Copyright Philips Electronics North America Corporation 1998
All rights reserved. Printed in U.S.A.
Date of release: 12-98
Document order number:
9397-750-04949
Philips
Semiconductors
Data sheet
status
Objective
specification
Preliminary
specification
Product
specification
Product
status
Development
Qualification
Production
Definition
[1]
This data sheet contains the design target or goal specifications for product development.
Specification may change in any manner without notice.
This data sheet contains preliminary data, and supplementary data will be published at a later date.
Philips Semiconductors reserves the right to make chages at any time without notice in order to
improve design and supply the best possible product.
This data sheet contains final specifications. Philips Semiconductors reserves the right to make
changes at any time without notice in order to improve design and supply the best possible product.
Data sheet status
[1]
Please consult the most recently issued datasheet before initiating or completing a design.
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