ChipFind - документация

Электронный компонент: LPC2194

Скачать:  PDF   ZIP

Document Outline

LPC2194
Single-chip 16/32-bit microcontrollers; 256 kB ISP/IAP Flash
with 10-bit ADC and CAN
Rev. 01 -- 06 February 2004
Preliminary data
1.
General description
The LPC2194 is based on a 16/32 bit ARM7TDMI-STM CPU with real-time emulation
and embedded trace support, together with 256 kilobytes (kB) of embedded high
speed flash memory. A 128-bit wide memory interface and a unique accelerator
architecture enable 32-bit code execution at maximum clock rate. For critical code
size applications, the alternative 16-bit Thumb Mode reduces code by more than 30%
with minimal performance penalty.
With its compact 64 pin package, low power consumption, various 32-bit timers,
4-channel 10-bit ADC, 4 advanced CAN channels, PWM channels and 46 GPIO lines
with up to 9 external interrupt pins this microcontroller is particularly suitable for
automotive applications such as a CAN gateway that connects several CAN busses
or a CAN bridge between sub networks at different speeds. Sensors with CAN
interface or debugging via CAN are additional application that need more than 2 CAN
interfaces. It is also an adequate solution for industrial control, medical systems and
fault-tolerant maintenance buses. With a wide range of additional serial
communications interfaces, it is also suited for communication gateways and protocol
converters as well as many other general-purpose applications.
2.
Features
2.1 Key features
s
16/32-bit ARM7TDMI-S microcontroller in a tiny LQFP64 package.
s
16 kB on-chip Static RAM and 256 kB on-chip Flash Program Memory. 128-bit
wide interface/accelerator enables high speed 60 MHz operation.
s
In-System Programming (ISP) and In-Application Programming (IAP) via on-chip
boot-loader software. Flash programming takes 1 ms per 512 byte line. Single
sector or full chip erase takes 400 ms.
s
EmbeddedICE-RT and Embedded Trace interfaces offer real-time debugging with
on-chip RealMonitor software as well as high speed real-time tracing of instruction
execution.
s
Four interconnected CAN interfaces with advanced acceptance filters. Additional
serial interfaces are two UARTs (16C550), Fast I
2
C (400 kbits/s) and two SPIsTM.
s
Four channel 10-bit A/D converter with conversion time as low as 2.44
s.
s
Two 32-bit timers (with 4 capture and 4 compare channels), PWM unit (6 outputs),
Real Time Clock and Watchdog.
s
Vectored Interrupt Controller with configurable priorities and vector addresses.
s
Up to forty-six 5 V tolerant general purpose I/O pins. Up to 9 edge or level
sensitive external interrupt pins available.
s
Operating temperature range from
-
40
C to +105
C.
Philips Semiconductors
LPC2194
Single-chip 16/32-bit microcontrollers
Preliminary data
Rev. 01 -- 06 February 2004
2 of 33
9397 750 12757
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
s
60 MHz maximum CPU clock available from programmable on-chip
Phase-Locked Loop.
s
On-chip crystal oscillator with an operating range of 1 MHz to 30 MHz.
s
Two low power modes, Idle and Power-down.
s
Processor wake-up from Power-down mode via external interrupt.
s
Individual enable/disable of peripheral functions for power optimization.
s
Dual power supply:
x
CPU operating voltage range of 1.65 V to 1.95 V (1.8 V
0.15 V).
x
I/O power supply range of 3.0 V to 3.6 V (3.3 V
10%) with 5 V tolerant I/O
pads.
3.
Ordering information
3.1 Ordering options
Table 1:
Ordering information
Type number
Package
Name
Description
Version
LPC2194JBD64
LQFP64
plastic low profile quad flat package, 64 leads,
body 10
10
1.4 mm
SOT314-2
Table 2:
Part options
Type number
Flash memory
RAM
CAN
Temperature
range (
C)
LPC2194JBD64
256 kB
16 kB
4 channels
-
40 to +105
Philips Semiconductors
LPC2194
Single-chip 16/32-bit microcontrollers
Preliminary data
Rev. 01 -- 06 February 2004
3 of 33
9397 750 12757
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
4.
Block diagram
(1) When test/debug interface is used, GPIO/other function sharing these pins are not available.
Fig 1.
Block diagram.
INTERNAL
FLASH
CONTROLLER
002aaa756
AHB BRIDGE
EMULATION TRACE
MODULE
TEST/DEBUG
INTERFACE
AHB
DECODER
AHB TO VPB
BRIDGE
VPB
DIVIDER
VECTORED INTERRUPT
CONTROLLER
SYSTEM
FUNCTIONS
PLL
system
clock
SCL*
P0 (30 PINS)
P1.31:16
Ain3:0*
SDA*
TRST
(1)
TMS
(1)
TCK
(1)
TDI
(1)
TDO
(1)
RTCK
XTAL2
XTAL1
RST
V
3
V
1.8
V
SS
SCK*
MOSI*
MISO*
EINT0*
EINT1*
EINT2*
EINT3*
8 x CAP*
8 x MAT*
PWM1..6*
RD4:1*
TD4:1*
SSEL*
TxD0,1*
RxD0,1*
MODEM CONTROL
(6 PINS)*
SPI SERIAL
INTERFACE 0 & 1
I2C SERIAL
INTERFACE
UART0/UART1
REAL TIME CLOCK
WATCHDOG
TIMER
SYSTEM
CONTROL
EXTERNAL
INTERRUPTS
GENERAL
PURPOSE I/O
CAN INTERFACE
1, 2, 3 & 4
ACCEPTANCE FILTERS
CAPTURE/
COMPARE
TIMER0/TIMER1
PWM0
10-BIT
A/D CONVERTER
AMBA AHB
(Advanced High-performance Bus)
128/256 kB
FLASH
ARM7TDMI-S
INTERNAL SRAM
CONTROLLER
16 kB
SRAM
ARM7 LOCAL BUS
APB
*Shared with GPIO
Philips Semiconductors
LPC2194
Single-chip 16/32-bit microcontrollers
Preliminary data
Rev. 01 -- 06 February 2004
4 of 33
9397 750 12757
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
5.
Pinning information
5.1 Pinning
Fig 2.
Pinning.
LPC2194
002aaa755
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
P1.27/TD0
V
18A
XTAL1
XTAL2
P1.28/TDI
V
SSA
V
SSA_PLL
RESET
P1.29/TCK
P0.20/MAT1.3/SSEL1/EINT3
P0.19/MAT1.2/MOSI1/CAP1.2
P0.18/CAP1.3/MISO1/MAT1.3
P1.30/TMS
V
3
V
SS
V
18
V
18
V
SS
P0.0/TxD0/PWM1
P1.31/TRST
P0.1/RxD0/PWM3/EINT0
P0.2/SCL/CAP0.0
V
3
P1.26/RTCK
V
SS
P0.3/SDA/MAT0.0/EINT1
P0.4/SCK0/CAP0.1
P1.25/EXTIN0
P0.5/MISO0/MAT0.1
P0.6/MOSI0/CAP0.2
P0.7/SSEL0/PWM2/EINT2
P1.24/TRACECLK
P0.21/PWM5/RD3/CAP1.3
P0.22/TD3/CAP0.0/MAT0.0
P0.23/RD2
P1.19/TRACEPKT3
P0.24/TD2
VSS
V3A
P1.18/TRACEPKT2
P0.25/RD1
TD1
P0.27/AIN0/CAP0.1/MAT0.1
P1.17/TRACEPKT1
P0.28/AIN1/CAP0.2/MAT0.2
P0.29/AIN2/CAP0.3/MAT0.3
P0.30/AIN3/EINT3/CAP0.0
P1.16/TRACEPKT0
P1.20/TRACESYNC
P0.17/CAP1.2/SCK1/MAT1.2
P0.16/EINT0/MAT0.2/CAP0.2
P0.15/RI1/EINT2
P1.21/PIPESTAT0
V3
VSS
P0.14/DCD1/EINT1
P1.22/PIPESTAT1
P0.13/DTR1/MAT1.1/TD4
P0.12/DSR1/MAT1.0/RD4
P0.11/CTS1/CAP1.1
P1.23/PIPESTAT2
P0.10/RTS1/CAP1.0
P0.9/RxD1/PWM6/EINT3
P0.8/TxD1/PWM4
Philips Semiconductors
LPC2194
Single-chip 16/32-bit microcontrollers
Preliminary data
Rev. 01 -- 06 February 2004
5 of 33
9397 750 12757
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
5.2 Pin description
Table 3:
Pin description
Symbol
Pin
Type
Description
P0.0 to P0.31
19, 21, 22,
26, 27,
29-31, 33-35,
37-39, 41,
45-47, 53-55,
1-3, 5, 9, 11,
13-15
I/O
Port 0: Port 0 is a 32-bit bi-directional I/O port with individual direction
controls for each bit. The operation of port 0 pins depends upon the pin
function selected via the Pin Connect Block. Pins 26 and 31 of port 0 are not
available.
P0.0
19
O
TxD0 -- Transmitter output for UART0.
O
PWM1 -- Pulse Width Modulator output 1.
P0.1
21
I
RxD0 -- Receiver input for UART0.
O
PWM3 -- Pulse Width Modulator output 3.
I
EINT0 -- External interrupt 0 input
P0.2
22
I/O
SCL -- I
2
C clock input/output. Open drain output (for I
2
C compliance).
I
CAP0.0 -- Capture input for Timer0, channel 0.
P0.3
26
I/O
SDA -- I
2
C data input/output. Open drain output (for I
2
C compliance).
O
MAT0.0 -- Match output for Timer0, channel 0.
I
EINT1 -- External interrupt 1 input.
P0.4
27
I/O
SCK0 -- Serial clock for SPI0. SPI clock output from master or input to slave.
I
CAP0.1 -- Capture input for Timer0, channel 1.
P0.5
29
I/O
MISO0 -- Master In Slave OUT for SPI0. Data input to SPI master or data
output from SPI slave.
O
MAT0.1 -- Match output for Timer0, channel 1.
P0.6
30
I/O
MOSI0 -- Master Out Slave In for SPI0. Data output from SPI master or data
input to SPI slave.
I
CAP0.2 -- Capture input for Timer0, channel 2.
P0.7
31
I
SSEL0 -- Slave Select for SPI0. Selects the SPI interface as a slave.
O
PWM2 -- Pulse Width Modulator output 2.
I
EINT2 -- External interrupt 2 input.
P0.8
33
O
TxD1 -- Transmitter output for UART1.
O
PWM4 -- Pulse Width Modulator output 4.
P0.9
34
I
RxD1 -- Receiver input for UART1.
O
PWM6 -- Pulse Width Modulator output 6.
I
EINT3 -- External interrupt 3 input.
P0.10
35
O
RTS1 -- Request to Send output for UART1.
I
CAP1.0 -- Capture input for Timer1, channel 0.
P0.11
37
I
CTS1 -- Clear to Send input for UART1.