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Электронный компонент: 74ALVT162731

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Philips
Semiconductors
74ALVT162731
2.5V/3.3V 1-to-4 address register/driver
with 30
termination resistors (3-State)
Product specification
IC24 Data Handbook
1999 Mar 23
INTEGRATED CIRCUITS
Philips Semiconductors
Product specification
74ALVT162731
2.5V/3.3V 1-to-4 address register/driver with 30
termination resistors (3-State)
2
1999 Mar 23
853-2146 21078
FEATURES
5V I/O Compatible
3-State outputs
Output capability: +12 mA/-12 mA
Bus hold data inputs eliminate the need for external pull-up
resistors to hold unused inputs
Live insertion/extraction permitted
Power-up reset
Power-up 3-State
Positive edge triggered registers
Latch-up protection exceeds 500 mA per JEDEC JC40.2 Std 17
ESD protection exceeds 2000 V per MIL STD 883 Method 3015
and 200 V per machine model
Outputs include series resistance of 30
making external
termination resistors unnecessary
Bus hold data inputs eliminate the need for external pull-up
resistors to hold unused inputs
DESCRIPTION
The 74ALVT162731 is a high-performance BiCMOS product designed
for V
CC
operation at 2.5V to 3.3V with I/O compatibility up to 5V.
This device is a 1-to-4 address register/driver featuring non-inverting
3-State outputs. The state of the outputs are controlled by two
enable inputs (OE1 and OE2). Each enable input controls the state
of two of the four common outputs for each input. When an OEn
input is a logic High, the respective outputs will be in the high
impedance state. When an OEn input is a logic Low, the respective
outputs are active. The device can be configured for a transparent
mode from input to output or a register mode by the SEL input.
When SEL is a logic High the device is configured for transparent
mode and when SEL is a logic Low it is configured for register
mode. While in the register mode the output follows the input on the
rising edge of the CLK input. The function of the data registers is not
effected by either SEL or OEn.
The 74ALVT162731 is designed with 30
series resistance in both
the HIGH and LOW states of the output.
QUICK REFERENCE DATA
SYMBOL
PARAMETER
CONDITIONS
TYPICAL
UNIT
SYMBOL
PARAMETER
T
amb
= 25
C; GND = 0V
2.5V
3.3V
UNIT
t
PLH
t
PHL
Propagation delay
nAx to nYx
C
L
= 50pF
3.8
3.2
ns
C
IN
Input capacitance
V
I
= 0V or V
CC
3
3
pF
C
OUT
Output capacitance
Outputs disabled; V
O
= 0V or V
CC
9
9
pF
I
CCZ
Total supply current
Outputs disabled
40
60
A
ORDERING INFORMATION
PACKAGES
TEMPERATURE RANGE
OUTSIDE NORTH AMERICA
NORTH AMERICA
DWG NUMBER
56-Pin Plastic SSOP Type III
40
C to +85
C
74ALVT162731 DL
AV162731 DL
SOT371-1
56-Pin Plastic TSSOP Type II
40
C to +85
C
74ALVT162731 DGG
AV162731 DGG
SOT364-1
PIN DESCRIPTION
PIN NUMBER
SYMBOL
NAME AND FUNCTION
1, 4, 19, 25, 28, 32, 38, 41, 47, 53
GND
Ground
5, 6, 23, 24, 30, 31, 36, 37, 42, 43,
48, 49, 54, 55
1Y
n
, 2Y
n
Output, controlled by OE1
2, 3, 20, 21, 26, 27, 33, 34, 39, 40,
45, 46, 51, 52
3Y
n
,4Y
n
Output, controlled by OE2
7, 22, 29, 35, 44, 50, 56
V
CC
Positive power supply
8, 9, 10, 15, 16, 17, 18
A
n
Data inputs
14
SEL
Select input, controls mode of device
11
CLK
Clock input
12, 13
OE
n
Output enable
Philips Semiconductors
Product specification
74ALVT162731
2.5V/3.3V 1-to-4 address register/driver with 30
termination resistors (3-State)
1999 Mar 23
3
PIN CONFIGURATION
GND
3Y
3
V
CC
GND
4Y
1
GND
CLK
V
CC
V
CC
A
7
4Y
4
V
CC
V
CC
GND
V
cc
GND
GND
3Y
6
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
3Y
1
2Y
1
1Y
1
A
1
A
2
A
3
OE1
OE2
SEL
A
4
A
5
A
6
GND
4Y
7
3Y
7
2Y
7
1Y
7
4Y
6
1Y
2
2Y
2
4Y
2
3Y
2
1Y
3
2Y
3
GND
4Y
3
V
CC
1Y
4
2Y
4
GND
3Y
4
GND
1Y
5
2Y
5
3Y
5
4Y
5
1Y
6
2Y
6
SV01733
FUNCTION TABLE
INPUTS
OUTPUTS
OE
SEL
CLK
A
Y
H
X
X
X
Z
L
H
X
L
L
L
H
X
H
H
L
L
L
L
L
L
H
H
SCHEMATIC OF EACH OUTPUT
V
CC
V
CC
OUTPUT
27
27
SW00007
LOGIC DIAGRAM
SV01734
OE1
OE2
CLK
A1
SEL
CLK
To six other channels
1Y1
2Y1
3Y1
4Y1
Philips Semiconductors
Product specification
74ALVT162731
2.5V/3.3V 1-to-4 address register/driver with 30
termination resistors (3-State)
1999 Mar 23
4
ABSOLUTE MAXIMUM RATINGS
1, 2
SYMBOL
PARAMETER
CONDITIONS
RATING
UNIT
V
CC
DC supply voltage
-0.5 to +4.6
V
I
IK
DC input diode current
V
I
< 0
-50
mA
V
I
DC input voltage
3
-0.5 to +7.0
V
I
OK
DC output diode current
V
O
< 0
-50
mA
V
OUT
DC output voltage
3
Output in Off or High state
-0.5 to +7.0
V
I
OUT
DC output current
Output in Low state
128
mA
I
OUT
DC out ut current
Output in High state
-64
mA
T
stg
Storage temperature range
-65 to +150
C
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability.
2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction
temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150
C.
3. The input and output negative voltage ratings may be exceeded if the input and output clamp current ratings are observed.
RECOMMENDED OPERATING CONDITIONS
SYMBOL
PARAMETER
2.5V RANGE LIMITS
3.3V RANGE LIMITS
UNIT
SYMBOL
PARAMETER
MIN
MAX
MIN
MAX
UNIT
V
CC
DC supply voltage
2.3
2.7
3.0
3.6
V
V
I
Input voltage
0
5.5
0
5.5
V
V
IH
High-level input voltage
1.7
2.0
V
V
IL
Input voltage
0.7
0.8
V
I
OH
High-level output current
8
12
mA
I
OL
Low-level output current
8
12
mA
/
Input transition rise or fall rate; Outputs enabled
10
10
ns/V
T
amb
Operating free-air temperature range
40
+85
40
+85
C
Philips Semiconductors
Product specification
74ALVT162731
2.5V/3.3V 1-to-4 address register/driver with 30
termination resistors (3-State)
1999 Mar 23
5
DC ELECTRICAL CHARACTERISTICS (3.3V
"
0.3V RANGE)
LIMITS
SYMBOL
PARAMETER
TEST CONDITIONS
Temp = -40
C to +85
C
UNIT
MIN
TYP
1
MAX
V
IK
Input clamp voltage
V
CC
= 3.0V; I
IK
= 18mA
0.85
1.2
V
V
OH
High-level output voltage
V
CC
= 3 0V; I
OH
= 12mA
2 0
2 5
V
V
OH
High-level out ut voltage
V
CC
= 3.0V; I
OH
= 12mA
2.0
2.5
V
V
OL
Lowlevel output voltage
V
CC
= 3 0V; I
OL
= 12mA
0 5
0 8
V
V
OL
Lowlevel out ut voltage
V
CC
= 3.0V; I
OL
= 12mA
0.5
0.8
V
OL
g
CC
OL
V
RST
Power-up output low voltage
6
V
CC
= 3.6V; I
O
= 1mA; V
I
= V
CC
or GND
0.55
V
V
CC
= 3.6V; V
I
= V
CC
or GND
Control pins
0.1
1
I
I
Input leakage current
V
CC
= 0 or 3.6V; V
I
= 5.5V
0.1
10
A
I
I
In ut leakage current
V
CC
= 3.6V; V
I
= V
CC
Data pins
4
0.5
1
A
V
CC
= 3.6V; V
I
= 0
Data ins
4
0.1
-5
I
OFF
Off current
V
CC
= 0V; V
I
or V
O
= 0 to 4.5V
0.1
100
A
Bus Hold current
V
CC
= 3V; V
I
= 0.8V
75
130
I
HOLD
Bus Hold current
Data inputs
7
V
CC
= 3V; V
I
= 2.0V
75
140
A
Data inputs
7
V
CC
= 0V to 3.6V; V
CC
= 3.6V
500
I
EX
Current into an output in the
High state when V
O
> V
CC
V
O
= 5.5V; V
CC
= 3.0V
10
125
A
I
PU/PD
Power up/down 3-State output
current
3
V
CC
1.2V; V
O
= 0.5V to V
CC
; V
I
= GND or V
CC
OE/OE = Don't care
1
100
A
I
OZH
3-State output High current
V
CC
= 3.6V; V
O
= 3.0V; V
I
= V
IL
or V
IH
0.5
5
A
I
OZL
3-State output Low current
V
CC
= 3.6V; V
O
= 0.5V; V
I
= V
IL
or V
IH
0.5
5
A
I
CCH
V
CC
= 3.6V; Outputs High, V
I
= GND or V
CC,
I
O
=
0
0.05
0.1
I
CCL
Quiescent supply current
V
CC
= 3.6V; Outputs Low, V
I
= GND or V
CC,
I
O
=
0
7.0
9.0
mA
I
CCZ
V
CC
= 3.6V; Outputs Disabled; V
I
= GND or V
CC,
I
O
=0
5
0.06
0.1
I
CC
Additional supply current per
input pin
2
V
CC
= 3V to 3.6V; One input at V
CC
0.6V,
Other inputs at V
CC
or GND
0.04
0.4
mA
NOTES:
1. All typical values are at V
CC
= 3.3V and T
amb
= 25
C.
2. This is the increase in supply current for each input at the specified voltage level other than V
CC
or GND
3. This parameter is valid for any V
CC
between 0V and 1.2V with a transition time of up to 10msec. From V
CC
= 1.2V to V
CC
= 3.3V
0.3V a
transition time of 100
sec is permitted. This parameter is valid for T
amb
= 25
C only.
4. Unused pins at V
CC
or GND.
5. I
CCZ
is measured with outputs pulled up to V
CC
or pulled down to ground.
6. For valid test results, data must not be loaded into the flip-flops (or latches) after applying power.
7. This is the bus hold overdrive current required to force the input to the opposite logic state.