ChipFind - документация

Электронный компонент: SN54/74LS353

Скачать:  PDF   ZIP
5-510
FAST AND LS TTL DATA
DUAL 4-INPUT MULTIPLEXER
WITH 3-STATE OUTPUTS
The LSTTL/ MSI SN54/ 74LS353 is a Dual 4-Input Multiplexer with 3-state
outputs. It can select two bits of data from four sources using common select
inputs. The outputs may be individually switched to a high impedance state
with a HIGH on the respective Output Enable (E0) inputs, allowing the outputs
to interface directly with bus oriented systems. It is fabricated with the Schott-
ky barrier diode process for high speed and is completely compatible with all
TTL families.
Inverted Version of the SN54 / 74LS253
Schottky Process for High Speed
Multifunction Capability
Input Clamp Diodes Limit High Speed Termination Effects
CONNECTION DIAGRAM DIP (TOP VIEW)
NOTE:
The Flatpak version
has the same pinouts
(Connection Diagram) as
the Dual In-Line Package.
14
13
12
11
10
9
1
2
3
4
5
6
7
16
15
8
VCC
E0a
E0b S0
I3b I2b
I0b
I1b
Zb
S1
I3a
I2a I1a
I0a
Za GND
PIN NAMES
LOADING (Note a)
HIGH
LOW
S0, S1
Common Select Inputs
0.5 U.L.
0.25 U.L.
Multiplexer A
E0a
Output Enable (Active LOW) Input
0.5 U.L.
0.25 U.L.
I0A I3a
Multiplexer Inputs
0.5 U.L.
0.25 U.L.
Za
Multiplexer Output (Note b)
65 (25) U.L.
15 (7.5) U.L.
Multiplexer B
E0b
Output Enable (Active LOW) Input
0.5 U.L.
0.25 U.L.
I0b I3b
Multiplexer Inputs
0.5 U.L.
0.25 U.L.
Zb
Multiplexer Output (Note b)
65 (25) U.L.
15 (7.5) U.L.
NOTES:
a) 1 TTL Unit Load (U.L.) = 40
A HIGH/1.6 mA LOW.
b) The Output LOW drive factor is 7.5 U.L. for Military (54) and 15 U.L. for Commercial
(74) Temperature Ranges. The Output HIGH drive factor is 25 U.L. for Military and 65 U.L.
for Commercial Temperature Ranges.
SN54/74LS353
DUAL 4-INPUT MULTIPLEXER
WITH 3-STATE OUTPUTS
LOW POWER SCHOTTKY
ORDERING INFORMATION
SN54LSXXXJ
Ceramic
SN74LSXXXN
Plastic
SN74LSXXXD
SOIC
J SUFFIX
CERAMIC
CASE 620-09
N SUFFIX
PLASTIC
CASE 648-08
16
1
16
1
16
1
D SUFFIX
SOIC
CASE 751B-03
LOGIC SYMBOL
VCC = PIN 16
GND = PIN 8
1
6 5 4 3
10 11 12 13
14
2
7
9
E0a
E0b
Za
Zb
I0a I1a I2a I3a
S0
S1
I0b I1b I2b I3b
15
5-511
FAST AND LS TTL DATA
SN54/74LS353
LOGIC DIAGRAM
E0b
E0a
Za
Zb
I3b
I2b
I1b
I0b
S1
I3a
I2a
I1a
I0a
14
1
2
6
7
3
4
5
9
11
12
10
13
15
VCC = PIN 16
GND = PIN 8
= PIN NUMBERS
S0
FUNCTIONAL DESCRIPTION
The SN54 / 74LS353 contains two identical 4-input Multi-
plexers with 3-state outputs. They select two bits from four
sources selected by common select inputs (S0, S1). The
4-input multiplexers have individual Output Enable (E0a, E0b)
inputs which when HIGH, forces the outputs to a high
impedance (high Z) state.
The logic equations for the outputs are shown below:
Za = E0a
(I0a
S1
S0 + I1a
S1
S0 + I2a
S1
S0 + I3a
S1
S0)
Zb = E0b
(I0b
S1
S0 + I1b
S1
S0 + I2b
S1
S0 + I3b
S1
S0)
If the outputs of 3-state devices are tied together, all but one
device must be in the high impedance state to avoid high
currents that would exceed the maximum ratings. Designers
should ensure that Output Enable signals to 3-state devices
whose outputs are tied together are designed so that there is
no overlap.
TRUTH TABLE
SELECT
INPUTS
DATA INPUTS
OUTPUT
OUTPUT
INPUTS
DATA INPUTS
ENABLE
OUTPUT
S0
S1
I0
I1
I2
I3
E0
Z
X
X
X
X
X
X
H
(Z)
L
L
L
X
X
X
L
H
L
L
H
X
X
X
L
L
H
L
X
L
X
X
L
H
H
L
X
H
X
X
L
L
L
H
X
X
L
X
L
H
L
H
X
X
H
X
L
L
H
H
X
X
X
L
L
H
H
H
X
X
X
H
L
L
H = HIGH Level
L = LOW Level
X = Immaterial
(Z) = High Impedance (off)
Address inputs S0 and S1 are common to both sections.
5-512
FAST AND LS TTL DATA
SN54/74LS353
GUARANTEED OPERATING RANGES
Symbol
Parameter
Min
Typ
Max
Unit
VCC
Supply Voltage
54
74
4.5
4.75
5.0
5.0
5.5
5.25
V
TA
Operating Ambient Temperature Range
54
74
55
0
25
25
125
70
C
IOH
Output Current -- High
54
74
1.0
2.6
mA
IOL
Output Current -- Low
54
74
12
24
mA
DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE
(unless otherwise specified)
Symbol
Parameter
Limits
Unit
Test Conditions
Symbol
Parameter
Min
Typ
Max
Unit
Test Conditions
VIH
Input HIGH Voltage
2.0
V
Guaranteed Input HIGH Voltage for
All Inputs
VIL
Input LOW Voltage
54
0.7
V
Guaranteed Input LOW Voltage for
All Inputs
VIL
Input LOW Voltage
74
0.8
V
Guaranteed Input LOW Voltage for
All Inputs
VIK
Input Clamp Diode Voltage
0.65
1.5
V
VCC = MIN, IIN = 18 mA
VOH
Output HIGH Voltage
54
2.4
3.4
V
VCC = MIN, IOH = MAX, VIN = VIH
or VIL per Truth Table
VOH
Output HIGH Voltage
74
2.4
3.1
V
VCC = MIN, IOH = MAX, VIN = VIH
or VIL per Truth Table
VOL
Output LOW Voltage
QA QH
54, 74
0.25
0.4
V
IOL = 12 mA
VCC = VCC MIN,
VIN = VIL or VIH
per Truth Table
VOL
Output LOW Voltage
QA QH
74
0.35
0.5
V
IOL = 24 mA
VIN = VIL or VIH
per Truth Table
IOZH
Output Off Current HIGH
20
A
VCC = MAX, VOUT = 2.7 V
IOZL
Output Off Current LOW
20
A
VCC = MAX, VOUT = 0.4 V
IIH
Input HIGH Current
20
A
VCC = MAX, VIN = 2.7 V
IIH
Input HIGH Current
0.1
mA
VCC = MAX, VIN = 7.0 V
IIL
Input LOW Current
0.4
mA
VCC = MAX, VIN = 0.4 V
IOS
Short Circuit Current (Note 1)
20
130
mA
VCC = MAX
ICC
Power Supply Current
Total, Output 3-State
14
mA
VCC = MAX
ICC
Total, Output LOW
12
mA
VCC = MAX
Note 1: Not more than one output should be shorted at a time, nor for more than 1 second.
AC CHARACTERISTICS
(TA = 25
C, VCC = 5.0 V)
Symbol
Parameter
Limits
Unit
Test Conditions
Symbol
Parameter
Min
Typ
Max
Unit
Test Conditions
tPLH
tPHL
Propagation Delay,
Data to Output
11
13
25
20
ns
Figure 1
CL = 15 pF
tPLH
tPHL
Propagation Delay,
Select to Output
20
21
45
32
ns
Figure 1 or 2
CL = 15 pF
tPZH
Output Enable Time
to HIGH Level
11
23
ns
Figures 4, 5
CL = 15 pF
tPZL
Output Enable Time
to LOW Level
15
23
ns
Figures 3, 5
tPLZ
Output Disable Time
to LOW Level
12
27
ns
Figures 3, 5
CL = 5.0 pF
tPHZ
Output Disable Time
to HIGH Level
27
41
ns
Figures 4, 5
CL = 5.0 pF
1.3 V
1.3 V
1.3 V
1.3 V
VIN
VOUT
tPLH
tPHL
1.3 V
1.3 V
VIN
VOUT
1.3 V
tPLH
tPHL
1.3 V
Figure 1
Figure 2
Figure 5
3-STATE WAVEFORMS
AC LOAD CIRCUIT
Figure 3
Figure 4
1.5 V
1.5 V
1.5 V
1.5 V
1.5 V
1.5 V
1.5 V
1.5 V
VE
VE
VOUT
tPZL
tPLZ
VOL
0.5 V
VE
VE
VOUT
tPZH
tPHZ
0.5 V
VOH
SW2
CL*
5.0 k
SW1
VCC
RL
TO OUTPUT
UNDER TEST
SWITCH POSITIONS
* Includes Jig and Probe Capacitance.
5-513
FAST AND LS TTL DATA
SN54/74LS353
SYMBOL
SW1
SW2
tPZH
Open
Closed
tPZL
Closed
Open
tPLZ
Closed
Closed
tPHZ
Closed
Closed
5-514
FAST AND LS TTL DATA
MIN
MIN
MAX
MAX
MILLIMETERS
INCHES
DIM
A
B
C
D
F
G
J
K
M
P
R
9.80
3.80
1.35
0.35
0.40
0.19
0.10
0
5.80
0.25
10.00
4.00
1.75
0.49
1.25
0.25
0.25
7
6.20
0.50
0.386
0.150
0.054
0.014
0.016
0.008
0.004
0
0.229
0.010
0.393
0.157
0.068
0.019
0.049
0.009
0.009
7
0.244
0.019
1.27 BSC
0.050 BSC
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A AND B DO NOT INCLUDE MOLD
PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. 751B 01 IS OBSOLETE, NEW STANDARD
751B 03.
1
8
9
16
-A-
-B-
P
16 PL
D
-T-
K
C
G
M
R X 45
F
J
8 PL
SEATING
PLANE
Case 751B-03 D Suffix
16-Pin Plastic
SO-16
B
0.25 (0.010)
M
M
T
0.25 (0.010)
B
A
M
S
S
Case 648-08 N Suffix
16-Pin Plastic
MIN
MIN
MAX
MAX
MILLIMETERS
INCHES
DIM
A
B
C
D
F
G
H
J
K
L
M
S
18.80
6.35
3.69
0.39
1.02
0.21
2.80
7.50
0
0.51
19.55
6.85
4.44
0.53
1.77
0.38
3.30
7.74
10
1.01
0.740
0.250
0.145
0.015
0.040
0.008
0.110
0.295
0
0.020
0.770
0.270
0.175
0.021
0.070
0.015
0.130
0.305
10
0.040
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L" TO CENTER OF LEADS WHEN
FORMED PARALLEL.
4. DIMENSION B" DOES NOT INCLUDE MOLD
FLASH.
5. ROUNDED CORNERS OPTIONAL.
6. 648 01 THRU 07 OBSOLETE, NEW STANDARD
648 08.
2.54 BSC
1.27 BSC
0.100 BSC
0.050 BSC
-A-
B
1
8
9
16
F
H
G
D
16 PL
S
C
-T-
SEATING
PLANE
K
J
M
L
T A
0.25 (0.010)
M
M
Case 620-09 J Suffix
16-Pin Ceramic Dual In-Line
MIN
MIN
MAX
MAX
MILLIMETERS
INCHES
DIM
19.05
6.10
0.39
1.40
0.23
0
0.39
19.55
7.36
4.19
0.53
1.77
0.27
5.08
15
0.88
0.750
0.240
0.015
0.055
0.009
0
0.015
0.770
0.290
0.165
0.021
0.070
0.011
0.200
15
0.035
1.27 BSC
2.54 BSC
7.62 BSC
0.050 BSC
0.100 BSC
0.300 BSC
A
B
C
D
E
F
G
J
K
L
M
N
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEAD WHEN
FORMED PARALLEL.
4. DIM F MAY NARROW TO 0.76 (0.030) WHERE
THE LEAD ENTERS THE CERAMIC BODY.
5. 620 01 THRU 08 OBSOLETE, NEW STANDARD
620 09.
-B-
-A-
16 PL
-T-
C
D
E
F
G
J
K
M
N
SEATING
PLANE
16 PL
L
16
9
1
8
0.25 (0.010)
T A
M
S
0.25 (0.010)
T B
M
S
5-515
FAST AND LS TTL DATA
Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit,
and specifically disclaims any and all liability, including without limitation consequential or incidental damages. "Typical" parameters can and do vary in different
applications. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. Motorola does
not convey any license under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in
systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of
the Motorola product could create a situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any such
unintended or unauthorized application, Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless
against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part.
Motorola and
are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer.
Literature Distribution Centers:
USA: Motorola Literature Distribution; P.O. Box 20912; Phoenix, Arizona 85036.
EUROPE: Motorola Ltd.; European Literature Centre; 88 Tanners Drive, Blakelands, Milton Keynes, MK14 5BP, England.
JAPAN: Nippon Motorola Ltd.; 4-32-1, Nishi-Gotanda, Shinagawa-ku, Tokyo 141, Japan.
ASIA PACIFIC: Motorola Semiconductors H.K. Ltd.; Silicon Harbour Center, No. 2 Dai King Street, Tai Po Industrial Estate, Tai Po, N.T., Hong Kong.