ChipFind - документация

Электронный компонент: MAX9218

Скачать:  PDF   ZIP
General Description
The MAX9218 digital video serial-to-parallel converter
deserializes a total of 27 bits during data and control
phases. In the data phase, the LVDS serial input is con-
verted to 18 bits of parallel video data and in the control
phase, the input is converted to 9 bits of parallel control
data. The separate video and control phases take
advantage of video timing to reduce the serial data rate.
The MAX9218 pairs with the MAX9217 serializer to form
a complete digital video transmission system.
Proprietary data decoding reduces EMI and provides
DC balance. The DC balance allows AC-coupling, pro-
viding isolation between the transmitting and receiving
ends of the interface. The MAX9218 features a selec-
table rising or falling output latch edge.
ESD tolerance is specified for ISO 10605 with 10kV
contact discharge and 30kV air discharge.
The MAX9218 operates from a +3.3V core supply and
features a separate output supply for interfacing to 1.8V
to 3.3V logic-level inputs. This device is available in 48-
lead Thin QFN and TQFP packages and is specified
from -40C to +85C.
Applications
Navigation System Display
In-Vehicle Entertainment System
Video Camera
LCD Displays
Features
Proprietary Data Decoding for DC Balance and
Reduced EMI
Control Data Deserialized During Video Blanking
 Five Control Data Inputs Are Single Bit-Error
Tolerant
Output Transition Time Is Scaled to Operating
Frequency for Reduced EMI
Staggered Output Switching Reduces EMI
 Output Enable Allows Busing of Outputs
 Clock Pulse Stretch on Lock
 Wide 2% Reference Clock Tolerance
 Synchronizes to MAX9217 Serializer Without
External Control
ISO 10605 ESD Protection
 Separate Output Supply Allows Interface to 1.8V
to 3.3V Logic
+3.3V Core Power Supply
 Space-Saving Thin QFN and TQFP Packages
 -40C to +85C Operating Temperature
MAX9218
27-Bit, 3MHz-to-35MHz
DC-Balanced LVDS Deserializer
________________________________________________________________ Maxim Integrated Products
1
RGB_OUT7
RGB_OUT6
RGB_OUT5
RGB_OUT4
RGB_OUT3
RGB_OUT2
RGB_OUT1
RGB_OUT0
PCLK_OUT
LOCK
V
CCO
V
CCO
GND
R/F
RNG1
V
CCLVDS
IN+
IN-
LVDS GND
PLL GND
V
CCPLL
RNG0
GND
V
CC
REFCLK
1
2
3
4
5
6
7
8
9
10
11
12
36
35
34
33
32
31
30
29
28
27
26
25
PWRDWN
OUTEN
CNTL_OUT0
CNTL_OUT1
CNTL_OUT2
CNTL_OUT3
CNTL_OUT4
CNTL_OUT5
CNTL_OUT6
CNTL_OUT7
CNTL_OUT8
DE_OUT
TQFP
MAX9218
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
RGB_OUT17
RGB_OUT16
RGB_OUT15
RGB_OUT14
RGB_OUT13
RGB_OUT12
RGB_OUT11
RGB_OUT10
RGB_OUT9
RGB_OUT8
V
CCO
V
CCO
GND
RGB_OUT7
RGB_OUT6
RGB_OUT4
RGB_OUT3
RGB_OUT0
PCLK_OUT
LOCK
V
CCO
GND
V
CCO
RGB_OUT2
RGB_OUT1
RGB_OUT5
V
CCLVDS
IN+
IN-
LVDS GND
PLL GND
V
CCPLL
RNG0
REFCLK
GND
V
CC
RNG1
R/F
1
2
3
4
5
6
7
8
9
10
11
12
36
35
34
33
32
31
30
29
28
27
26
25
CNTL_OUT2
CNTL_OUT3
CNTL_OUT4
CNTL_OUT6
DE_OUT
CNTL_OUT8
CNTL_OUT7
CNTL_OUT1
CNTL_OUT0
OUTEN
PWRDWN
RGB_OUT16
RGB_OUT15
RGB_OUT14
RGB_OUT13
RGB_OUT12
RGB_OUT11
RGB_OUT10
RGB_OUT9
RGB_OUT8
V
CCO
GND
V
CCO
RGB_OUT17
THIN QFN-EP
MAX9218
CNTL_OUT5
TOP VIEW
48
47
46
45
44
43
42
41
40
39
38
37
13
14
15
16
17
18
19
20
21
22
23
24
PART
TEMP RANGE
PIN-PACKAGE
PKG
CODE
MAX9218ECM
-40
C to +85C 48 TQFP
C48-5
MAX9218ETM
-40
C to +85C 48 Thin QFN-EP*
T4866-1
Pin Configurations
Ordering Information
19-3557; Rev 1; 4/05
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim's website at www.maxim-ic.com.
*EP = Exposed pad.
MAX9218
27-Bit, 3MHz-to-35MHz
DC-Balanced LVDS Deserializer
2
_______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
DC ELECTRICAL CHARACTERISTICS
(V
CC_
= +3.0V to +3.6V, PWRDWN = high, differential input voltage
V
ID
= 0.05V to 1.2V, input common-mode voltage V
CM
=
V
ID
/2
to V
CC
-
V
ID
/2
, T
A
= -40C to +85C, unless otherwise noted. Typical values are at V
CC_
= +3.3V,
V
ID
= 0.2V, V
CM
= 1.2V,
T
A
= +25C.) (Notes 1, 2)
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
V
CC_
to _GND........................................................-0.5V to +4.0V
Any Ground to Any Ground...................................-0.5V to +0.5V
IN+, IN- to LVDS GND...........................................-0.5V to +4.0V
IN+, IN- Short Circuit to LVDS GND or V
CCLVDS
......Continuous
(R/F, OUTEN, RNG_, REFCLK,
PWRDWN) to GND .................................-0.5V to (V
CC
+ 0.5V)
(RGB_OUT[17:0], CNTL_OUT[8:0], DE_OUT, PCLK_OUT,
LOCK) to V
CCO
GND ...........................-0.5V to (V
CCO
+ 0.5V)
Continuous Power Dissipation (T
A
= +70C)
48-Lead Thin QFN (derate 37mW/C above +70C) .2963mW
48-Lead TQFP (derate 20.8mW/C above +70C) ....1667mW
ESD Protection
Human Body Model (R
D
= 1.5k
, C
S
= 100pF)
All Pins to GND...........................................................
3.0kV
ISO 10605 (R
D
= 2k
, C
S
= 330pF)
Contact Discharge (IN+, IN-) to GND ............................
10kV
Air Discharge (IN+, IN-) to GND ....................................
30kV
Storage Temperature Range .............................-65C to +150C
Junction Temperature ......................................................+150C
Lead Temperature (soldering, 10s) .................................+300C
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
SINGLE-ENDED INPUTS (R/F, OUTEN, RNG0, RNG1, REFCLK, PWRDWN)
High-Level Input Voltage
V
IH
2.0
V
CC
+ 0.3
V
Low-Level Input Voltage
V
IL
-0.3
+0.8
V
Input Current
I
IN
V
IN
= -0.3V to (V
CC
+ 0.3V),
PWRDWN = high or low
-70
+70
A
Input Clamp Voltage
V
CL
I
CL
= -18mA
-1.5
V
SINGLE-ENDED OUTPUTS (RGB_OUT[17:0], CNTL_OUT[8:0], DE_OUT, PCLK_OUT, LOCK)
I
OH
= -100A
V
CCO
- 0.1
I
OH
= -2mA,
RNG1, RNG0 = high
V
CCO
- 0.35
High-Level Output Voltage
V
OH
I
OH
= -2mA, RNG1, RNG0 both not high
simultaneously
V
CCO
- 0.4
V
I
OL
= 100A
0.1
I
OL
= 2mA,
RNG1, RNG0 = high
0.3
Low-Level Output Voltage
V
OL
I
OL
= 2mA, RNG1, RNG0 both not high
simultaneously
0.35
V
High-Impedance Output Current
I
OZ
PWRDWN = low or OUTEN = low,
V
O
= -0.3V to V
CCO
+ 0.3V
-10
+10
A
MAX9218
27-Bit, 3MHz-to-35MHz
DC-Balanced LVDS Deserializer
_______________________________________________________________________________________
3
DC ELECTRICAL CHARACTERISTICS (continued)
(V
CC_
= +3.0V to +3.6V, PWRDWN = high, differential input voltage
V
ID
= 0.05V to 1.2V, input common-mode voltage V
CM
=
V
ID
/2
to V
CC
-
V
ID
/2
, T
A
= -40C to +85C, unless otherwise noted. Typical values are at V
CC_
= +3.3V,
V
ID
= 0.2V, V
CM
= 1.2V,
T
A
= +25C.) (Notes 1, 2)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
RNG1, RNG0 = high, V
O
= 0
-10
-50
Output Short-Circuit Current
I
OS
RNG1, RNG0 both not high
simultaneously, V
O
= 0
-7
-40
mA
LVDS INPUT (IN+, IN-)
Differential Input High Threshold
V
TH
50
mV
Differential Input Low Threshold
V
TL
-50
mV
Input Current
I
IN+,
I
IN-
PWRDWN = high or low
-20
+20
A
PWRDWN = high or low
35
50
65
k
Input Bias Resistor
R
IB
V
CC_
= 0 or open,
PWRDWN = 0 or open, Figure 1
35
50
65
k
Power-Off Input Current
I
INO+,
I
INO-
V
CC_
= 0 or open,
PWRDWN = 0 or open
-40
+40
A
POWER SUPPLY
3MHz
20
RNG1 = low,
RNG0 = low
7MHz
35
7MHz
25
RNG1 = high,
RNG0 = low
15MHz
47
15MHz
37
Worst-Case Supply Current
I
CCW
C
L
= 8pF,
worst-case
pattern,
Figure 2
RNG1 = high,
RNG0 = high
35MHz
70
mA
Power-Down Supply Current
I
CCZ
(Note 3)
50
A
MAX9218
27-Bit, 3MHz-to-35MHz
DC-Balanced LVDS Deserializer
4
_______________________________________________________________________________________
Note 1: Current into a pin is defined as positive. Current out of a pin is defined as negative. All voltages are referenced to ground
except V
TH
and V
TL
.
Note 2: Maximum and minimum limits over temperature are guaranteed by design and characterization. Devices are production
tested at T
A
= +25C.
Note 3: All LVTTL/LVCMOS inputs, except PWRDWN at
0.3V or V
CC
- 0.3V. PWRDWN is
0.3V.
Note 4: AC parameters are guaranteed by design and characterization, and are not production tested. Limits are set at
6 sigma.
Note 5: C
L
includes probe and test jig capacitance.
AC ELECTRICAL CHARACTERISTICS
(V
CC_
= +3.0V to 3.6V, C
L
= 8pF, PWRDWN = high, differential input voltage
V
ID
= 0.1V to 1.2V, input common-mode voltage
V
CM
=
V
ID
/2
to V
CC
-
V
ID
/2
, T
A
= -40C to +85C, unless otherwise noted. Typical values are at V
CC_
= +3.3V,
V
ID
= 0.2V, V
CM
=
1.2V, T
A
= +25C.) (Notes 4, 5)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
REFCLK TIMING REQUIREMENTS
Period
t
T
28.57
333.00
ns
Frequency
f
CLK
3
35
MHz
Frequency Variation
f
CLK
REFCLK to serializer PCLK_IN
-2.0
+2.0
%
Duty Cycle
DC
40
50
60
%
Transition Time
t
TRAN
20% to 80%
6
ns
SWITCHING CHARACTERISTICS
RNG1, RNG0 = high
3.2
4.4
Output Rise Time
t
R
Figure 3
RNG1, RNG0 both not high
simultaneously
3.8
5.5
ns
RNG1, RNG0 = high
2.7
4.5
Output Fall Time
t
F
Figure 3
RNG1, RNG0 both not high
simultaneously
3.6
5.3
ns
PCLK_OUT High Time
t
HIGH
Figure 4
0.4 x
t
T
0.45 x
t
T
0.6 x
t
T
ns
PCLK_OUT Low Time
t
LOW
Figure 4
0.4 x
t
T
0.45 x
t
T
0.6 x
t
T
ns
Data Valid Before PCLK_OUT
t
DVB
Figure 5
0.35 x t
T
0.4 x t
T
ns
Data Valid After PCLK_OUT
t
DVA
Figure 5
0.35 x t
T
0.4 x t
T
ns
Input-to-Output Delay
t
DELAY
Figure 6
2.575 x
t
T
+
8.5
2.725 x
t
T
+
12.8
ns
PLL Lock to REFCLK
t
PLLREF
Figure 7
16385 x
t
T
ns
Power-Down Delay
t
PDD
Figure 7
100
ns
Output Enable Time
t
OE
Figure 8
30
ns
Output Disable Time
t
OZ
Figure 9
30
ns
MAX9218
27-Bit, 3MHz-to-35MHz
DC-Balanced LVDS Deserializer
_______________________________________________________________________________________
5
WORST-CASE PATTERN
SUPPLY CURRENT vs. FREQUENCY
MAX9218 toc01
FREQUENCY (MHz)
SUPPLY CURRENT (mA)
31
27
7
11
15
19
23
10
20
30
40
50
60
70
80
0
3
35
OUTPUT TRANSITION TIME
vs. OUTPUT SUPPLY VOLTAGE (V
CCO
)
MAX9218 toc02
OUTPUT SUPPLY VOLTAGE (V)
OUTPUT TRANSITION TIME (ns)
3.0
2.7
2.4
2.1
1
2
3
4
5
6
7
0
1.8
3.3
RNG1 = RNG0 = HIGH
t
R
t
F
OUTPUT TRANSITION TIME
vs. OUTPUT SUPPLY VOLTAGE (V
CCO
)
MAX9218 toc03
OUTPUT SUPPLY VOLTAGE (V)
OUTPUT TRANSITION TIME (ns)
3.0
2.7
2.4
2.1
1
2
3
4
5
6
7
0
1.8
3.3
RNG1 = RNG0 = BOTH NOT HIGH
t
R
t
F
BIT-ERROR RATE
vs. CABLE LENGTH
MAX9218 toc04
CAT5e CABLE LENGTH (m)
BIT-ERROR RATE
16
12
8
4
10
-11
10
-12
10
-13
10
-14
10
-10
0
20
35MHz CLOCK
700Mbps DATA RATE
FOR <12m, BER < 10
-12
CAT5e
Typical Operating Characteristics
(V
CC
_ = +3.3V, C
L
= 8pF, T
A
= +25C, unless otherwise noted.)