_______________General Description

The MAX5150/MAX5151 low-power, serial, voltage-out-
put, dual 13-bit digital-to-analog converters (DACs)
consume only 500µA from a single +5V (MAX5150) or
+3V (MAX5151) supply. These devices feature Rail-to-
Rail

output swing and are available in a space-saving

16-pin QSOP package. To maximize the dynamic
range, the DAC output amplifiers are configured with an
internal gain of +2.

The 3-wire serial interface is SPITM/QSPITM and
MicrowireTM compatible. Each DAC has a double-
buffered input organized as an input register followed
by a DAC register, which allows the input and DAC reg-
isters to be updated independently or simultaneously
with a 16-bit serial word. Additional features include
programmable shutdown (2µA), hardware-shutdown
lockout, a separate reference voltage input for each
DAC that accepts AC and DC signals, and an active-
low clear input (CL) that resets all registers and DACs
to zero. These devices provide a programmable logic
pin for added functionality, and a serial-data output pin
for daisy-chaining.

________________________Applications

Industrial Process Control

Remote Industrial Controls

Digital Offset and Gain

Microprocessor-

Adjustment

Controlled Systems

Motion Control

Automatic Test
Equipment (ATE)

____________________________Features

13-Bit Dual DAC with Internal Gain of +2

Rail-to-Rail Output Swing

16µs Settling Time

Single-Supply Operation: +5V (MAX5150)

+3V (MAX5151)

Low Quiescent Current: 500µA (normal operation)

2µA (shutdown mode)

SPI/QSPI and Microwire Compatible

Available in Space-Saving 16-Pin QSOP Package

Power-On Reset Clears Registers and DACs
to Zero

Adjustable Output Offset

MAX5150/MAX5151

Low-Power, Dual, 13-Bit Voltage-Output DACs

with Serial Interface

________________________________________________________________

Maxim Integrated Products

19-1255; Rev 0; 8/97

______________Ordering Information

Rail-to-Rail is a registered trademark of Nippon Motorola Ltd.

SPI and QSPI are trademarks of Motorola, Inc.
Microwire is a trademark of National Semiconductor Corp.

For free samples & the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800
For small orders, phone 408-737-7600 ext. 3468.

REFA

AGND

DGND

PDL

DOUT

16-BIT

SHIFT

SERIAL

CONTROL

INPUT
REG A

SCLK

UPO

REFB

DIN

DAC A

DAC B

OUTB

FBB

OUTA

FBA

DAC

REG A

INPUT
REG B

LOGIC

OUTPUT

DECODE

CONTROL

DAC

REG B

MAX5150
MAX5151

_________________________________________________________Functional Diagram

Ordering Information continued at end of data sheet.

Dice are tested at T

= +25°C, DC parameters only.

INL

(LSB)

PIN-PACKAGE

TEMP. RANGE

PART

±1

±1/2

±1

±1/2

16 QSOP

16 Plastic DIP

0°C to +70°C

MAX5150BCEE

MAX5150ACEE

MAX5150BCPE

MAX5150

ACPE

Pin Configuration appears at end of data sheet.

±1

Dice*

0°C to +70°C

MAX5150BC/D

MAX5150/MAX5151

Low-Power, Dual, 13-Bit Voltage-Output DACs
with Serial Interface

_______________________________________________________________________________________

ABSOLUTE MAXIMUM RATINGS

ELECTRICAL CHARACTERISTICS--MAX5150

= +5V ±10%, V

REFA

= V

REFB

= 2.048V, R

= 10k

, C

= 100pF, T

= T

MIN

to T

MAX

, unless otherwise noted. Typical values are

at T

= +25°C (OS_ tied to AGND for a gain of +2).)

Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.

to AGND............................................................-0.3V to +6V

to DGND ...........................................................-0.3V to +6V

AGND to DGND ..................................................................±0.3V
OSA, OSB to AGND........................(AGND - 4V) to (V

+ 0.3V)

REF_, OUT_ to AGND.................................-0.3V to (V

+ 0.3V)

Digital Inputs (SCLK, DIN, CS, CL, PDL)

to DGND ..............................................................-0.3V to +6V

Digital Outputs (DOUT, UPO)

to DGND ................................................-0.3V to (V

+ 0.3V)

Maximum Current into Any Pin .........................................±20mA
Continuous Power Dissipation (T

= +70°C)

Plastic DIP (derate 10.5mW/°C above +70°C) ...........842mW
QSOP (derate 8.30mW/°C above +70°C) ...................667mW
CERDIP (derate 10.00mW/°C above +70°C) ..............800mW

Operating Temperature Ranges

MAX515_ _C_ E .................................................0°C to +70°C
MAX515_ _E_ E ..............................................-40C° to +85°C
MAX515_ _MJE.............................................-55°C to +125°C

(Note 1)

Input code = 0000 hex,
V

REF_

= (V

- 1.4Vp-p) at 1kHz

Input code = 1FFF hex,
V

REF_

= 0.67Vp-p at 2.5V

4.5V

5.5V

Minimum with code 1555 hex

Normalized to 2.048V

Guaranteed monotonic

Code = 12

Normalized to 2.048V

-82

Reference Feedthrough

kHz

300

Reference 3dB Bandwidth

REF

Reference Input Resistance

REF

Reference Input Range

- 1.4

±1

LSB

±1/2

INL

Bits

Resolution

Integral Nonlinearity

PSRR

Power-Supply

Rejection Ratio

µV/V

260

ppm/°C

Gain-Error Tempco

LSB

±1

DNL

Differential Nonlinearity

±6

Vos

Offset Error

ppm/°C

TCVos

Offset Tempco

-0.2

±3

Gain Error

MAX5150A

MAX5150B

CONDITIONS

UNITS

MIN

TYP

MAX

SYMBOL

PARAMETER

Input code = 1FFF hex,
V

REF_

= 1Vp-p at 1.25V

, f = 25kHz

SINAD

Signal-to-Noise plus
Distortion Ratio

CL, PDL, CS, DIN, SCLK

0.8

Input Low Voltage

= 0V to V

µA

0.001

±1

Input Leakage Current

Input Capacitance

200

HYS

Input Hysteresis

CL, PDL, CS, DIN, SCLK

3.0

Input High Voltage

REFERENCE INPUT

STATIC PERFORMANCE--ANALOG SECTION

MULTIPLYING-MODE PERFORMANCE

DIGITAL INPUTS

MAX5150/MAX5151

Low-Power, Dual, 13-Bit Voltage-Output DACs

with Serial Interface

_______________________________________________________________________________________

ELECTRICAL CHARACTERISTICS--MAX5150 (continued)

= +5V ±10%, V

REFA

= V

REFB

= 2.048V, R

= 10k

, C

= 100pF, T

= T

MIN

to T

MAX

, unless otherwise noted. Typical values are

at T

= +25°C (OS_ tied to AGND for a gain of +2).)

CONDITIONS

Rail-to-rail (Note 2)

To 1/2LSB of full-scale, V

STEP

= 4V

SOURCE

= 2mA

UNITS

SINK

= 2mA

OSA or OSB Input Resistance

0 to V

Output Voltage Swing

µs

Output Settling Time

V/µs

0.75

Voltage Output Slew Rate

Output Low Voltage

0.13

0.4

MIN

TYP

MAX

SYMBOL

PARAMETER

Output High Voltage

DD -

0.5

µs

Time Required to Exit Shutdown

CS = V

, f

DIN

= 100kHz, V

SCLK

= 5Vp-p

nV-s

Digital Feedthrough

nV-s

Digital Crosstalk

4.5

5.5

Positive Supply Voltage

(Note 3)

0.5

0.65

Power-Supply Current

(Note 3)

µA

DD (SHDN)

Power-Supply Current
in Shutdown

µA

±1

Reference Current in Shutdown

100

SCLK Clock Period

SCLK Pulse Width High

SCLK Pulse Width Low

CSS

CS Fall to SCLK Rise
Setup Time

CSH

SCLK Rise to CS Rise Hold Time

SDI Setup Time

SDI Hold Time

LOAD

= 200pF

DO1

SCLK Rise to DOUT
Valid Propagation Delay

Note 1:

Accuracy is specified from code 12 to code 8191.

Note 2:

Accuracy is better than 1LSB for V

OUT

_ greater than 6mV and less than V

- 50mV. Guaranteed by PSRR test at the end

points.

Note 3:

Digital inputs are set to either V

or DGND, code = 0000 hex, R

LOAD

= 200pF

DO2

SCLK Fall to DOUT
Valid Propagation Delay

CS1

CS Rise to SCLK Rise Hold

100

CSW

CS Pulse Width High

CS0

SCLK Rise to CS Fall Delay

DYNAMIC PERFORMANCE

POWER SUPPLIES

DIGITAL OUTPUTS

TIMING CHARACTERISTICS

Resolution

MAX5150/MAX5151

Low-Power, Dual, 13-Bit Voltage-Output DACs
with Serial Interface

_______________________________________________________________________________________

ELECTRICAL CHARACTERISTICS--MAX5151

= +2.7V to +3.6V, V

REFA

= V

REFB

= 1.25V, R

= 10k

, C

= 100pF, T

= T

MIN

to T

MAX

, unless otherwise noted. Typical values

are at T

= +25°C (OS_ pins tied to AGND for a gain of +2).)

nV-s

Digital Crosstalk

CS = V

, f

DIN

= 100kHz, V

SCLK

= 3Vp-p

nV-s

Digital Feedthrough

µs

Time Required for Valid
Operation after Shutdown

Input code = 1FFF hex,
V

REF_

= 1Vp-p at 1V

, f = 15kHz

SINAD

Signal-to-Noise plus
Distortion Ratio

(Note 4)

Input code = 0000 hex,
V

REF_

= (V

- 1.4)Vp-p at 1kHz

Input code = 1FFF hex,
V

REF_

= 0.67Vp-p at 0.75V

CL, PDL, CS, DIN, SCLK

2.7V

3.6V

Minimum with code 1555 hex

Normalized to 1.25V

Guaranteed monotonic

Code = 20

Normalized to 1.25V

0.8

VIL

Input Low Voltage

= 0V to V

µA

±1

IIN

Input Leakage Current

Input Capacitance

200

VHYS

Input Hysteresis

CL, PDL, CS, DIN, SCLK

-82

Reference Feedthrough

kHz

300

Reference 3dB Bandwidth

2.2

VIH

Input High Voltage

REF

Reference Input Resistance

±2

MAX5151A

MAX5151B

LSB

±1

INL

Bits

Integral Nonlinearity

PSRR

Power-Supply

Rejection Ratio

µV/V

320

ppm/°C

6.5

Gain-Error Tempco

LSB

±1

DNL

Differential Nonlinearity

±6

Vos

Offset Error

ppm/°C

6.5

TCVos

Offset Tempco

-0.2

±5

Gain Error

Rail-to-rail (Note 5)

SOURCE

= 2mA

OSA or OSB Input Resistance

0 to V

Output Voltage Swing

- 0.5

VOH

Output High Voltage

CONDITIONS

UNITS

MIN

TYP

MAX

SYMBOL

PARAMETER

REF

Reference Input Range

- 1.4

DIGITAL OUTPUTS

SINK

= 2mA

0.13

0.4

VOL

Output Low Voltage

To 1/2LSB of full-scale, V

STEP

= 2.5V

µs

Output Settling Time

V/µs

0.75

Voltage Output Slew Rate

REFERENCE INPUT (VREF)

MULTIPLYING-MODE PERFORMANCE

DIGITAL INPUTS

STATIC PERFORMANCE--ANALOG

DYNAMIC PERFORMANCE

MAX5150/MAX5151

Low-Power, Dual, 13-Bit Voltage-Output DACs

with Serial Interface

_______________________________________________________________________________________

Note 4:

Accuracy is specified from code 20 to code 8191.

Note 5:

Accuracy is better than 1LSB for V

OUT

greater than 6mV and less than V

- 80mV. Guaranteed by PSRR test at the end

points.

Note 6:

Digital inputs are set to either V

or DGND, code = 0000 hex, R

ELECTRICAL CHARACTERISTICS--MAX5151 (continued)

= +2.7V to +3.6V, V

REFA

= V

REFB

= 1.25V, R

= 10k

, C

= 100pF, T

= T

MIN

to T

MAX

, unless otherwise noted. Typical values

are at T

= +25°C (OS_ pins tied to AGND for a gain of +2).)

LOAD

= 200pF

120

DO2

SCLK Fall to DOUT Valid
Propagation Delay

100

CSW

CS Pulse Width High

CS1

CS Rise to SCLK Rise Hold

CS0

SCLK Rise to CS Fall Delay

CONDITIONS

UNITS

(Note 6)

0.45

0.6

Power-Supply Current

(Note 6)

µA

DD (SHDN)

Power-Supply Current
in Shutdown

µA

MIN

TYP

MAX

±1

Reference Current in Shutdown

100

SYMBOL

PARAMETER

SCLK Clock Period

SCLK Pulse Width High

SCLK Pulse Width Low

CSS

CS Fall to SCLK Rise
Setup Time

CSH

SCLK Rise to CS Rise Hold Time

SDI Setup Time

SDI Hold Time

LOAD

= 200pF

120

DO1

SCLK Rise to DOUT Valid
Propagation Delay

2.7

3.6

Positive Supply Voltage

POWER SUPPLIES

TIMING CHARACTERISTICS

MAX5150/MAX5151

Low-Power, Dual, 13-Bit Voltage-Output DACs
with Serial Interface

_______________________________________________________________________________________

__________________________________________Typical Operating Characteristics

= +5V, R

= 10k

, C

= 100pF, OS_ pins tied to AGND, unless otherwise noted.)

-20

-16

-18

-12

-14

-8

-10

-6

-2

-4

370

740

1110

1480

1850

REFERENCE VOLTAGE INPUT

FREQUENCY RESPONSE

MAX5150/5151-01

FREQUENCY (kHz)

RELATIVE OUTPUT (dB)

REF

= 0.67Vp-p @ 2.5V

CODE = 1FFF (HEX)

400

450

550

500

650

600

700

-55

-15

-35

105

125

SUPPLY CURRENT vs. TEMPERATURE

MAX5150/5151 toc05

TEMPERATURE (°C)

SUPPLY CURRENT (

REF

= 2.048V

CODE = 1FFF (HEX)

CODE = 0000 (HEX)

-30

-80

100

TOTAL HARMONIC DISTORTION

PLUS NOISE vs. FREQUENCY

-70

MAX5150/5151 toc06

FREQUENCY (kHz)

THD + NOISE (dB)

-60

-50

-40

REF

= 1Vp-p @ 2.5V

CODE = 1FFF (HEX)

0.1

100

FULL-SCALE ERROR vs. LOAD

-2.5

-2.0

-3.0

-1.5

-1.0

-0.5

0.5

1.0

MAX5150/5151 toc08

)

FULL-SCALE ERROR (LSB)

REF

= 2.048V

-100

-80

-90

-60

-70

-40

-50

0.5

1.6

2.7

3.8

4.9

6.0

-30

-10

-20

OUTPUT FFT PLOT

MAX5150/5151 toc12

REF

= 2.45Vp-p @ 1.225V

f = 1kHz
CODE = 1FFF (HEX)

NOTE: RELATIVE TO FULL-SCALE

FREQUENCY (kHz)

RELATIVE OUTPUT (dB)

-150

-130

-140

-110

-120

-90

-100

-80

-60

-70

-50

0.5

1.5 2.0 2.5

1.0

3.0 3.5 4.0

5.0

4.5

5.5

REFERENCE FEEDTHROUGH AT 1kHz

MAX5150/5151 toc10

FREQUENCY (kHz)

RELATIVE OUTPUT (dB)

REF

= 3Vp-p @ 1.5V

f = 1kHz
CODE = 0000 (HEX)

NOTE: RELATIVE TO FULL-SCALE OUTPUT

-55

-15

-35

85 105 125

SHUTDOWN CURRENT

vs. TEMPERATURE

MAX5150/5151 toc13

TEMPERATURE (°C)

SHUTDOWN CURRENT (

REF

= 1V

DYNAMIC RESPONSE RISE TIME

MAX5150/5151 toc17

s/div

OUT_
1V/div

5V/div

REF

= 2.048V

s/div

DYNAMIC RESPONSE FALL TIME

MAX5150/5151 toc18

REF

= 2.048V

OUT_
1V/div

5V/div

MAX5150

MAX5150/MAX5151

Low-Power, Dual, 13-Bit Voltage-Output DACs

with Serial Interface

_______________________________________________________________________________________

_____________________________Typical Operating Characteristics (continued)

= +3V, R

= 10k

, C

= 100pF, OS_pins tied to AGND, unless otherwise noted.)

-20

-16

-18

-12

-14

-8

-10

-6

-2

-4

320

640

960

1280

1600

REFERENCE VOLTAGE INPUT

FREQUENCY RESPONSE

MAX5150/5151 toc15

FREQUENCY (kHz)

RELATIVE OUTPUT (dB)

REF

= 0.67Vp-p @ 0.75V

CODE = 1FFF

400

440

420

500

480

460

540

520

560

-55

-35 -15

85 105 125

SUPPLY CURRENT vs. TEMPERATURE

MAX5150/5151 toc04

TEMPERATURE (°C)

SUPPLY CURRENT (

REF

= 1V

CODE = 1FFF (HEX)

CODE = 0000 (HEX)

-30

-80

100

TOTAL HARMONIC DISTORTION

PLUS NOISE vs. FREQUENCY

-70

MAX5150/5151 toc07

FREQUENCY (kHz)

THD + NOISE (dB)

-60

-50

-40

REF

= 1Vp-p @ 1V

CODE = 1FFF (HEX)

0.5

-2.5

0.1

100

FULL-SCALE ERROR vs. LOAD

-1.0

-1.5

-2.0

-0.5

MAX5150/5151 toc09

)

FULL-SCALE ERROR (LSB)

REF

= 1.25V

-100

-80

-90

-60

-70

-40

-50

-30

-10

-20

0.5

2.7

3.8

4.9

1.6

6.0

OUTPUT FFT PLOT

MAX5150/5151

FREQUENCY (kHz)

RELATIVE OUTPUT (dB)

REF

= 1.4Vp-p @ 0.75V

f = 1kHz
CODE = 1FFF (HEX)

-150

-130

-140

-110

-120

-90

-100

-80

-60

-70

-50

0.5

1.5 2.0 2.5

1.0

3.0 3.5 4.0

5.0

4.5

5.5

REFERENCE FEEDTHROUGH AT 1kHz

MAX5150/5151 toc11

FREQUENCY (kHz)

RELATIVE OUTPUT (dB)

REF

= 2Vp-p @ 1V

f = 1kHz
CODE = 0000 (HEX)

NOTE: RELATIVE TO FULL-SCALE OUTPUT

1.2

1.0

1.6

1.4

2.0

1.8

2.2

2.4

2.8

2.6

3.0

-55

-15

-35

85 105 125

SHUTDOWN CURRENT

vs. TEMPERATURE

MAX5150/5151 toc14

TEMPERATURE (°C)

SHUTDOWN CURRENT (

REF

= 1V

DYNAMIC RESPONSE FALL TIME

MAX5150/5151 toc24

REF

= 1.25V

s/div

OUT_
500mV/div

CS
2V/div

DYNAMIC RESPONSE RISE TIME

MAX5150/5151 toc20

s/div

REF

1.25V

OUT_
500mV/div

2V/div

MAX5151

MAX5150/MAX5151

Low-Power, Dual, 13-Bit Voltage-Output DACs
with Serial Interface

_______________________________________________________________________________________

_____________________________Typical Operating Characteristics (continued)

= +5V (MAX5150), V

= +3V (MAX5151), R

= 10k

, C

= 100pF, OS_ pins tied to AGND, unless otherwise noted.)

0.40

0.45

0.50

0.55

0.60

0.65

2.0

2.5

3.0

3.5

4.0

4.5

5.0

5.5

6.0

SUPPLY CURRENT

vs. SUPPLY VOLTAGE

MAX5150/5151 TOC02

SUPPLY VOLTAGE (V)

SUPPLY CURRENT (mA)

MAX5150

MAX5151

CODE = 1FFF HEX

CODE = 0000 HEX

OUTB
200

V/div

AC COUPLED

OUTA
5V/div

MAX5150

ANALOG CROSSTALK

MAX5150/5151 toc22

REF

= 2.048V, GAIN = +2, CODE = 1FFF HEX

250

s/div

MAX5150

DIGITAL FEEDTHROUGH

MAX5150/5151 toc23

OUTA
500

V/div

AC COUPLED

SCLK
5V/div

2.5

s/div

MAX5150

MAJOR-CARRY TRANSITION

MAX5150/5151 toc19

TRANSITION FROM 1000 HEX TO 0FFF HEX

OUT_
50mV/div
AC COUPLED

2V/div

MAX5150/MAX5151

_______________Detailed Description

The MAX5150/MAX5151 dual, 13-bit, voltage-output
DACs are easily configured with a 3-wire serial inter-
face. These devices include a 16-bit data-in/data-out
shift register, and each DAC has a double-buffered
input composed of an input register and a DAC register
(see

Functional Diagram). In addition, trimmed internal

resistors produce an internal gain of +2 that maximizes
output voltage swing. The amplifier's offset-adjust pin
allows for a DC shift in the DAC's output.

Both DACs use an inverted R-2R ladder network that
produces a weighted voltage proportional to the input
voltage value. Each DAC has its own reference input to
facilitate independent full-scale values. Figure 1
depicts a simplified circuit diagram of one of the two
DACs.

Reference Inputs

The reference inputs accept both AC and DC values
with a voltage range extending from 0V to (V

- 1.4V).

Determine the output voltage using the following equa-
tion (OS_ = AGND):

OUT

= (V

REF

x NB / 8192) x 2

where NB is the numeric value of the DAC's binary
input code (0 to 8191) and V

REF

is the reference volt-

age.

The reference input impedance ranges from 14k

(1555 hex) to several giga ohms (with an input code of
0000 hex). The reference input capacitance is code
dependent and typically ranges from 15pF with an
input code of all zeros to 50pF with an input code of all
ones.

Output Amplifier

The output amplifiers on the MAX5150/MAX5151 have
internal resistors that provide for a gain of +2 when OS_
is connected to AGND. These resistors are trimmed to
minimize gain error. The output amplifiers have a typi-
cal slew rate of 0.75V/µs and settle to 1/2LSB within
16µs, with a load of 10k

in parallel with 100pF. Loads

less than 2k

degrade performance.

The OS_ pin can be used to produce an adjustable off-
set voltage at the output. For instance, to achieve a 1V
offset, apply -1V to the OS_ pin to produce an output
range from 1V to (1V + V

REF

x 2). Note that the DAC's

output range is still limited by the maximum output volt-
age specification.

Power-Down Mode

The MAX5150/MAX5151 feature a software-program-
mable shutdown mode that reduces the typical supply
current to 2µA. The two DACs can be shutdown inde-
pendently, or simultaneously using the appropriate pro-
gramming command. Enter shutdown mode by writing
the appropriate input-control word (Table 1). In shut-
down mode, the reference inputs

and amplifier out-

MAX5150/MAX5151

Low-Power, Dual, 13-Bit Voltage-Output DACs

with Serial Interface

_______________________________________________________________________________________

Digital Ground

DGND

Serial-Data Output

DOUT

User-Programmable Output

UPO

Power-Down Lockout. The device can-
not be powered down when PDL is low.

PDL

Reference for DAC B

REFB

Clears all DACs and registers
(resets to 0).

Chip-Select Input

Serial-Data Input

DIN

Serial-Register Clock Input

SCLK

Reference for DAC A

REFA

DAC A Offset Adjustment

OSA

PIN

DAC A Output Voltage

OUTA

Analog Ground

AGND

FUNCTION

NAME

OSB

DAC B Offset Adjustment

OUTB

DAC B Output Voltage

Positive Power Supply

OUT_

OS_

SHOWN FOR ALL 1s ON DAC

D10

D11

D12

REF_

AGND

Figure 1. Simplified DAC Circuit Diagram

_____________________Pin Description

MSB

LSB

MAX5150/MAX5151

puts become high impedance, and the serial inter-
face

remains active. Data in the input registers is

saved, allowing the MAX5150/MAX5151 to recall the
output state prior to entering shutdown when returning
to normal mode. Exit shutdown by recalling the previ-
ous condition or by updating the DAC with new infor-
mation. When returning to normal operation (exiting
shutdown), wait 20µs for output stabilization.

Serial Interface

The MAX5150/MAX5151 3-wire serial interface is com-
patible with both Microwire (Figure 2) and SPI/QSPI
(Figure 3) serial-interface standards. The 16-bit serial
input word consists of an address bit, two control bits,
and 13 bits of data (MSB to LSB) as shown in Figure 4.

Low-Power, Dual, 13-Bit Voltage-Output DACs
with Serial Interface

______________________________________________________________________________________

16-BIT SERIAL WORD

FUNCTION

D12.......................D0
(MSB) (LSB)

0 0 1

13-bit DAC data

Load input register A; DAC registers are unchanged.

0 1 1

13-bit DAC data

Load all DAC registers from the shift register
(start up both DACs with new data.).

1 1 0

13-bit DAC data

Load input register B; all DAC registers are updated.

0 1 0

13-bit DAC data

Load input register A; all DAC registers are updated.

1 0 1

13-bit DAC data

Load input register B; DAC registers are unchanged.

0 0 0

1 1 0 x xxxxxxxxx

Shut down DAC A (provided PDL = 1).

0 0 0

1 0 1 x xxxxxxxxx

Update DAC register B from input register B
(start up DAC B with data previously stored in input register B).

0 0 0

0 0 1 x xxxxxxxxx

Update DAC register A from input register A
(start up DAC A with data previously stored in input register A).

1 1 1

xxxxxxxxxxxxx

Shut down both DACs (provided PDL = 1).

1 0 0

xxxxxxxxxxxxx

Update both DAC registers from their respective input registers
(start up both DACs with data previously stored in the input registers).

0 0 0

1 1 1 x xxxxxxxxx

Shut down DAC B (provided PDL = 1).

0 0 0

0 1 0 x xxxxxxxxx

UPO goes low (default).

0 0 0

0 1 1 x xxxxxxxxx

UPO goes high.

0 0 0

1 0 0 1 xxxxxxxxx

Mode 1, DOUT clocked out on SCLK's rising edge.

0 0 0

1 0 0 0 xxxxxxxxx

Mode 0, DOUT clocked out on SCLK's falling edge (default).

0 0 0

0 0 0 x xxxxxxxxx

No operation (NOP).

Table 1. Serial-Interface Programming Commands

x = Don't care

Note: When A0, C1, and C0 = 0, then D12, D11, D10, and D9 become control bits.

SCLK

DIN

I/O

MAX5150
MAX5151

MICROWIRE

PORT

Figure 2. Connections for Microwire

The address and control bits determine the MAX5150/
MAX5151's response, as outlined in Table 1.

The MAX5150/MAX5151's digital inputs are double
buffered, which allows any of the following: loading the
input register(s) without updating the DAC register(s),
updating the DAC register(s) from the input register(s),
or updating the input and DAC registers concurrently.
The address and control bits allow the DACs to act
independently.

The 16-bit data can be sent as two 8-bit packets (SPI,
Microwire), with CS low during this period. The address
and control bits determine which register will be updat-
ed, and the state of the registers when exiting shut-
down. The 3-bit address/control determines the
following:

· registers to be updated

· clock edge on which data is to be clocked out via

the serial-data output (DOUT)

· state of the user-programmable logic output

· configuration of the device after shutdown.

The general timing diagram of Figure 5 illustrates how
data is acquired. Driving CS low enables the device to
receive data. Otherwise, the interface control circuitry is
disabled. With CS low, data at DIN is clocked into the
register on the rising edge of SCLK. As CS goes high,
data is latched into the input and/or DAC registers
depending on the address and control bits. The maxi-
mum clock frequency guaranteed for proper operation
is 10MHz. Figure 6 depicts a more detailed timing dia-
gram of the serial interface.

MAX5150/MAX5151

Low-Power, Dual, 13-Bit Voltage-Output DACs

with Serial Interface

DIN

SCLK

MOSI

SCK

I/O

SPI/QSPI

PORT

+5V

CPOL = 0, CPHA = 0

MAX5150
MAX5151

Figure 3. Connections for SPI/QSPI

Figure 5. Serial-Interface Timing Diagram

SCLK

DIN

COMMAND

EXECUTED

D12 D11 D10

______________________________________________________________________________________

MSB.......Data Bits.........LSB

D12.................................D0

13 Data Bits

16 Bits of Serial Data

Control Bits

C1, C0

Address Bits

MSB ..................................................................................LSB

1 Address/2 Control Bits

Figure 4. Serial-Data Format

MAX5150/MAX5151

Low-Power, Dual, 13-Bit Voltage-Output DACs
with Serial Interface

______________________________________________________________________________________

SCLK

DIN

CSO

CSS

CSW

CS1

CSH

Figure 6. Detailed Serial-Interface Timing Diagram

TO OTHER
SERIAL DEVICES

MAX5150
MAX5151

DIN

SCLK

MAX5150
MAX5151

DIN

DOUT

SCLK

DIN

SCLK

TO OTHER
SERIAL DEVICES

MAX5150
MAX5151

DIN

SCLK

MAX5150
MAX5151

DIN

SCLK

MAX5150
MAX5151

DIN

SCLK

DIN

SCLK

CS1

CS2

CS3

Figure 7. Daisy Chaining MAX5150/MAX5151s

Figure 8. Multiple MAX5150/MAX5151s Sharing a Common DIN Line

Serial-Data Output

The serial-data output, DOUT, is the internal shift regis-
ter's output. DOUT allows for daisy chaining of devices
and data readback. The MAX5150/MAX5151 can be
programmed to shift data out of DOUT on SCLK's
falling edge (Mode 0) or on the rising edge (Mode 1).
Mode 0 provides a lag of 16 clock cycles, which main-
tains compatibility with SPI/QSPI and Microwire inter-
faces. In Mode 1, the output data lags 15.5 clock
cycles. On power-up, the device defaults to Mode 0.

User-Programmable Logic Output (UPO)

UPO allows an external device to be controlled through
the serial interface (Table 1), thereby reducing the
number of microcontroller I/O pins required.

Power-Down Lockout Input (

)

The power-down lockout pin (PDL) disables software
shutdown when low. When in shutdown, transitioning
PDL from high to low wakes up the part with the output
set to the state prior to shutdown. PDL can also be
used to asynchronously wake up the device.

Daisy Chaining Devices

Any number of MAX5150/MAX5151s can be daisy
chained by connecting the DOUT pin of one device to
the DIN pin of the following device in the chain (Figure 7).

Since the MAX5150/MAX5151's DOUT pin has an inter-
nal active pull-up, the DOUT sink/source capability
determines the time required to discharge/charge a
capacitive load. Refer to the serial-data-out V

and

specifications in the

Electrical Characteristics.

Figure 8 shows an alternate method of connecting sev-
eral MAX5150/MAX5151s. In this configuration, the
data bus is common to all devices; data is not shifted
through a daisy chain. More I/O lines are required in
this configuration because a dedicated chip-select
input (CS) is required for each IC.

__________Applications Information

Unipolar Output

Figure 9 shows the MAX5150/MAX5151 configured for
unipolar, rail-to-rail operation with a gain of +2. The
MAX5150 can produce a 0V to 4.096V output with
2.048V reference (Figure 9), while the MAX5151 can
produce a range of 0V to 2.5V with a 1.25V reference.
Table 2 lists the unipolar output codes. An offset to the
output can be achieved by connecting a voltage to
OS_, as shown in Figure 10. By applying V

_ = -1V,

the output values will range between 1V and (1V +
V

REF

x 2).

MAX5150/MAX5151

Low-Power, Dual, 13-Bit Voltage-Output DACs

with Serial Interface

Table 2. Unipolar Code Table (Gain = +2)

MAX5150
MAX5151

DAC

GAIN = +2

REF_

OUT_

OS_

DGND

AGND

+5V/+3V

Figure 9. Unipolar Output Circuit (Rail-to-Rail)

MAX5150
MAX5151

DAC _

AGND

DGND

REF_

OUT_

OS_

+5V/+3V

______________________________________________________________________________________

ANALOG OUTPUT

1 1 1 1 1

1 1 1 1

1 0 0 0 0

0 0 0 0

0 0 0 1

DAC CONTENTS

MSB

LSB

1 0 0 0 0

0 0 0 0

0 1 1 1 1

1 1 1 1

0 0 0 0 0

0 0 0 0

0 0 0 0 0

0 0 0 0

0 0 0 1

8191

8192

REF

x 2

4097

8192

REF

x 2

4096

8192

REF

x 2

4095

8192

REF

x 2

8192

REF

x 2

Figure 10. Setting OS_ for Output Offset

MAX5150/MAX5151

Bipolar Output

The MAX5150/MAX5151 can be configured for a bipo-
lar output, as shown in Figure 11. The output voltage is
given by the equation (OS_ = AGND):

OUT

= V

REF

[((2 x NB) / 8192) - 1]

where NB represents the numeric value of the DAC's
binary input code. Table 3 shows digital codes and the
corresponding output voltage for Figure 11's circuit.

Using an AC Reference

In applications where the reference has an AC signal
component, the MAX5150/MAX5151 have multiplying
capabilities within the reference input voltage range
specifications. Figure 12 shows a technique for apply-
ing a sinusoidal input to REF_, where the AC signal is
offset before being applied to REF.

Harmonic Distortion and Noise

The total harmonic distortion plus noise (THD+N) is typ-
ically less than -78dB at full scale with a 1Vp-p input
swing at 5kHz. The typical -3dB frequency is 300kHz
for both devices, as shown in the

Typical Operating

Characteristics.

Digital Calibration and

Threshold Selection

Figure 13 shows the MAX5150/MAX5151 in a digital
calibration application. With a bright light value applied
to the photodiode (on), the DAC is digitally ramped until
it trips the comparator. The microprocessor stores this
"high" calibration value. Repeat the process with a
dim light (off) to obtain the dark current calibration.

Low-Power, Dual, 13-Bit Voltage-Output DACs
with Serial Interface

______________________________________________________________________________________

Table 3. Bipolar Code Table

ANALOG OUTPUT

1 1 1 1 1

1 1 1 1

1 0 0 0 0

0 0 0 0

0 0 0 1

DAC CONTENTS

MSB

LSB

1 0 0 0 0

0 0 0 0

0 1 1 1 1

1 1 1 1

0 0 0 0 0

0 0 0 0

0 0 0 0 0

0 0 0 0

0 0 0 1

4095

4096

REF

4096

REF

-V

4096

REF

-V

4095

4096

REF

-V

4096

- V

REF

AGND

DGND

TOLERANCES: 10k

± 0.1%

MAX5150
MAX5151

DAC _

REF_

OS_

OUT_

10k

V-

V+

OUT

+5V/+3V

Figure 11. Bipolar Output Circuit

DAC_

OUT

MAX5150
MAX5151

10k

26k

OS_

REF

GND

AGND

+5V/

+3V

REFERENCE

INPUT

500mVp-p

MAX495

+5V/+3V

Figure 12. AC Reference Input Circuit

AGND

DIN

DGND

MAX5150
MAX5151

DAC _

REF_

OS_

OUT_

V-

V+

PHOTODIODE

V+

OUT

PULLDOWN

+5V/+3V

Figure 13. Digital Calibration

The microprocessor then programs the DAC to set an
output voltage at the midpoint of the two calibrated val-
ues. Applications include tachometers, motion sensing,
automatic readers, and liquid clarity analysis.

Digital Control of Gain and Offset

The two DACs can be used to control the offset and
gain for curve-fitting nonlinear functions, such as trans-
ducer linearization or analog compression/expansion
applications. The input signal is used as the reference
for the gain-adjust DAC, whose output is summed with
the output from the offset-adjust DAC. The relative
weight of each DAC output is adjusted by R1, R2, R3,
and R4 (Figure 14).

Power-Supply Considerations

On power-up, the input and DAC registers clear (set to
zero code). For rated performance, V

REF_

should be at

least 1.4V below V

. Bypass the power supply with a

4.7µF capacitor in parallel with a 0.1µF capacitor to
AGND. Minimize lead lengths to reduce lead induc-
tance.

Grounding and Layout Considerations

Digital and AC transient signals on AGND can create
noise at the output. Connect AGND to the highest quali-
ty ground available. Use proper grounding techniques,
such as a multilayer board with a low-inductance
ground plane. Carefully lay out the traces between
channels to reduce AC cross-coupling and crosstalk.
Wire-wrapped boards and sockets are not recommend-
ed. If noise becomes an issue, shielding may be
required.

MAX5150/MAX5151

Low-Power, Dual, 13-Bit Voltage-Output DACs

with Serial Interface

______________________________________________________________________________________

AGND

DGND

MAX5150
MAX5151

DACA

REFA

REF

SCLK

DIN

REFB

OUTB

OSB

OUTA

OSA

OUT

DACB

INPUT
REG A

INPUT
REG B

DAC

REG A

DAC

REG B

OFFSET

[ ]

OUT

GAIN

[ ]

2NA

8192

NA IS THE NUMERIC VALUE OF THE INPUT CODE FOR DACA.
NB IS THE NUMERIC VALUE OF THE INPUT CODE FOR DACB.

R1+R2

R4
R3

2NB

8192

R4
R3

(

)(

) (

REF

)( )

[ ] [ ]

SHIFT

Figure 14. Digital Control of Gain and Offset

Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.

____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600

Printed USA

is a registered trademark of Maxim Integrated Products.

MAX5150/MAX5151

Low-Power, Dual, 13-Bit Voltage-Output DACs
with Serial Interface

___________________Chip Information

TRANSISTOR COUNT: 3053

SUBSTRATE CONNECTED TO AGND

INL

(LSB)

PIN-PACKAGE

TEMP. RANGE

PART

±2

±1

±2

±1

±2

±1

±2

±1

±1/2

±1

±1/2

16 CERDIP**

-55°C to +125°C

MAX5151BMJE

16 QSOP

-40°C to +85°C

MAX5151BEEE

16 QSOP

-40°C to +85°C

MAX5151AEEE

16 Plastic DIP

-40°C to +85°C

MAX5151BEPE

16 Plastic DIP

-40°C to +85°C

MAX5151AEPE

Dice*

0°C to +70°C

MAX5151BC/D

16 QSOP

0°C to +70°C

MAX5151BCEE

16 QSOP

0°C to +70°C

MAX5151ACEE

16 Plastic DIP

0°C to +70°C

MAX5151BCPE

16 Plastic DIP

0°C to +70°C

MAX5151

ACPE

16 CERDIP**

-55°C to +125°C

MAX5150BMJE

16 QSOP

-40°C to +85°C

MAX5150BEEE

16 QSOP

-40°C to +85°C

MAX5150AEEE

16 Plastic DIP

-40°C to +85°C

MAX5150BEPE

16 Plastic DIP

-40°C to +85°C

MAX5150AEPE

_Ordering Information (continued)

Dice are tested at T

= +25°C, DC parameters only.

Contact factory for availability.

AGND

OUTB

OSB

REFB

PDL

UPO

DOUT

DGND

TOP VIEW

MAX5150
MAX5151

DIP/QSOP

OUTA

OSA

REFA

DIN

SCLK

__________________Pin Configuration

QSOP.EPS

________________________________________________________Package Information

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