LTC1543

Software-Selectable

Multiprotocol Transceiver

, LTC and LT are registered trademarks of Linear Technology Corporation.

LTC1544

RTS

DTR

DSR

DCD

CTS

LTC1543

TXD

SCTE

TXC

RXC

RXD

1543 TA01

LTC1344A

TXD A (103)

TXD B

SCTE A (113)

SCTE B

RXC A (115)

RXC B

RXD A (104)

RXD B

RTS A (105)

RTS B

DTR A (108)

DTR B

CTS A (106)

CTS B

LL A (141)

SG (102)

SHIELD (101)

DB-25 CONNECTOR

TXC A (114)

TXC B

DCD A (107)

DCD B

DSR A (109)

DSR B

DTE or DCE Multiprotocol Serial Interface with DB-25 Connector

Data Networking

CSU and DSU

Data Routers

Software-Selectable Transceiver Supports:
RS232, RS449, EIA530, EIA530-A, V.35, V.36, X.21

TUV/Detecon Inc. Certified NET1 and NET2
Compliant (Test Report No. NET2/102201/97)

TBR2 Compliant (Test Report No. CTR2/022701/98)

Software-Selectable Cable Termination Using
the LTC1344A

Complete DTE or DCE Port with LTC1544, LTC1344A

Operates from Single 5V Supply

The LTC

1543 is a 3-driver/3-receiver multiprotocol trans-

ceiver that operates from a single 5V supply. The LTC1543
and LTC1544 form the core of a complete software-select-
able DTE or DCE interface port that supports the RS232,
RS449, EIA530, EIA530-A, V.35, V.36 or X.21 protocols.
Cable termination may be implemented using the LTC1344A
software-selectable cable termination chip or by using exist-
ing discrete designs.

The LTC1543 runs from a single 5V supply using an internal
charge pump that requires only five space-saving surface
mounted capacitors. The part is available in a 28-lead SSOP
surface mount package.

DESCRIPTIO

FEATURES

APPLICATIO S

TYPICAL APPLICATIO

LTC1543

ABSOLUTE

AXI

RATINGS

PACKAGE/ORDER I

FOR

ATIO

ORDER PART

NUMBER

(Note 1)

Supply Voltage ....................................................... 6.5V
Input Voltage

Transmitters ........................... 0.3V to (V

+ 0.3V)

Receivers ............................................... 18V to 18V
Logic Pins .............................. 0.3V to (V

+ 0.3V)

Output Voltage

Transmitters ................. (V

0.3V) to (V

+ 0.3V)

Receivers ................................ 0.3V to (V

+ 0.3V)

Logic Pins .............................. 0.3V to (V

+ 0.3V)

........................................................ 10V to 0.3V

....................................................... 0.3V to 10V

Short-Circuit Duration

Transmitter Output ..................................... Indefinite
Receiver Output .......................................... Indefinite
V

.................................................................. 30 sec

Operating Temperature Range

LTC1543C .............................................. 0

C to 70

LTC1543I ........................................... 40

C to 85

Storage Temperature Range ................ 65

C to 150

Lead Temperature (Soldering, 10 sec)................. 300

LTC1543CG
LTC1543IG

= 5V (Notes 2, 3)

ELECTRICAL CHARACTERISTICS

Consult factory for Military grade parts.

TOP VIEW

DCE/DTE

GND

D1 A

D1 B

D2 A

D2 B

D3/R1 A

D3/R1 B

R2 A

R2 B

R3 A

R3 B

CHARGE PUMP

G PACKAGE

28-LEAD PLASTIC SSOP

JMAX

= 150

= 65

C/ W

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

Supplies

Supply Current (DCE Mode,

RS530, RS530-A, X.21 Modes, No Load

All Digital Pins = GND or V

)

RS530, RS530-A, X.21 Modes, Full Load

100

130

V.35 Mode, No Load

V.35 Mode, Full Load

126

170

V.28 Mode, No Load

V.28 Mode, Full Load

No-Cable Mode

120

500

Internal Power Dissipation (DCE Mode)

RS530, RS530-A, X.21 Modes, Full Load

230

V.35 Mode, Full Load

600

V.28 Mode, Full Load

140

Positive Charge Pump Output Voltage

Any Mode, No Load

8.0

9.4

V.28 Mode, with Load

8.0

8.7

V.28 Mode, with Load, I

= 10mA

6.5

Negative Charge Pump Output Voltage

V.28, V.35 Modes, No Load

9.6

V.28 Mode, Full Load

8.0

8.5

V.35 Mode, Full Load

5.5

6.7

RS530, RS530-A, X.21 Modes, Full Load

4.5

5.7

OSC

Charge Pump Oscillator Frequency

150

kHz

Supply Rise Time

No-Cable Mode or Power-Up to Turn On

Logic Inputs and Outputs

Logic Input High Voltage

Logic Input Low Voltage

0.8

LTC1543

ELECTRICAL CHARACTERISTICS

= 5V (Notes 2, 3)

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

Logic Input Current

D1, D2, D3

M0, M1, M2, DCE = GND (LTC1543C)

100

M0, M1, M2, DCE = GND (LTC1543I)

120

M0, M1, M2, DCE = V

Output High Voltage

= 4mA

4.5

Output Low Voltage

= 4mA

0.3

0.8

OSR

Output Short-Circuit Current

OZR

Three-State Output Current

M0 = M1 = M2 = V

, 0V

V.11 Driver

ODO

Open Circuit Differential Output Voltage

= 1.95k (Figure 1)

ODL

Loaded Differential Output Voltage

= 50

(Figure 1)

0.5V

ODO

0.67V

ODO

= 50

(Figure 1)

Change in Magnitude of Differential

= 50

(Figure 1)

0.2

Output Voltage

Common Mode Output Voltage

= 50

(Figure 1)

Change in Magnitude of Common Mode

= 50

(Figure 1)

0.2

Output Voltage

Short-Circuit Current

OUT

= GND

150

Output Leakage Current

0.25V

0.25V, Power Off or

100

No-Cable Mode or Driver Disabled

, t

Rise or Fall Time

(Figures 2, 6) (LTC1543C)

(Figures 2, 6) (LTC1543I)

PLH

Input to Output

(Figures 2, 6) (LTC1543C)

(Figures 2, 6) (LTC1543I)

PHL

Input to Output

(Figures 2, 6) (LTC1543C)

(Figures 2, 6) (LTC1543I)

Input to Output Difference,

PLH

PHL

(Figures 2, 6) (LTC1543C)

(Figures 2, 6) (LTC1543I)

SKEW

Output to Output Skew

(Figures 2, 6)

V.11 Receiver

Input Threshold Voltage

0.2

Input Hysteresis

Input Current (A, B)

10V

A,B

10V

0.66

Input Impedance

10V

A,B

10V

, t

Rise or Fall Time

(Figures 2, 7)

PLH

Input to Output

(Figures 2, 7) (LTC1543C)

(Figures 2, 7) (LTC1543I)

PHL

Input to Output

(Figures 2, 7) (LTC1543C)

(Figures 2, 7) (LTC1543I)

Input to Output Difference,

PLH

PHL

(Figures 2, 7) (LTC1543C)

(Figures 2, 7) (LTC1543I)

V.35 Driver

Differential Output Voltage

Open Circuit

10.00

With Load, 4V

4V (Figure 3)

0.44

0.55

0.66

Transmitter Output High Current

A, B

= 0V

9.0

Transmitter Output Low Current

A, B

= 0V

9.0

Transmitter Output Leakage Current

0.25V

A, B

0.25V

100

LTC1543

ELECTRICAL CHARACTERISTICS

= 5V (Notes 2, 3)

The

denotes specifications which apply over the full operating

temperature range.

Note 1: Absolute Maximum Ratings are those beyond which the safety of a
device may be impaired.

Note 2: All currents into device pins are positive; all currents out of device
are negative. All voltages are referenced to device ground unless otherwise
specified.

Note 3: All typicals are given for V

= 5V, C1 = C2 = C

VCC

= 1

VDD

= C

VEE

= 3.3

F tantalum capacitors and T

= 25

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

, t

Rise or Fall Time

(Figures 3, 6)

PLH

Input to Output

(Figures 3, 6) (LTC1543C)

(Figures 3, 6) (LTC1543I)

PHL

Input to Output

(Figures 3, 6) (LTC1543C)

(Figures 3, 6) (LTC1543I)

Input to Output Difference,

PLH

PHL

(Figures 3, 6) (LTC1543C)

(Figures 3, 6) (LTC1543I)

SKEW

Output to Output Skew

(Figures 3, 6)

V.35 Receiver

Differential Receiver Input Threshold Voltage

+ V

)/2

2V (Figure 3)

0.2

Receiver Input Hysteresis

+ V

)/2

2V (Figure 3)

Receiver Input Current (A, B)

10V

A,B

10V

0.66

Receiver Input Impedance

10V

A,B

10V

, t

Rise or Fall Time

(Figures 3, 7)

PLH

Input to Output

(Figures 3, 7) (LTC1543C)

(Figures 3, 7) (LTC1543I)

PHL

Input to Output

(Figures 3, 7) (LTC1543C)

(Figures 3, 7) (LTC1543I)

Input to Output Difference,

PLH

PHL

(Figures 3, 7) (LTC1543C)

(Figures 3, 7) (LTC1543I)

V.28 Driver

Output Voltage

Open Circuit

= 3k (Figure 4)

8.5

Short-Circuit Current

OUT

= GND

150

Output Leakage Current

0.25V

0.25V, Power Off or

100

No-Cable Mode or Driver Disabled

Slew Rate

= 3k, C

= 2500pF (Figures 4, 8)

PLH

Input to Output

= 3k, C

= 2500pF (Figures 4, 8)

1.5

2.5

PHL

Input to Output

= 3k, C

= 2500pF (Figures 4, 8)

1.5

V.28 Receiver

THL

Input Low Threshold Voltage

1.2

0.8

TLH

Input High Threshold Voltage

1.2

Receiver Input Hysteresis

0.05

0.3

Receiver Input Impedance

15V

, t

Rise or Fall Time

(Figures 5, 9)

PLH

Input to Output

(Figures 5, 9)

100

PHL

Input to Output

(Figures 5, 9)

160

250

LTC1543

(Pin 1): Capacitor C1 Negative Terminal. Connect a

F capacitor between C1

and C1

(Pin 2): Capacitor C1 Positive Terminal. Connect a

F capacitor between C1

and C1

(Pin 3): Generated Positive Supply Voltage for

V.28. Connect a 1

F capacitor to ground.

(Pin 4): Positive Supply Voltage Input. 4.75V

5.25V. Bypass with a 1

F capacitor to ground.

D1 (Pin 5): TTL Level Driver 1 Input.

D2 (Pin 6): TTL Level Driver 2 Input.

D3 (Pin 7): TTL Level Driver 3 Input.

R1 (Pin 8): CMOS Level Receiver 1 Output.

R2 (Pin 9): CMOS Level Receiver 2 Output.

R3 (Pin 10): CMOS Level Receiver 3 Output.

M0 (Pin 11): TTL Level Mode Select Input 0 with Pull-Up
to V

M1 (Pin 12): TTL Level Mode Select Input 1 with Pull-Up
to V

M2 (Pin 13): TTL Level Mode Select Input 2 with Pull-Up
to V

DCE/DTE (Pin 14): TTL Level Mode Select Input with Pull-
Up to V

CTIO

R3 B (Pin 15): Receiver 3 Noninverting Input with Pull-Up
to V

R3 A (Pin 16): Receiver 3 Inverting Input.

R2 B (Pin 17): Receiver 2 Noninverting Input.

R2 A (Pin 18): Receiver 2 Inverting Input.

D3/R1 B (Pin 19): Receiver 1 Noninverting Input and
Driver 3 Noninverting Output.

D3/R1 A (Pin 20): Receiver 1 Inverting Input and Driver 3
Inverting Output.

D2 B (Pin 21): Driver 2 Noninverting Output.

D2 A (Pin 22): Driver 2 Inverting Output.

D1 B (Pin 23): Driver 1 Noninverting Output.

D1 A (Pin 24): Driver 1 Inverting Output.

GND (Pin 25): Ground.

(Pin 26): Negative Supply Voltage. Connect a 3.3

capacitor to GND.

(Pin 27): Capacitor C2 Negative Terminal. Connect a

F capacitor between C2

and C2

(Pin 28): Capacitor C2 Positive Terminal. Connect a

F capacitor between C2

and C2

Figure 1. V.11 Driver Test Circuit

Figure 2. V.11 Driver/Receiver AC Test Circuit

1543 F01

1543 F02

100

100pF

15pF

TEST CIRCUITS

LTC1543

TEST CIRCUITS

1543 F03

125

15pF

Figure 3. V.35 Driver/Receiver Test Circuit

1543 F04

Figure 4. V.10/V.28 Driver Test Circuit

Figure 5. V.10/V.28 Receiver Test Circuit

1543 F04

15pF

ODE SELECTIO

LTC1543 MODE NAME

DCE/DTE

Not Used (Default V.11)

V.11

RS530A

V.11

RS530

V.11

X.21

V.11

V.35

RS449/V.36

V.11

V.28/RS232

V.28

No Cable

Not Used (Default V.11)

V.11

RS530A

V.11

RS530

V.11

X.21

V.11

V.35

RS449/V.36

V.11

V.28/RS232

V.28

No Cable

LTC1543

SWITCHI G TI E WAVEFOR S

Figure 7. V.11, V.35 Receiver Propagation Delays

Figure 8. V.10, V.28 Driver Propagation Delays

Figure 9. V.10, V.28 Receiver Propagation Delays

OD2

1.5V

PLH

B A

PHL

1543 F07

f = 1MHz : t

10ns : t

10ns

INPUT

OUTPUT

1.5V

PHL

PLH

1543 F08

1.3V

0.8V

1.7V

2.4V

PHL

PLH

1543 F09

Figure 6. V.11, V.35 Driver Propagation Delays

1.5V

50%

10%

90%

PLH

B A

PHL

SKEW

1543 F06

1/2 V

f = 1MHz : t

10ns : t

10ns

DIFF

= V(A) V(B)

50%

10%

90%

LTC1543

APPLICATIO

S I

FOR

ATIO

Overview

The LTC1543/LTC1544 form the core of a complete soft-
ware-selectable DTE or DCE interface port that supports
the RS232, RS449, EIA530, EIA530-A, V.35, V.36 or X.21
protocols. Cable termination may be implemented using
the LTC1344A software-selectable cable termination chip
or by using existing discrete designs.

A complete DCE-to-DTE interface operating in EIA530
mode is shown in Figure 10. The LTC1543 of each port is
used to generate the clock and data signals. The LTC1544
is used to generate the control signals along with LL (Local
Loopback).The LTC1344A cable termination chip is used
only for the clock and data signals because they must
support V.35 cable termination. The control signals do not
need any external resistors.

Mode Selection

The interface protocol is selected using the mode select
pins M0, M1 and M2 (see the Mode Selection table).

For example, if the port is configured as a V.35 interface,
the mode selection pins should be M2 = 1, M1 = 0, M0 = 0.
For the control signals, the drivers and receivers will
operate in V.28 (RS232) electrical mode. For the clock and
data signals, the drivers and receivers will operate in V.35
electrical mode. The DCE/DTE pin will configure the port
for DCE mode when high, and DTE when low.

The interface protocol may be selected simply by plugging
the appropriate interface cable into the connector. The
mode pins are routed to the connector and are left uncon-
nected (1) or wired to ground (0) in the cable as shown in
Figure 11.

The internal pull-up current sources will ensure a binary 1
when a pin is left unconnected and that the LTC1543/
LTC1544 and the LTC1344A enter the no-cable mode
when the cable is removed. In the no-cable mode the
LTC1543/LTC1544 supply current drops to less than
200

A and all LTC1543/LTC1544 driver outputs and

LTC1344A resistive terminations are forced into a high
impedance state.

The mode selection may also be accomplished by using
jumpers to connect the mode pins to ground or V

Cable Termination

Traditional implementations have included switching
resistors with expensive relays, or requiring the user to
change termination modules every time the interface
standard has changed. Custom cables have been used
with the termination in the cable head or separate termina-
tions are built on the board and a custom cable routes the
signals to the appropriate termination. Switching the
terminations with FETs is difficult because the FETs must
remain off even though the signal voltage is beyond the
supply voltage for the FET drivers or the power is off.

Using the LTC1344A along with the LTC1543/LTC1544
solves the cable termination switching problem. Via soft-
ware control, the LTC1344A provides termination for the
V.10 (RS423), V.11 (RS422), V.28 (RS232) and V.35
electrical protocols.

V.10 (RS423) Interface

A typical V.10 unbalanced interface is shown in Figure 12.
A V.10 single-ended generator output A with ground C is
connected to a differential receiver with inputs A

con-

nected to A, and input C

connected to the signal return

ground C. Usually, no cable termination is required for
V.10 interfaces, but the receiver inputs must be compliant
with the impedance curve shown in Figure 13.

The V.10 receiver configuration in the LTC1544 is shown
in Figure 14. In V.10 mode switch S3 inside the LTC1544
is turned off.The noninverting input is disconnected inside
the LTC1544 receiver and connected to ground. The cable
termination is then the 30k input impedance to ground of
the LTC1544 V.10 receiver.

LTC1543

APPLICATIO

S I

FOR

ATIO

Figure 13. V.10 Receiver Input Impedance

10V

3.25mA

10V

1543 F13

V.11 (RS422) Interface

A typical V.11 balanced interface is shown in Figure 15. A
V.11 differential generator with outputs A and B with
ground C is connected to a differential receiver with
ground C

, inputs A

connected to A, B

connected to B. The

V.11 interface has a differential termination at the receiver
end that has a minimum value of 100

. The termination

resistor is optional in the V.11 specification, but for the
high speed clock and data lines, the termination is required
to prevent reflections from corrupting the data. The
receiver inputs must also be compliant with the imped-
ance curve shown in Figure 13.

In V.11 mode, all switches are off except S1 inside the
LTC1344A which connects a 103

differential termina-

tion impedance to the cable as shown in Figure 16.

Figure 16. V.11 Receiver Configuration

Figure 15. Typical V.11 Interface

GENERATOR

BALANCED

INTERCONNECTING

CABLE

LOAD

CABLE

TERMINATION

RECEIVER

100

MIN

1543 F15

124

20k

LTC1344A

LTC1543
LTC1544

RECEIVER

1543 F16

R1
51.5

R8
6k

R2
51.5

R6
10k

R7
10k

GND

20k

Figure 14. V.10 Receiver Configuration

20k

LTC1544

RECEIVER

1543 F14

R8
6k

R6
10k

R7
10k

GND

20k

LTC1543

APPLICATIO

S I

FOR

ATIO

V.28 (RS232) Interface

A typical V.28 unbalanced interface is shown in Figure 17.
A V.28 single-ended generator output A with ground C is
connected to a single-ended receiver with input A

con-

nected to A, ground C

connected via the signal return

ground C.

In V.28 mode all switches are off except S3 inside the
LTC1543/LTC1544 which connects a 6k (R8) impedance
to ground in parallel with 20k (R5) plus 10k (R6) for a
combined impedance of 5k as shown in Figure 18. The
noninverting input is disconnected inside the LTC1543/
LTC1544 receiver and connected to a TTL level reference
voltage for a 1.4V receiver trip point.

Figure 17. Typical V.28 Interface

GENERATOR

BALANCED

INTERCONNECTING

CABLE

LOAD

CABLE

TERMINATION

RECEIVER

1543 F17

124

20k

LTC1344A

LTC1543
LTC1544

RECEIVER

1543 F18

R1
51.5

R8
6k

R2
51.5

R6
10k

R7
10k

GND

20k

Figure 18. V.28 Receiver Configuration

V.35 Interface

A typical V.35 balanced interface is shown in Figure 19. A
V.35 differential generator with outputs A and B with
ground C is connected to a differential receiver with
ground C

, inputs A

connected to A, B

connected to B. The

V.35 interface requires a T or delta network termination at
the receiver end and the generator end. The receiver
differential impedance measured at the connector must be
100

, and the impedance between shorted termi-

nals (A

and B

)

and ground C

must be 150

In V.35 mode, both switches S1 and S2 inside the LTC1344A
are on, connecting the T network impedance as shown in
Figure 20. The switch in the LTC1543 is off. The 30k input

GENERATOR

BALANCED

INTERCONNECTING

CABLE

LOAD

CABLE

TERMINATION

RECEIVER

1543 F19

125

124

20k

LTC1344A

LTC1543

RECEIVER

1543 F20

R1
51.5

R8
6k

R2
51.5

R6
10k

R7
10k

GND

20k

Figure 20. V.35 Receiver Configuration

Figure 19. Typical V.35 Interface

LTC1543

APPLICATIO

S I

FOR

ATIO

No-Cable Mode

The no-cable mode (M0 = M1 = M2 = 1) is intended for the
case when the cable is disconnected from the connector.
The charge pump, bias circuitry, drivers and receivers are
turned off, the driver outputs are forced into a high
impedance state, and the supply current drops to less than
200

Charge Pump

The LTC1543 uses an internal capacitive charge pump to
generate V

and V

as shown in Figure 22. A voltage

doubler generates about 8V on V

and a voltage inverter

generates about 7.5V for V

. Four 1

F surface mounted

tantalum or ceramic capacitors are required for C1, C2, C3
and C4. The V

capacitor C5 should be a minimum of

3.3

F. All capacitors are 16V and should be placed as close

as possible to the LTC1543 to reduce EMI.

Receiver Fail-Safe

All LTC1543/LTC1544 receivers feature fail-safe opera-
tion in all modes. If the receiver inputs are left floating or
shorted together by a termination resistor, the receiver
output will always be forced to a logic high.

impedance of the receiver is placed in parallel with the T
network termination, but does not affect the overall input
impedance significantly.

The generator differential impedance must be 50

150

and the impedance between shorted terminals (A

and B) and ground C must be 150

. For the

generator termination, switches S1 and S2 are both on and
the top side of the center resistor is brought out to a pin so
it can be bypassed with an external capacitor to reduce
common mode noise as shown in Figure 21.

Any mismatch in the driver rise and fall times or skew in
the driver propagation delays will force current through
the center termination resistor to ground, causing a high
frequency common mode spike on the A and B terminals.
The common mode spike can cause EMI problems that are
reduced by capacitor C1 which shunts much of the com-
mon mode energy to ground rather than down the cable.

V.35 DRIVER

51.5

S1
ON

1543 F21

51.5

LTC1344A

124

C1
100pF

Figure 21. V.35 Driver Using the LTC1344A

1543 F22

C3
1

C4
1

C1
1

C2
1

C5
3.3

LTC1543

GND

Figure 22. Charge Pump

LTC1543

DTE vs DCE Operation

The DCE/DTE pin acts as an enable for Driver 3/Receiver
1 in the LTC1543, and Driver 3/Receiver 1 and Driver 4/
Receiver 4 in the LTC1544. The INVERT pin in the LTC1544
allows the Driver 4/Receiver 4 enable to be high or low true
polarity.

The LTC1543/LTC1544 can be configured for either DTE
or DCE operation in one of two ways: a dedicated DTE or
DCE port with a connector of appropriate gender or a port
with one connector that can be configured for DTE or DCE
operation by rerouting the signals to the LTC1543/LTC1544
using a dedicated DTE cable or dedicated DCE cable.

A dedicated DTE port using a DB-25 male connector is
shown in Figure 23. The interface mode is selected by logic
outputs from the controller or from jumpers to either V

or GND on the mode select pins. A dedicated DCE port
using a DB-25 female connector is shown in Figure 24.

A port with one DB-25 connector, but can be configured
for either DTE or DCE operation is shown in Figure 25. The
configuration requires separate cables for proper signal
routing in DTE or DCE operation. For example, in DTE
mode, the TXD signal is routed to Pins 2 and 14 via Driver
1 in the LTC1543. In DCE mode, Driver 1 now routes the
RXD signal to Pins 2 and 14.

Multiprotocol Interface with RL, LL, TM and a DB-25
Connector

If the RL, LL and TM signals are implemented, there are not
enough drivers and receivers available in the LTC1543/
LTC1544. In Figure 26, the required control signals are
handled by the LTC1544 but the clock/data signals use the

APPLICATIO

S I

FOR

ATIO

LTC1343. The LTC1343 has an additional single-ended
driver/receiver pair that can handle two more optional
control signals such as TM and LL.

Cable-Selectable Multiprotocol Interface

A cable-selectable multiprotocol DTE/DCE interface is
shown in Figure 27. The select lines M0, M1 and DCE/DTE
are brought out to the connector. The mode is selected by
the cable by wiring M0 (connector Pin 18) and M1 (con-
nector Pin 21) and DCE/DTE (connector Pin 25) to ground
(connector Pin 7) or letting them float. If M0, M1 or DCE/
DTE is floating, internal pull-up current sources will pull
the signals to V

. The select bit M2 is hard wired to V

When the cable is pulled out, the interface will go into the
no-cable mode.

Compliance Testing

A European standard EN 45001 test report is available for
the LTC1543/LTC1544/LTC1344A chipset. A copy of the
test report is available from LTC or TUV Telecom Services
Inc. (formerly Detecon Inc.)

The title of the report is:

Test Report No. NET2/102201/97.

The address of TUV Telecom Services Inc. is:

TUV Telecom Services Inc.
Type Approval Division
1775 Old Highway 8, Ste 107
St. Paul, MN 55112 USA
Tel. +1 (612) 639-0775
Fax. +1 (612) 639-0873

LTC1543

TYPICAL APPLICATIO

Figure 23. Controller-Selectable Multiprotocol DTE Port with DB-25 Connector

LTC1544

RTS

DTR

DSR

DCD

CTS

LTC1543

TXD

SCTE

TXC

RXC

RXD

DCE/DTE

GND

1543 F23

C2
1

C5
1

C3
1

C4
3.3

TXD A (103)

TXD B

SCTE A (113)

SCTE B

RXC A (115)

RXC B

RXD A (104)

RXD B

RTS A (105)

RTS B

DTR A (108)

DTR B

CTS A (106)

CTS B

LL A (141)

SHIELD

DB-25 MALE
CONNECTOR

TXC A (114)

TXC B

DCD A (109)

DCD B

DSR A (107)

DSR B

15 18 17 19 20 22

LTC1344A

100pF

23 24

DCE/DTE

CHARGE

PUMP

INVERT

C12
1

C13
1

C11
1

C10

C9
1

DCE/DTE

M2
M1
M0

LATCH

LTC1543

TYPICAL APPLICATIO

Figure 24. Controller-Selectable DCE Port with DB-25 Connector

LTC1544

CTS

DSR

DTR

DCD

RTS

LTC1543

RXD

RXC

TXC

SCTE

TXD

DCE/DTE

GND

1543 F24

C2
1

C5
1

C3
1

C4
3.3

RXD A (104)

RXD B

RXC A (115)

RXC B

SCTE A (113)

SCTE B

TXD A (103)

TXD B

CTS A (106)

CTS B

DSR A (107)

DSR B

RTS A (105)

RTS B

LL A (141)

SGND (102)

SHIELD (101)

DB-25 FEMALE

CONNECTOR

TXC A (114)

TXC B

DCD A (109)

DCD B

DTR A (108)

DTR B

15 18 17 19 20 22

LTC1344A

100pF

23 24

DCE/DTE

CHARGE

PUMP

INVERT

DCE/DTE

M2
M1
M0

LATCH

C12
1

C13
1

C11
1

C10

C9
1

LTC1543

TYPICAL APPLICATIO

Figure 25. Controller-Selectable Multiprotocol DTE/DCE Port with DB-25 Connector

LTC1544

LTC1543

DTE_TXD/DCE_RXD

DTE_TXC/DCE_TXC

DTE_RXC/DCE_SCTE

DTE_RXD/DCE_TXD

DTE_RTS/DCE_CTS

DTE_DTR/DCE_DSR

DTE_DCD/DCE_DCD

DTE_DSR/DCE_DTR

DTE_CTS/DCE_RTS

DTE_LL/DCE_LL

DTE_SCTE/DCE_RXC

DCE/DTE

GND

1543 F25

C2
1

C5
1

C3
1

C4
3.3

TXD A

TXD B

SCTE A

SCTE B

RXD A

RXD B

RXC A

RXC B

RXC A

RXC B

RXD A

RXD B

RTS A

RTS B

DTR A

DTR B

CTS A

CTS B

DSR A

DSR B

CTS A

CTS B

LL A

SHIELD

DB-25

CONNECTOR

TXC A

TXC B

SCTE A

SCTE B

TXD A

TXD B

TXC A

TXC B

DCD A

DCD B

DSR A

DSR B

RTS A

RTS B

LL A

DCD A

DCD B

DTR A

DTR B

15 18 17 19 20 22

LTC1344A

100pF

23 24

DCE/DTE

CHARGE

PUMP

INVERT

DCE/DTE

M2
M1
M0

DTE

DCE

LATCH

C12
1

C13
1

C11
1

C10

C9
1

LTC1543

TYPICAL APPLICATIO

Figure 26. Controller-Selectable Multiprotocol DTE/DCE Port with RL, LL, TM and DB-25 Connector

LTC1544

LTC1343

DTE_LL/DCE_TM

DTE_TXC/DCE_TXC

DTE_RXC/DCE_SCTE

DTE_RXD/DCE_TXD

DTE_TM/DCE_LL

DTE_RTS/DCE_CTS

DTE_DTR/DCE_DSR

DTE_DCD/DCE_DCD

DTE_DSR/DCE_DTR

DTE_CTS/DCE_RTS

DTE_RL/DCE_RL

DTE_TXD/DCE_RXD

DTE_SCTE/DCE_RXC

CTRL

LATCH

INVERT

423SET

GND

DCE

GND

1543 F26

C2
1

C5
1

C3
1

C4
3.3

LL A

TXD A

TXD B

SCTE A

SCTE B

TM A

RXD A

RXD B

RXC A

RXC B

RXC A

RXC B

RXD A

RXD B

RTS A

RTS B

DTR A

DTR B

CTS A

CTS B

DSR A

DSR B

CTS A

CTS B

RL A

SHIELD

DB-25

CONNECTOR

TXC A

TXC B

SCTE A

SCTE B

TXD A

TXD B

TXC A

TXC B

DCD A

DCD B

DSR A

DSR B

RTS A

RTS B

RL A

DCD A

DCD B

DTR A

DTR B

15 18 17 19 20 22

LTC1344A

100pF

23 24

DCE/DTE

10
12
13

100k

INVERT

DCE/DTE

M2
M1
M0

DTE

DCE

TM A

LL A

LATCH

C12
1

C13
1

C11
1

C10

C9
1

CHARGE

PUMP

LTC1543

TYPICAL APPLICATIO

Figure 27. Cable-Selectable Multiprotocol DTE/DCE Port with DB-25 Connector

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.

LTC1544

LTC1543

DTE_TXD/DCE_RXD

DTE_TXC/DCE_TXC

DTE_RXC/DCE_SCTE

DTE_RXD/DCE_TXD

DTE_RTS/DCE_CTS

DTE_DTR/DCE_DSR

DTE_DCD/DCE_DCD

DTE_DSR/DCE_DTR

DTE_CTS/DCE_RTS

DTE_SCTE/DCE_RXC

DCE/DTE

GND

1543/44 F27

C2
1

C5
1

C3
1

C4
3.3

TXD A

TXD B

SCTE A

SCTE B

RXD A

RXD B

RXC A

RXC B

RXC A

RXC B

RXD A

RXD B

RTS A

RTS B

DTR A

DTR B

CTS A

CTS B

DSR A

DSR B

CTS A

CTS B

SHIELD

DCE/DTE

DB-25

CONNECTOR

TXC A

TXC B

SCTE A

SCTE B

TXD A

TXD B

TXC A

TXC B

DCD A

DCD B

DSR A

DSR B

RTS A

RTS B

DCD A

DCD B

DTR A

DTR B

15 18 17 19 20 22

LTC1344A

100pF

23 24

DCE/DTE

INVERT

DCE/DTE

DTE

DCE

MODE

PIN 18

PIN 21

V.35

PIN 7

RS449, V.36

PIN 7

RS232

PIN 7

CABLE WIRING FOR MODE SELECTION

MODE

PIN 25

DTE

PIN 7

DCE

CABLE WIRING FOR

DTE/DCE SELECTION

LATCH

C12
1

C13
1

C11
1

C10

C9
1

CHARGE

PUMP

LTC1543

1543fs, sn1543x LT/TP 0898 4K · PRINTED IN

USA

LINEAR TECHNOLOGY CORPORATION 1998

Dimensions in inches (millimeters) unless otherwise noted.

PACKAGE DESCRIPTIO

G Package

28-Lead Plastic SSOP (0.209)

(LTC DWG # 05-08-1640)

RELATED PARTS

PART NUMBER

DESCRIPTION

COMMENTS

LTC1321

Dual RS232/RS485 Transceiver

Two RS232 Driver/Receiver Pairs or Two RS485 Driver/Receiver Pairs

LTC1334

Single 5V RS232/RS485 Multiprotocol Transceiver

Two RS232 Driver/Receiver or Four RS232 Driver/Receiver Pairs

LTC1343

Software-Selectable Multiprotocol Transceiver

4-Driver/4-Receiver for Data and Clock Signals

LTC1344A

Software-Selectable Cable Terminator

Perfect for Terminating the LTC1543

LTC1345

Single Supply V.35 Transceiver

3-Driver/3-Receiver for Data and Clock Signals

LTC1346A

Dual Supply V.35 Transceiver

3-Driver/3-Receiver for Data and Clock Signals

LTC1544

Software-Selectable Multiprotocol Transceiver

Companion to LTC1543 for Control Signals

G28 SSOP 0694

0.005 0.009

(0.13 0.22)

0.022 0.037

(0.55 0.95)

0.205 0.212**

(5.20 5.38)

0.301 0.311

(7.65 7.90)

2 3

6 7 8

9 10 11 12

0.397 0.407*

(10.07 10.33)

22 21 20 19 18 17 16 15

0.068 0.078

(1.73 1.99)

0.002 0.008

(0.05 0.21)

0.0256

(0.65)

BSC

0.010 0.015

(0.25 0.38)

DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE

DIMENSIONS DO NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE

Linear Technology Corporation

1630 McCarthy Blvd., Milpitas, CA 95035-7417

(408) 432-1900

FAX: (408) 434-0507

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