IT8706R
Special General Purpose I/O
Preliminary Specification V0.1
Copyright
2000 ITE, Inc.
This is Preliminary document release. All specifications are subject to change without notice.
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Contents
www.ite.com.tw IT8706R V0.1
www.iteusa.com
i
CONTENTS
1. Features ...........................................................................................................................................................1
2. General Description..........................................................................................................................................1
3. Block Diagram ..................................................................................................................................................3
4. Pin Configuration..............................................................................................................................................5
5. IT8706R Pin Descriptions (26 signal pins + 2 VCC/GND) ...............................................................................7
6. System Configuration.......................................................................................................................................9
6.1
Overview................................................................................................................................................9
6.2
Register Descriptions ..........................................................................................................................10
6.2.1
Configure Control -- Index 02h ..............................................................................................11
6.2.2
Logical Device Number (LDN) -- Index 07h ..........................................................................11
6.2.3
Chip ID Byte 1 -- Index 20h ...................................................................................................11
6.2.4
Chip ID Byte 2 -- Index 21h ...................................................................................................11
6.2.5
Chip Version -- Index 22h......................................................................................................11
6.2.6
Test Mode Register -- Index 2Fh...........................................................................................12
6.2.7
Simple I/O Base Address MSB Register -- Index 60h...........................................................12
6.2.8
Simple I/O Base Address LSB Register -- Index 61h............................................................12
6.2.9
Panel Button De-bounce Base Address MSB Register -- Index 62h ....................................12
6.2.10 Panel Button De-bounce Base Address LSB Register -- Index 63h .....................................12
6.2.11 GPIO Pin Set 1, 2 and 3 Polarity Registers -- Index F0h, F1h and F2h ...............................12
6.2.12 Simple I/O Set 1, 2, and 3 Output Enable Registers -- Index F3h, F4h and F5h..................12
6.2.13 Panel Button De-bounce Control Register -- Index F6h........................................................13
6.2.14 Panel Button De-bounce Set 1, 2, and 3 Enable Registers -- Index F7h, F8h and F9h .......13
7. Functional Description....................................................................................................................................15
7.1
LPC Interface.......................................................................................................................................15
7.1.1
LPC Transactions ...................................................................................................................15
7.2
General Purpose I/O ...........................................................................................................................15
7.3
Power On Strapping Options...............................................................................................................16
8. DC Characteristics .........................................................................................................................................17
9. AC Characteristics..........................................................................................................................................19
10. Package Information ......................................................................................................................................21
11. Ordering Information ......................................................................................................................................23
FIGURES
Figure 7-1. General Logic of GPIO Function.......................................................................................................16
Figure 9-1. LCLK Waveform................................................................................................................................19
Figure 9-2. LPC Waveform..................................................................................................................................19
TABLES
Table 4-1. Pins Listed in Numeric Order ...............................................................................................................5
Table 4-2. Pins Listed in Alphabetical Order .........................................................................................................5
Table 6-1. Configuration Register List .................................................................................................................10
Table 9-1. LCLK and LRESET# AC Table ..........................................................................................................19
Table 9-2. LPC AC Table.....................................................................................................................................19
www.ite.com.tw
IT8706R V0.1
www.iteusa.com ITPM-PN-200012 Joseph Huang, Feb. 21, 2000
1
Features & General Description
1. Features
Low Pin Count Interface
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Complies with Intel Low Pin Count Interface Specification Rev. 1.0
18 General Purpose I/O Pins
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Input mode supports switch de-bounce
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Simple Input/Output function
Single +5V Power Supply
28-pin SOP
2. General Description
The IT8706R is a Low Pin Count Interface-based General Purpose I/O (GPIO) chip. The IT8706R provides 18
GPIO ports with internal button de-bounced circuits and SMI generation circuit. The device operates with only
single +5V power supply. The IT8706R is available in 28-pin SOP package.
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