1
FN8110.0
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
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PRELIMINARY
X3100, X3101
4 cell/3 cell
3 or 4 Cell Li-Ion Battery Protection and
Monitor IC
FEATURE
Software Selectable Protection Levels and
Variable Protect Detection/Release Times
Integrated FET Drive Circuitry
Cell Voltage and Current Monitoring
0.5% Accurate Voltage Regulator
Integrated 4kbit EEPROM
Flexible Power Management with 1A Sleep
Mode
Cell Balancing Control
BENEFIT
Optimize protection for chosen cells to allow
maximum use of pack capacity.
Reduce component count and cost
Simplify implementation of gas gauge
Accurate voltage and current measurements
Record battery history to optimize gas gauge,
track pack failures and monitor system use
Reduce power to extend battery life
Increase battery capacity and improve cycle life
battery life
DESCRIPTION
The X3100 is a protection and monitor IC for use in bat-
tery packs consisting of 4 series Lithium-Ion battery
cells. The X3101 is designed to work in 3 cell applica-
tions. Both devices provide internal over-charge, over-
discharge, and over-current protection circuitry, internal
EEPROM memory, an internal voltage regulator, and
internal drive circuitry for external FET devices that con-
trol cell charge, discharge, and cell voltage balancing.
Over-charge, over-discharge, and over-current thresh-
olds reside in an internal EEPROM memory register and
are selected independently via software using a 3MHz
SPI serial interface. Detection and time-out delays can
also be individually varied using external capacitors.
Using an internal analog multiplexer, the X3100 or
X3101 allow battery parameters such as cell voltage
and current (using a sense resistor) to be monitored
externally by a separate microcontroller with A/D con-
verter. Software on this microcontroller implements
gas gauge and cell balancing functionality in software.
The X3100 and X3101 contain a current sense ampli-
fier. Selectable gains of 10, 25, 80 and 160 allow an
external 10 bit A/D converter to achieve better resolu-
tion than a more expensive 14 bit converter.
An internal 4kbit EEPROM memory featuring
IDLock
TM
, allows the designer to partition and "lock in"
written battery cell/pack data.
The X3100 and X3101 are each housed in a 28 Pin
TSSOP package.
FUNCTIONAL DIAGRAM
Protection Circuit
Timing Control
& Configuration
OVT UVT OCT
FET Control
Circuitry
4 kbit
EEPROM
Analog
MUX
SPI
I/F
5VDC
Regulator
Internal Voltage Regulator
Power-on reset &
Status Register
VSS
VCELL1
CB1
VCC
RGP
OVP/LMON
UVP/OCP
AS0
AS1
AS2
AO
S0
SCK
CS
SI
CB3
CB2
CB4
VCELL2
VCELL3
VCELL4/VSS
Protection
Sample Rate
Timer
RGC RGO
Configuration
Register
Over-current
Protection &
Current Sense
VCS1 VCS2
Over-charge
Over-discharge
Protection
Sense
Circuits
Control
Register
Data Sheet
April 11, 2005
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FN8110.0
April 11, 2005
PIN CONFIGURATION
X3100/X3101 Ordering Codes
Ordering Number
VCC Limits
Package
Temperature Range
X3100V28
6V to 24V
28-Lead TSSOP package
-20C to +70C
X3101V28
6V to 24V
28-Lead TSSOP package
-20C to +70C
VCC
RGP
RGC
RGO
VCELL1
CB1
VCELL2
CB2
1
2
3
4
28
27
26
25
28 Lead TSSOP
UVP/OCP
OVP/LMON
CS
SCK
VCELL3
CB3
VCELL4/VSS*
CB4
5
6
7
8
24
23
22
21
X3100/
SO
SI
AS2
AS1
VSS
VCS1
VCS2
OVT
9
10
11
12
20
19
18
17
AS0
AO
UVT
OCT
13
14
16
15
X3101
*For X3101, Connect to ground.
PIN NAMES
Pin
Symbol
Brief Description
1
VCELL1
Battery cell 1 voltage input. This pin is used to monitor the voltage of this battery cell internally.
The voltage of an individual cell can also be monitored externally at pin AO.
The X3100 monitors 4 battery cells. The X3101 monitors 3 battery cells.
2
CB1
Cell balancing FET control output 1. This output is used to switch an external FET in order to
perform cell voltage balancing control. This function can be used to adjust an individual cell voltage
(e.g. during cell charging). CB1 can be driven high (Vcc) or low (Vss) to switch the external FET
ON/OFF.
3
VCELL2
Battery cell 2 voltage. This pin is used to monitor the voltage of this battery cell internally. The voltage
of an individual cell can also be monitored externally at pin AO.
The X3100 monitors 4 battery cells. The X3101 monitors 3 battery cells.
4
CB2
Cell balancing FET control output 2. These outputs are used to switch an external FETs in order to
perform cell voltage balancing control. This function can be used to adjust individual cell voltages (e.g.
during cell charging). CB2 can be driven high (Vcc) or low (Vss) to switch the external FET ON/OFF.
5
VCELL3
Battery cell 3 voltage. This pin is used to monitor the voltage of each battery cell internally. The
voltage of an individual cell can also be monitored externally at pin AO.
The X3100 monitors 4 battery cells. The X3101 monitors 3 battery cells.
6
CB3
Cell balancing FET control output 3. This output is used to switch an external FET in order to
perform cell voltage balancing control. This function can be used to adjust an individual cell voltage (e.g.
during cell charging). CB3 can be driven high (Vcc) or low (Vss) to switch the external FET ON/OFF.
7
VCELL4/
VSS
Battery cell 4 voltage (X3100) Ground (X3101). This pin is used to monitor the voltage of this battery
cell internally. The voltage of an individual cell can also be monitored externally at pin AO.
The X3100 monitors 4 battery cells. The X3101 monitors 3 battery cells. For the X3101 device connect
the VCELL4/VSS pin to ground.
X3100, X3101
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FN8110.0
April 11, 2005
8
CB4
Cell balancing FET control output 4. This output is used to switch an external FET in order to
perform cell voltage balancing control. This function can be used to adjust individual cell voltages
(e.g. during cell charging). CB4 can be driven high (Vcc) or low (Vss) to switch the external FET ON/OFF.
When using the X3101, the CB4 pin can be left unconnected, or the FET control can be used for other
purposes.
9
VSS
Ground.
10
VCS1
Current sense voltage pin 1. A sense resistor (R
SENSE
) is connected between VCS1 and VCS2 (Figure
1). R
SENSE
has a resistance in the order of 20m
to 100m
, and is used to monitor current flowing
through the battery terminals, and protect against over-current conditions. The voltage at each end of
R
SENSE
can also be monitored at pin AO.
11
VCS2
Current sense voltage pin 2. A sense resistor (R
SENSE
) is connected between VCS1 and VCS2 (Figure
1). R
SENSE
has a resistance in the order of 20m
to 100m
, and is used to monitor current flowing
through the battery terminals, and protect against over-current conditions. The voltage at each end of
R
SENSE
can also be monitored at pin AO.
12
OVT
Over-charge detect/release time input. This pin is used to control the delay time (T
OV
) associated with
the detection of an over-charge condition (see section "Over-charge Protection" on page 14).
13
UVT
Over-discharge detect/release time input. This pin is used to control the delay times associated with
the detection (T
UV
) and release (T
UVR
) of an over-discharge (under-voltage) condition (see section
"Over-discharge Protection" on page 16).
14
OCT
Over-current detect/release time input. This pin is used to control the delay times associated with the
detection (T
OC
) and release (T
OCR
) of an over-current condition (see section "Over-Current Protection"
on page 19).
15
AO
Analog multiplexer output. The analog output pin is used to externally monitor various battery param-
eter voltages. The voltages which can be monitored at AO (see section "Analog Multiplexer Selection"
on page 21) are:
Individual cell voltages
Voltage across the current sense resistor (R
SENSE
)
.
This voltage is amplified with a gain set by the
user in the control register (see section "Current Monitor Function" on page 21.)
The analog select pins pins AS0 - AS2 select the desired voltage to be monitored on the AO pin.
16 AS0
Analog output select pin 0. These pins select which voltage is to be multiplexed to the output AO (see
section "Sleep Control (SLP)" on page 11 and section "Current Monitor Function" on page 21)
17
AS1
Analog output select pin 1. These pins select which voltage is to be multiplexed to the output AO (see
section "Sleep Control (SLP)" on page 11 and section "Current Monitor Function" on page 21)
18
AS2
Analog output select pin 2. These pins select which voltage is to be multiplexed to the output AO (see
section "Sleep Control (SLP)" on page 11 and section "Current Monitor Function" on page 21)
19
SI
Serial data input. SI is the serial data input pin. All opcodes, byte addresses, and data to be written to
the device are input on this pin.
20
SO
Serial data output. SO is a push/pull serial data output pin. During a read cycle, data is shifted out on
this pin. Data is clocked out by the falling edge of the serial clock. While CS is HIGH, SO will be in a High
Impedance state.
Note: SI and SO may be tied together to form one line (SI/SO). In this case, all serial data communication
with the X3100 or X3101 is undertaken over one I/O line. This is permitted ONLY if no simultaneous
read/write operations occur.
21
SCK
Serial data clock input. The Serial Clock controls the serial bus timing for data input and output. Op-
codes, addresses, or data present on the SI pin are latched on the rising edge of the clock input, while
data on the SO pin change after the falling edge of the clock input.
22
CS
Chip select input pin. When CS is HIGH, the device is deselected and the SO output pin is at high im-
pedance. CS LOW enables the SPI serial bus.
PIN NAMES
(Continued)
Pin
Symbol
Brief Description
X3100, X3101
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April 11, 2005
23
OVP/
LMON
Over-charge Voltage Protection output/Load Monitor output. This one pin performs two functions
depending upon the present mode of operation of the X3100 or X3101.
Over-charge Voltage Protection (OVP)
This pin controls the switching of the battery pack charge FET. This power FET is a P-channel device. As
such, cell charge is possible when OVP/LMON=V
SS
, and cell charge is prohibited when OVP/LMO = V
CC
.
In this configuration the X3100 and X3101 turn off the charge voltage when the cells reach the over-charge
limit. This prevents damage to the battery cells due to the application of charging voltage for an extended
period of time (see section "Over-charge Protection" on page 14).
Load Monitor (LMON)
In Over-current Protection mode, a small test current (7.5A typ.) is passed out of this pin to sense the
load resistance. The measured load resistance determines whether or not the X3100 or X3101 returns
from an over-current protection mode (see section "Over-Current Protection" on page 19).
24
UVP/
OCP
Over-discharge protection output/Over-current protection output. Pin UVP/OCP controls the bat-
tery cell discharge via an external power FET. This P-channel FET allows cell discharge when
UVP/OCP=Vss, and prevents cell discharge when UVP/OCP=Vcc. The X3100 and X3101 turn the ex-
ternal power FET off when the X3100 or X3101 detects either:
Over-discharge Protection (UVP)
In this case, pin 24 is referred to as "Over-discharge (Under-Voltage) protection (UVP)" (see section
"Over-discharge Protection" on page 16). UVP/OCP turns off the FET to prevent damage to the battery
cells by being discharged to excessively low voltages.
Over-current protection (OCP)
In this case, pin 24 is referred to as "Over-current protection (OCP)" (see section "Over-Current Protec-
tion" on page 19). UVP/OCP turns off the FET to prevent damage to the battery pack caused by exces-
sive current drain (e.g. as in the case of a surge current resulting from a stalled disk drive).
25
RGO
Voltage regulator output pin. This pin is an input that connects to the collector of an external PNP tran-
sistor. The voltage at this pin is the regulated output voltage, but it also provides the feedback voltage
for the regulator and the operating voltage for the device.
26
RGC
Voltage regulator control pin. This pin connects to the base of an external PNP transistor and controls
the transistor turn on.
27
RGP
Voltage regulator protection pin. This pin is an input that connects to the emitter of an external PNP
transistor and an external current limit resistor and provides a current limit voltage.
28
VCC
Power supply. This pin is provides the voltage for FET control, regulator operation, and wake-up
circuits.
PIN NAMES
(Continued)
Pin
Symbol
Brief Description
X3100, X3101
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April 11, 2005
PRINCIPLES OF OPERATION
The X3100 and X3101 provide two distinct levels of
functionality and battery cell protection:
First, in Normal mode, the device periodically checks
each cell for an over-charge and over-discharge state,
while continuously watching for a pack over-current
condition. A protection mode violation results from an
over-charge, over-discharge, or over-current state.
The thresholds for these states are selected by the
user through software. When one of these conditions
occur, a Discharge FET or a Charge FET or both FETs
are turned off to protect the battery pack. In an over-
discharge condition, the X3100 and X3101 devices go
into a low power sleep mode to conserve battery
power. During sleep, the voltage regulator turns off,
removing power from the microcontroller to further
reduce pack current.
Second, in Monitor mode, a microcontroller with A/D
converter measures battery cell voltage and pack cur-
rent via pin AO and the X3100 or X3101 on-board MUX.
The user can thus implement protection, charge/dis-
charge, cell balancing or gas gauge software algorithms
to suit the specific application and characteristics of the
cells used. While monitoring these voltages, all protec-
tion circuits are on continuously.
In a typical application, the microcontroller is also pro-
grammed to provide an SMBus interface along with
the Smart Battery System interface protocols. These
additions allow an X3100 or X3101 based module to
adhere to the latest industry battery pack standards.
TYPICAL APPLICATION CIRCUIT
The X3100 and X3101 have been designed to operate
correctly when used as connected in the Typical Appli-
cation Circuit (see Figure 1 on page 5).
The power MOSFET's Q1 and Q2 are referred to as
the "Discharge FET" and "Charge FET," respectively.
Since these FETs are p-channel devices, they will be
ON when the gates are at V
SS
, and OFF when the
gates are at V
CC
. As their names imply, the discharge
FET is used to control cell discharge, while the charge
FET is used to control cell charge. Diode D1 allows the
battery cells to receive charge even if the Discharge
FET is OFF, while diode D2 allows the cells to dis-
charge even if the charge FET is OFF. D1 and D2 are
integral to the Power FETs. It should be noted that the
cells can neither charge nor discharge if both the
charge FET and discharge FET are OFF.
Power to the X3100 or X3101 is applied to pin VCC via
diodes D6 and D7. These diodes allow the device to
be powered by the Li-Ion battery cells in normal oper-
ating conditions, and allow the device to be powered
by an external source (such as a charger) via pin P+
when the battery cells are being charged. These
diodes should have sufficient current and voltage rat-
ings to handle both cases of battery cell charge and
discharge.
The operation of the voltage regulator is described in
section "Voltage Regulator" on page 22. This regulator
provides a 5VDC0.5% output. The capacitor (C1)
connected from RGO to ground provides some noise
filtering on the RGO output. The recommended value
is 0.1F or less. The value chosen must allow V
RGO
to
decay to 0.1V in 170ms or less when the X3100 or
X3101 enter the sleep mode. If the decay is slower
than this, a resistor (R1) can be placed in parallel with
the capacitor.
During an initial turn-on period (T
PUR
+ T
OC
), V
RGO
has a stable, regulated output in the range of 5VDC
10% (see Figure 2). The selection of the microcontrol-
ler should take this into consideration. At the end of
this turn on period, the X3100 and X3101 "self-tunes"
the output of the voltage regulator to 5V+/-0.5%. As
such, V
RGO
can be used as a reference voltage for the
A/D converter in the microcontroller. Repeated power-
up operations, consistently re-apply the same "tuned"
value for V
RGO
.
Figure 1 shows a battery pack temperature sensor
implemented as a simple resistive voltage divider, uti-
lizing a thermistor (R
T
) and resistor (R
T
'). The voltage
V
T
can be fed to the A/D input of a microcontroller and
used to measure and monitor the temperature of the
battery cells. R
T
' should be chosen with consideration
of the dynamic resistance range of R
T
as well as the
input voltage range of the microcontroller A/D input.
An output of the microcontroller can be used to turn on
the thermistor divider to allow periodic turn-on of the
sensor. This reduces power consumption since the
resistor string is not always drawing current.
Diode D3 is included to facilitate load monitoring in an
Over-current protection mode (see section "Over-Cur-
rent Protection" on page 19), while preventing the flow
of current into pin OVP/LMON during normal opera-
tion. The N-Channel transistor turns off this function
during the sleep mode.
Resistor R
PU
is connected across the gate and drain
of the charge FET (Q2). The discharge FET Q1 is
turned off by the X3100 or X3101, and hence the volt-
age at pin OVP/LMON will be (at maximum) equal to
the voltage of the battery terminal, minus one forward
biased diode voltage drop (V
P+
- V
D7
). Since the drain
of Q2 is connected to a higher potential (V
P+
) a pull-up
resistor (R
PU
) in the order of 1M
should be used to
ensure that the charge FET is completely turned OFF
when OVP/LMON = V
CC
.
X3100, X3101
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