1
TM
File Number
4997.1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
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Intersil (and design) is a trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2001. All Rights Reserved
Pentium is a registered trademark of Intel Corporation.
HIP6004E
Buck and Synchronous-Rectifier (PWM)
Controller and Output Voltage Monitor
The HIP6004E provides complete control and protection for a
DC-DC converter optimized for high-performance
microprocessor applications. It is designed to drive two
N-Channel MOSFETs in a synchronous-rectified buck
topology. The HIP6004E integrates all of the control, output
adjustment, monitoring and protection functions into a single
package.
The output voltage of the converter is easily adjusted and
precisely regulated. The HIP6004E includes a 5-input digital-
to-analog converter (DAC) that adjusts the output voltage
from 1.05V
DC
to 1.825V
DC
in 25mV increments steps. The
precision reference and voltage-mode regulator hold the
selected output voltage to within
1% over temperature and
line voltage variations.
The HIP6004E provides simple, single feedback loop,
voltage-mode control with fast transient response. It includes
a 200kHz free-running triangle-wave oscillator that is
adjustable from below 50kHz to over 1MHz. The error
amplifier features a 15MHz gain-bandwidth product and
6V/
s slew rate which enables high converter bandwidth for
fast transient performance. The resulting PWM duty ratio
ranges from 0% to 100%.
The HIP6004E monitors the output voltage with a window
comparator that tracks the DAC output and issues a Power
Good signal when the output is within
10%. The HIP6004E
protects against over-current and overvoltage conditions by
inhibiting PWM operation. Additional built-in overvoltage
protection triggers an external SCR to crowbar the input
supply. The HIP6004E monitors the current by using the
r
DS(ON)
of the upper MOSFET which eliminates the need for
a current sensing resistor.
Pinout
HIP6004E
TOP VIEW
1
Features
Drives two N-Channel MOSFETs
Operates from +5V or +12V Input
Simple single-loop control design
- Voltage-mode PWM control
Fast transient response
- High-bandwidth error amplifier
- Full 0% to 100% Duty Ratio
Excellent output voltage regulation
-
1% Over Line Voltage and Temperature
5-Bit digital-to-analog output
Voltage Selection
- 25mV binary steps . . . . . . . . . . . 1.05V
DC
to 1.825V
DC
Power good output voltage monitor
Overvoltage and overcurrent fault monitors
- Does not require extra current sensing element,
Uses MOSFET's r
DS(ON)
Small Converter Size
- Constant Frequency Operation
- 200kHz Free-Running Oscillator Programmable from
50kHz to over 1MHz
Applications
VRM8.5 modules for Pentium III and Other
Microprocessors
High-Power DC-DC Regulators
Low-Voltage Distributed Power Supplies
Related Literature
Technical Brief TB363 "Guidelines for Handling and
Processing Moisture Sensitive Surface Mount Devices
(SMDs)"
11
12
13
14
15
16
17
18
20
19
10
9
8
7
6
5
4
3
2
1
VSEN
OCSET
SS
VID25mV
VID0
VID1
VID3
VID2
COMP
FB
RT
VCC
LGATE
PGND
OVP
BOOT
UGATE
PHASE
PGOOD
GND
Ordering Information
PART NUMBER
TEMP.
RANGE (
o
C)
PACKAGE
PKG.
NO.
HIP6004ECB
0 to 70
20 Ld SOIC
M20.3
HIP6004ECV
0 to 70
20 Ld TSSOP
M20.173
NOTE: When ordering, use the entire part number. Add the suffix T
to obtain the part in tape and reel, e.g., HIP6004ECB-T.
Data Sheet
October 2001
2
Typical Application
Block Diagram
+12V
+V
OUT
PGND
HIP6004E
VSEN
RT
FB
COMP
VID25mV
VID0
VID1
VID2
SS
PGOOD
D/A
GND
OSC
LGATE
UGATE
OCSET
PHASE
BOOT
VCC
V
IN
= +5V OR +12V
OVP
MONITOR AND
PROTECTION
+
-
+
-
VID3
D/A
CONVERTER
(DAC)
OSCILLATOR
SOFT-
START
REFERENCE
POWER-ON
RESET (POR)
115%
110%
90%
INHIBIT
PWM
COMPARATOR
ERROR
AMP
VCC
PGOOD
SS
PWM
OVP
RT
GND
VSEN
OCSET
VID25mV
VID0
VID1
VID2
FB
COMP
DACOUT
OVER-
VOLTAGE
OVER-
CURRENT
GATE
CONTROL
LOGIC
BOOT
UGATE
PHASE
200
A
10
A
4V
+
-
+
-
+
-
+
-
+
-
+
-
VID3
LGATE
PGND
HIP6004E
3
Absolute Maximum Ratings
Thermal Information
Supply voltage, V
CC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+15V
Boot voltage, V
BOOT
- V
PHASE
. . . . . . . . . . . . . . . . . . . . . . . . .+15V
Input, output or I/O voltage . . . . . . . . . . . . GND -0.3V to V
CC
+0.3V
ESD classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 2
Operating Conditions
Supply voltage, V
CC
. . . . . . . . . . . . . . . . . . . . . . . . . . . +12V
10%
Ambient temperature range . . . . . . . . . . . . . . . . . . . . . . 0
o
C to 70
o
C
Thermal resistance (Typical, Note 1)
JA
(
o
C/W)
SOIC package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
65
TSSOP package . . . . . . . . . . . . . . . . . . . . . . . . . . .
90
Maximum junction temperature . . . . . . . . . . . . . . . . . . . . . . . 150
o
C
Maximum storage temperature range . . . . . . . . . . . -65
o
C to 150
o
C
Maximum lead temperature (soldering 10s) . . . . . . . . . . . . . 300
o
C
(lead tips only)
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1.
JA
is measured with the component mounted on a high-effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
Electrical Specifications
Recommended operating conditions, unless otherwise noted
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
VCC SUPPLY CURRENT
Nominal supply
I
CC
UGATE and LGATE open
-
5
-
mA
POWER-ON RESET
Rising VCC threshold
V
OCSET
= 4.5V
-
-
10.4
V
Falling VCC threshold
V
OCSET
= 4.5V
8.2
-
-
V
Rising V
OCSET
threshold
-
1.26
-
V
OSCILLATOR
Free running frequency
RT = open
185
200
215
kHz
Total variation
6k
< RT to GND < 200k
-15
-
+15
%
Ramp amplitude
V
OSC
RT = open
-
1.9
-
V
P-P
REFERENCE AND DAC
DAC (VID0-VID4) input low voltage
-
-
0.8
V
DAC (VID0-VID4) input high voltage
2.0
-
-
V
DACOUT voltage accuracy
-1.0
-
+1.0
%
ERROR AMPLIFIER
DC gain
-
88
-
dB
Gain-bandwidth product
GBWP
-
15
-
MHz
Slew rate
SR
COMP = 10pF
-
6
-
V/
s
GATE DRIVERS
Upper gate source
I
UGATE
V
BOOT
- V
PHASE
= 12V, V
UGATE
= 6V
350
500
-
mA
Upper gate sink
R
UGATE
I
LGATE
= 0.3A
-
5.5
10
Lower gate source
I
LGATE
V
CC
= 12V, V
LGATE
= 6V
300
450
-
mA
Lower gate sink
R
LGATE
I
LGATE
= 0.3A
-
3.5
6.5
PROTECTION
Overvoltage trip (VSEN/DACOUT)
-
115
120
%
OCSET current source
I
OCSET
V
OCSET
= 4.5V
DC
170
200
230
A
OVP sourcing current
I
OVP
V
SEN
= 5.5V, V
OVP
= 0V
60
-
-
mA
Soft start current
I
SS
-
10
-
A
POWER GOOD
Upper threshold (VSEN /DACOUT)
VSEN rising
106
-
111
%
Lower threshold (VSEN /DACOUT)
VSEN falling
89
-
94
%
Hysteresis (VSEN/DACOUT)
Upper and lower threshold
-
2
-
%
PGOOD voltage low
V
PGOOD
I
PGOOD
= -5mA
-
0.3
-
V
HIP6004E
4
Functional Pin Descriptions
VSEN (Pin 1)
This pin is connected to the converter's output voltage. The
PGOOD and OVP comparator circuits use this signal to
report output voltage status and for overvoltage protection.
OCSET (Pin 2)
Connect a resistor (R
OCSET
) from this pin to the drain of the
upper MOSFET. R
OCSET
, an internal 200
A current source
(I
OCSET
), and the upper MOSFET on-resistance (r
DS(ON)
)
set the converter overcurrent (OC) trip point according to the
following equation:
An over-current trip cycles the soft-start function.
SS (Pin 3)
Connect a capacitor from this pin to ground. This capacitor,
along with an internal 10
A current source, sets the soft-
start interval of the converter.
VID25mV-VID3 (Pins 4-8)
VID25mV - VID3 are the input pins to the 5-bit DAC. The
states of these five pins program the internal voltage
reference (DACOUT). The level of DACOUT sets the
converter output voltage. It also sets the PGOOD and OVP
thresholds. Table 1 specifies DACOUT for the all
combinations of DAC inputs.
COMP (Pin 9) and FB (Pin 10)
COMP and FB are the available external pins of the error
amplifier. The FB pin is the inverting input of the error
amplifier and the COMP pin is the error amplifier output.
These pins are used to compensate the voltage-control
feedback loop of the converter.
GND (Pin 11)
Signal ground for the IC. All voltage levels are measured
with respect to this pin.
PGOOD (Pin 12)
PGOOD is an open collector output used to indicate the
status of the converter output voltage. This pin is pulled low
when the converter output is not within
10%
of the
DACOUT reference voltage.
PHASE (Pin 13)
Connect the PHASE pin to the upper MOSFET source. This
pin is used to monitor the voltage drop across the MOSFET
for overcurrent protection. This pin also provides the return
path for the upper gate drive.
UGATE (Pin 14)
Connect UGATE to the upper MOSFET gate. This pin
provides the gate drive for the upper MOSFET.
BOOT (Pin 15)
This pin provides bias voltage to the upper MOSFET driver.
A bootstrap circuit may be used to create a BOOT voltage
suitable to drive a standard N-Channel MOSFET.
Typical Performance Curves
FIGURE 1. R
T
RESISTANCE vs FREQUENCY
FIGURE 2. BIAS SUPPLY CURRENT vs FREQUENCY
10
100
1000
SWITCHING FREQUENCY (kHz)
RE
S
I
S
T
ANCE
(
k
)
10
100
1000
R
T
PULLUP
TO +12V
R
T
PULLDOWN TO V
SS
100
200
300
400
500
600
700
800
900
1000
I
CC
(mA
)
SWITCHING FREQUENCY (kHz)
C
GATE
= 3300pF
C
GATE
= 1000pF
C
GATE
= 10pF
C
UPPER
= C
LOWER
= C
GATE
80
70
60
50
40
30
20
10
0
11
12
13
14
15
16
17
18
20
19
10
9
8
7
6
5
4
3
2
1
VSEN
OCSET
SS
VID25mV
VID0
VID1
VID3
VID2
COMP
FB
RT
VCC
LGATE
PGND
OVP
BOOT
UGATE
PHASE
PGOOD
GND
I
PEAK
I
OCSET
x R
OCSET
r
DS ON
(
)
-----------------------------------------------------
=
HIP6004E
5
PGND (Pin 16)
This is the power ground connection. Tie the lower MOSFET
source to this pin.
LGATE (Pin 17)
Connect LGATE to the lower MOSFET gate. This pin
provides the gate drive for the lower MOSFET.
VCC (Pin 18)
Provide a 12V bias supply for the chip to this pin.
OVP (Pin 19)
The OVP pin can be used to drive an external SCR in the
event of an overvoltage condition. Output rising 15% more
than the DAC-set voltage triggers a high output on this pin
and disables PWM gate drive circuitry.
RT (Pin 20)
This pin provides oscillator switching frequency adjustment.
By placing a resistor (R
T
) from this pin to GND, the nominal
200kHz switching frequency is increased according to the
following equation:
Conversely, connecting a pull-up resistor (R
T
) from this pin
to V
CC
reduces the switching frequency according to the
following equation:
RT pin has a constant voltage of 1.26V typically.
Functional Description
Initialization
The HIP6004E automatically initializes upon receipt of power.
Special sequencing of the input supplies is not necessary. The
Power-On Reset (POR) function continually monitors the input
supply voltages. The POR monitors the bias voltage at the VCC
pin and the input voltage (V
IN
) on the OCSET pin. The level on
OCSET is equal to V
IN
less a fixed voltage drop (see over-
current protection). The POR function initiates soft-start
operation after both input supply voltages exceed their POR
thresholds. For operation with a single +12V power source, V
IN
and V
CC
are equivalent and the +12V power source must
exceed the rising VCC threshold before POR initiates operation.
Soft Start
The POR function initiates the soft-start sequence. An internal
10
A current source charges an external capacitor (C
SS
) on
the SS pin to 4V. Soft start clamps the error amplifier output
(COMP pin) and reference input (+ terminal of error amp) to the
SS pin voltage. Figure 3 shows the soft-start interval with
C
SS
= 0.1
F. Initially the clamp on the error amplifier (COMP
pin) controls the converter's output voltage. At t
1
in Figure 3,
the SS voltage reaches the valley of the oscillator's triangle
wave. The oscillator's triangular waveform is compared to the
ramping error amplifier voltage. This generates PHASE pulses
of increasing width that charge the output capacitor(s). This
interval of increasing pulse width continues to t
2
. With sufficient
output voltage, the clamp on the reference input controls the
output voltage. This is the interval between t
2
and t
3
in Figure 3.
At t
3
the SS voltage exceeds the DACOUT voltage and the
output voltage is in regulation. This method provides a rapid
and controlled output voltage rise. The PGOOD signal toggles
`high' when the output voltage (VSEN pin) is within
10% of
DACOUT. The 2% hysteresis built into the power good
comparators prevents PGOOD oscillation due to nominal
output voltage ripple.
Overcurrent Protection
The overcurrent function protects the converter from a shorted
output by using the upper MOSFET's on-resistance, r
DS(ON)
to monitor the current. This method enhances the converter's
efficiency and reduces cost by eliminating a current sensing
resistor.
The overcurrent function cycles the soft-start function in a
hiccup mode to provide fault protection. A resistor (R
OCSET
)
programs the overcurrent trip level. An internal 200
A current
Fs
200kH z
5 x 10
6
R
T
k
(
)
---------------------
+
(R
T
to GND)
Fs
200kH z
4 x 10
7
R
T
k
(
)
---------------------
(R
T
to 12V)
0V
0V
0V
TIME (5ms/DIV.)
SOFT-START
(1V/DIV.)
OUTPUT
(1V/DIV.)
VOLTAGE
t
2
t
3
PGOOD
(2V/DIV.)
t
1
FIGURE 3. SOFT START INTERVAL
O
U
T
P
UT
INDUCT
O
R
S
O
F
T
-
S
T
ART
0A
0V
TIME (20ms/DIV.)
5A
10A
15A
2V
4V
FIGURE 4. OVER-CURRENT OPERATION
HIP6004E
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