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Электронный компонент: CDP1853

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4-35
CDP1853,
CDP1853C
N-Bit 1 of 8 Decoder
Description
The CDP1853 and CDP1853C are 1 of 8 decoders designed for
use in general purpose microprocessor systems. These
devices, which are functionally identical, are specifically
designed for use as gated N-bit decoders and interface directly
with the 1800-series microprocessors without additional compo-
nents. The CDP1853 has a recommended operating voltage
range of 4V to 10.5V, and the CDP1853C has a recommended
operating voltage range of 4V to 6.5V.
When CHIP ENABLE (CE) is high, the selected output will be
true (high) from the trailing edge of CLOCK A (high-to-low tran-
sition) to the trailing edge of CLOCK B (high-to-low transition).
All outputs will be low when the device is not selected (CE = 0)
and during conditions of CLOCK A and CLOCK B as shown in
Figure 2. The CDP1853 inputs N0, N1, N2, CLOCK A, and
CLOCK B are connected to an 1800-series microprocessor out-
puts N0, N1, N2, TPA, and TPB respectively, when used to
decode I/O commands as shown in Figure 5. The CHIP
ENABLE (CE) input provides the capability for multiple levels of
decoding as shown in Figure 6.
The CDP1853 can also be used as a general 1 of 8 decoder for
I/O and memory system applications as shown in Figure 4.
The CDP1853 and CDP1853C are supplied in hermetic 16-lead
dual-in-line ceramic (D suffix) and plastic (E suffix) packages.
Features
Provides Direct Control of Up to 7 Input and 7 Output
Devices
CHIP ENABLE (CE) Allows Easy Expansion for Multi-
level I/O Systems
Ordering Information
PACKAGE TEMP. RANGE
5V
10V
PKG.
NO.
PDIP
-40
o
C to +85
o
C CDP1853CE
CDP1853E E16.3
Burn-In
CDP1853CEX
-
E16.3
SBDIP
-40
o
C to +85
o
C CDP1853CD
CDP1853D D16.3
Burn-In
CDP1853CDX
-
D16.3
March 1997
File Number
1189.2
Pinout
16 LEAD DIP
TOP VIEW
14
15
16
9
13
12
11
10
1
2
3
4
5
7
6
8
CLK A
N0
N1
OUT 0
OUT 1
OUT 2
V
SS
OUT 3
V
DD
N2
CE
OUT 4
OUT 5
OUT 6
OUT 7
CLK B
CDP1853 Functional Diagram
FIGURE 1.
Qn
4
5
6
7
12
11
10
9
1 OF 8
DECODER
OUT 0
OUT 1
OUT 2
OUT 3
OUT 4
OUT 5
OUT 6
OUT 7
2
3
14
N0
N1
N2
13
CE
1
15
CLOCK
A
CLOCK
B
(TPA)
(TPB)
EN
TRUTH TABLE
1 = High level, 0 = Low level, X = Don't care
Qn-1 = Enable remains in previous state.
CE
CL A
CL B
EN
1
0
0
Qn-1
1
0
1
1
1
1
0
0
1
1
1
1
0
X
X
0
N2
N1
N0
EN
0
1
2
3
4
5
6
7
0
0
0
1
1
0
0
0
0
0
0
0
0
0
1
1
0
1
0
0
0
0
0
0
0
1
0
1
0
0
1
0
0
0
0
0
0
1
1
1
0
0
0
1
0
0
0
0
1
0
0
1
0
0
0
0
1
0
0
0
1
0
1
1
0
0
0
0
0
1
0
0
1
1
0
1
0
0
0
0
0
0
1
0
1
1
1
1
0
0
0
0
0
0
0
1
X
X
X
0
0
0
0
0
0
0
0
0
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207
|
Copyright
Intersil Corporation 1999
4-36
CDP1853, CDP1853C
Absolute Maximum Ratings
Thermal Information
DC Supply Voltage Range, (V
DD
)
(All voltage values referenced to V
SS
terminal)
CDP1853 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to +11V
CDP1853C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to +7V
Input Voltage Range, All Inputs . . . . . . . . . . . . . -0.5V to V
DD
+0.5V
DC Input Current, any One Input
. . . . . . . . . . . . . . . . . . . . . . . . .
10mA
Thermal Resistance (Typical)
JA
(
o
C/W)
JC
(
o
C/W)
PDIP Package . . . . . . . . . . . . . . . . . . .
85
N/A
SBDIP Package . . . . . . . . . . . . . . . . . .
85
22
Operating Temperature Range (T
A
)
Ceramic Packages (D Suffix Types) . . . . . . . . . . -55
o
C to +125
o
C
Plastic Packages (E Suffix Types) . . . . . . . . . . . . . -40
o
C to +85
o
C
Storage Temperature Range (T
STG
) . . . . . . . . . . . . -65
o
C to +150
o
C
Lead Temperature (During Soldering). . . . . . . . . . . . . . . . . . +265
o
C
At distance 1/16
1/32 In. (1.59
0.79mm)
from case for 10s max
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
Static Electrical Specifications
At T
A
= -40 to +85
o
C, Unless Otherwise Specified
PARAMETER
CONDITIONS
LIMITS
UNITS
V
O
(V)
V
IN
(V)
V
DD
(V)
CDP1853
CDP1853C
MIN
(NOTE1)
TYP
MAX
MIN
(NOTE1)
TYP
MAX
Quiescent Device
Current
I
L
-
-
5
-
1
10
-
5
50
A
-
-
10
-
10
100
-
-
-
A
Output Low Drive (Sink)
Current
I
OL
0.4
0, 5
5
1.6
3.2
-
1.6
3.2
-
mA
0.5
0, 10
10
2.6
5.2
-
-
-
-
mA
Output High Drive
(Source) Current
I
OH
4.6
0, 5
5
-1.15
-2.3
-
-1.15
-2.3
-
mA
9.5
0, 10
10
-2.6
-5.2
-
-
-
-
mA
Output Voltage Low Level
(Note 2)
V
OL
-
0, 5
5
-
0
0.1
-
0
0.1
V
-
0, 10
10
-
0
0.1
-
-
-
V
Output Voltage High Level
V
OH
-
0, 5
5
4.9
5
-
4.9
5
-
V
-
0, 10
10
9.9
10
-
-
-
-
V
Input Low Voltage
V
IL
0.5, 4.5
-
5
-
-
1.5
-
-
1.5
V
1, 9
-
10
-
-
3
-
-
-
V
Input High Voltage
V
IH
0.5, 4.5
-
5
3.5
-
-
3.5
-
-
V
1, 9
-
10
7
-
-
-
-
-
V
Input Leakage Current
I
IN
Any
Input
0, 5
5
-
-
1
-
-
1
A
0, 10
10
-
-
1
-
-
-
A
Operating Current
(Note 3)
I
DD1
0, 5
0, 5
5
-
50
100
-
50
100
A
0, 10
0, 10
10
-
150
300
-
-
-
A
Input Capacitance
C
IN
-
-
-
-
5
7.5
-
5
7.5
pF
Output Capacitance
C
OUT
-
-
-
-
10
15
-
10
15
pF
NOTES:
1. Typical values are for T
A
= +25
o
C and nominal voltage.
2. I
OL
= I
OH
= 1
A
3. Operating current measured in a CDP1802 system at 2MHz with outputs floating.
Spec Number
4-37
CDP1853, CDP1853C
Recommended Operating Conditions
At T
A
= Full Package Temperature Range. For maximum reliability, operating conditions
should be selected so that operation is always within the following ranges:
PARAMETER
LIMITS
UNITS
CDP1853
CDP1853C
MIN
MAX
MIN
MAX
Supply Voltage Range
4
10.5
4
6.5
V
Recommended Input Voltage Range
V
SS
V
DD
V
SS
V
DD
V
Dynamic Electrical Specifications
At T
A
= -40 to +85
o
C, V
DD
=
5%, V
IH
= 0.7V
DD
, V
IL
= 0.3V
DD
, t
R
, t
F
= 20ns, C
L
= 100pF,
Unless Otherwise Specified
PARAMETER
V
DD
(V)
LIMITS
UNITS
CDP1853
CDP1853C
MIN
TYP
MAX
MIN
TYP
MAX
Propagation Delay Time:
CE to Output
t
EOH,
t
EOL
5
-
175
275
-
175
275
ns
10
-
90
150
-
-
-
ns
N to Output
t
NOH,
t
NOL
5
-
225
350
-
225
350
ns
10
-
120
200
-
-
-
ns
Clock A to Output
t
AO
5
-
200
300
-
200
300
ns
10
-
100
150
-
-
-
ns
Clock B to Output
t
BO
5
-
175
275
-
175
275
ns
10
-
90
150
-
-
-
ns
Minimum Pulse Widths:
ns
Clock A
t
CACA
5
-
50
75
-
50
75
ns
10
-
25
50
-
-
-
ns
Clock B
t
CBCB
5
-
50
75
-
50
75
ns
10
-
25
50
-
-
-
ns
NOTES:
1. Maximum limits of minimum characteristics are the values above which all devices function.
2. Typical values are for T
A
= +25
o
C and nominal voltages.
4-38
CDP1853, CDP1853C
Timing Diagrams
FIGURE 2A. CE TO OUTPUT (0-7) DELAY TIME
FIGURE 2B. N LINES TO OUTPUT (0-7) DELAY TIME
FIGURE 2C. CLOCK A TO OUTPUT (0-7) DELAY TIME
FIGURE 2D. CLOCK B TO OUTPUT (0-7) DELAY TIME
FIGURE 2. PROPAGATION DELAY TIME DIAGRAMS
FIGURE 3. TIMING DIAGRAM
FIGURE 4. N-BIT DECODER USED AS A 1 OF 8 DECODER
CE
OUTPUT
t
EO
t
EO
N
OUTPUT
t
NO
t
NO
t
AO
t
CACA
CLOCK A
OUTPUT
CLOCK B
OUTPUT
t
CBCB
t
BO
TPA
TPB
CE
EN
(NOTE 1)
OUTPUT
NOTE 1. OUTPUT ENABLED WHEN EN = HIGH
INTERNAL SIGNAL SHOWN FOR
REFERENCE ONLY (SEE FIGURE 1)
OUT 0
OUT 1
OUT 2
OUT 3
OUT 4
OUT 5
OUT 6
OUT 7
N0
N1
N2
CE
CLOCK B
CLOCK A
A
B
C
CHIP ENABLE
V
DD
4-39
CDP1853, CDP1853C
FIGURE 5. N-BIT DECODER IN A ONE-LEVEL I/O SYSTEM
FIGURE 6. TWO-LEVEL I/O USING CDP1853 AND CDP1852
CS1
CS2
CDP1852
INPUT
PORT 1
MODE
7 INPUT PORTS
CLOCK
DATA
READ VIA
69 INSTRUCTION
STROBE
CS2
CS1
CDP1852
OUTPUT
PORT 1
MODE
7 OUTPUT PORTS
V
DD
SR
AVAILABLE
LOAD VIA 61
INSTRUCTION
TPB
CS1
CS2
CDP1852
INPUT
PORT 7
MODE
CLOCK
DATA
READ VIA
6F INSTRUCTION
STROBE
CS1
CS2
CDP1852
OUTPUT
PORT 7
MODE
V
DD
DATA
SR
DATA AVAILABLE
LOAD VIA 67
INSTRUCTION
TPB
CDP1800 SERIES
MRD
TPB
V
DD
5 CDP1852 INPUT AND OUTPUT PORTS
N2
N2
N1
N1
N0
N0
TPB
CLOCK B
TPA
CLOCK A
CE
CDP1853
2-6
0
1
7
CLOCK A
CLOCK B
CE
CDP1853
"62-6F"
INST
I/O
7 INPUT
6 OUTPUT
PORTS
CDP1852
CS2
CL CSI
DATA BUS
CDP1800 SERIES
BUS
MRD
TPB
TPA
NO, N1, N2
INTERCONNECTED
AS IN FIGURE 4
NO, N1, N2
CDP1853
DECODED
"61" INSTRUCTION
TPA
I
CLOCK A
CLOCK B
CE
CDP1853
"62-6F"
INST
I/O
7 INPUT
6 OUTPUT
PORTS
NO, N1, N2
CLOCK A
CLOCK B
CE
CDP1853
"62-6F"
INST
I/O
7 INPUT
6 OUTPUT
PORTS
NO, N1, N2
SECTIONS 3-7
NOTE: SYSTEM SHOWN WILL SELECT
UP TO 56 INPUT AND 48 OUTPUT
AND OUTPUT PORTS CAN BE
FURTHER EXPANDED.
THE TOTAL NUMBER OF INPUT
PORTS. WITH ADDITIONAL DECODING