ChipFind - документация

Электронный компонент: IMP5225

Скачать:  PDF   ZIP
Key Features
x
SCSI Plug and Play
-- Dual active LOW disconnect pins
x
Ultra-Fast response for Fast-20 SCSI
x
35MHz channel bandwidth
x
Sleep-mode current less than 150A
-- Disconnects terminator from lows
x
NO external compensation capacitors
x
Compatible with active negation drivers
x
Compatible with passive and active terminations
x
Approved for use with SCSI 1, 2, 3 and
Ultra SCSI
x
Hot swap compatible
x
Pin-for-pin compatible with LX5225, LX5205
and UC5607
Block Diagrams
+
Enable
Logic
Current
Biasing
Circuit
24mA Current
Limiting Circuit
Term Power
DATA OUTPUT
PIN DB (0)
1 of 18 Channels
DISCONNECT 1
V
TERM
V
TERM
DISCONNECT 2
0.4V
2.85V
5225_01.eps
1
1
8-Line Plug and Pla
8-Line Plug and Pla
y
y
SCSI T
SCSI T
er
er
minat
minat
or
or
The IMP5225 SCSI terminator is part of IMP's family of high-
performance SCSI terminators, which are designed to deliver true
UltraSCSI performance. The BiCMOS design offers superior perfor-
mance over first generation linear passive and active techniques. IMP's
new architecture employs high-speed adaptive elements for each chan-
nel, thereby providing the fastest response possible -- typically 35MHz,
which is 100 times faster than the older linear regulator/terminator
approach. Products using the older regulator/resistor architecture have
bandwidths which are dominated by the reference stabilization output
capacitor and are therefore limited to 500kHz (see further discussion
in the Functional Description section). The IMP architecture eliminates
the output compensation capacitor required in linear regulator/
resistor designs.
The IMP5225 architecture tolerates marginal system designs. A key
improvement offered by the IMP5225 lies in its ability to insure reliable,
error-free communications even in systems which do not adhere to
recommended SCSI hardware design guidelines, such as the use of
improper cable lengths and impedances. Frequently, this situation is not
controlled by the peripheral or host designer.
The IMP5225 has two disconnect pins for SCSI Plug and Play (PnP)
applications. To enter the disconnect mode, the disconnect pins must be
driven LOW thereby disconnecting the IMP5225 from the SCSI bus.
Quiescent current is less than 150
A when disabled.
Reduced component count is inherent in the IMP5225 architecture.
Traditional termination techniques require large stabilization and
transient protection capacitors of up to 20
F in value and
size. The IMP5225 architecture does not require these com-
ponents, allowing all the cost savings associated with
inventory, board space, assembly, reliability, and compo-
nent costs.
The IMP5225 is a superior pin-for-pin replacement for the
LX5225, LX5205, UC5607.
1
2000 IMP, Inc.
408-432-9100/www.impweb.com
1
IMP5225
IMP5225
D
ATA
C
OMMUNICATIONS
2
408-432-9100/www.impweb.com
2000 IMP, Inc.
Pin Configuration
Ordering Information
Absolute Maximum Ratings
1
10
T6
9
HEAT SINK / GND
8
GND
7
HEAT SINK / GND
6
T5
5
T4
4
T3
3
T2
2
T1
1
DISCONNECT 1
14
V
TERM
13
T9
12
T8
11
T7
19 T13
20 HEAT SINK / GND
21 HEAT SINK / GND
22 HEAT SINK / GND
DWP Package
23 T14
24 T15
25 T16
26 T17
27 T18
28 DISCONNECT 2
15 NC
16 T10
17 T11
18 T12
5225_02.eps
IMP5225
SOWB-28
r
e
b
m
u
N
t
r
a
P
e
g
n
a
R
e
r
u
t
a
r
e
p
m
e
T
e
g
a
k
c
a
P
P
W
D
C
5
2
2
5
P
M
I
0
0
7
o
t
C
C
B
W
O
S
c
i
t
s
a
l
P
n
i
p
-
8
2
T
P
W
D
C
5
2
2
5
P
M
I
0
0
7
o
t
C
C
B
W
O
S
c
i
t
s
a
l
P
n
i
p
-
8
2
,
l
e
e
R
d
n
a
e
p
a
T
3
t
a
.
1
0
t
_
5
2
2
5
Thermal Data
TermPwr Voltage . . . . . . . . . . . . . . . . . . . . . . . . +7V
Signal Line Voltage . . . . . . . . . . . . . . . . . . . . . 0V to +7V
Differential Voltage . . . . . . . . . . . . . . . . . . . . . 0V to 6.5V
Operating Junction Temperature
Plastic (DWP Package) . . . . . . . . . . . . . . . . 150
C
Note:
1. Exceeding these ratings could cause damage to the device. All
voltages are with respect to Ground. Currents are positive
into, negative out of the specified terminal.
Storage Temperature Range . . . . . . . . . . . . . . 65
C to 150
C
Lead Temperature (Soldering, 10 sec.) . . . . . . 300
C
DWP Package:
Thermal Resistance Junction-to-Leads,
JL
. . . . . . . . 18
C/W
Thermal Resistance Junction-to-Ambient,
JA
. . . . . . 40
C/W
Junction Temperature Calculation: T
J
= T
A
+ (P
D
x
JA
).
The
JA
numbers are guidelines for the thermal performance of the
device/pc-board system. All of the ambient airflow is assumed.
IMP5
IMP5
1
1
1
1
1/5
1/5
1
1
1
1
2
2
IMP5225
IMP5225
2000 IMP, Inc.
Data Communications
3
Recommended Operating Conditions
r
e
t
e
m
a
r
a
P
l
o
b
m
y
S
n
i
M
p
y
T
x
a
M
s
t
i
n
U
e
g
a
t
l
o
V
r
w
p
m
r
e
T
V
M
R
E
T
0
.
4
5
.
5
V
e
g
a
t
l
o
V
e
n
i
L
l
a
n
g
i
S
0
0
.
5
V
e
g
a
t
l
o
V
t
u
p
n
I
t
c
e
n
n
o
c
s
i
D
0
V
M
R
E
T
V
C
5
2
2
5
P
M
I
e
g
n
a
R
e
r
u
t
a
r
e
p
m
e
T
n
o
i
t
c
n
u
J
g
n
i
t
a
r
e
p
O
0
5
2
1
C
.
l
a
n
o
i
t
c
n
u
f
s
i
e
c
i
v
e
d
e
h
t
h
c
i
h
w
r
e
v
o
e
g
n
a
r
e
h
t
e
t
a
c
i
d
n
i
s
n
o
i
t
i
d
n
o
c
g
n
i
t
a
r
e
p
o
d
e
d
n
e
m
m
o
c
e
R
.
2
:
e
t
o
N
s
p
e
.
2
0
t
_
5
2
2
5
Electrical Characteristics
Unless otherwise specified, these specifications apply at an ambient operating temperature of T
A
=
25
C. TermPwr = 4.75V. Low duty cycle
pulse testing techniques are used which maintains junction and case temperatures equal to the ambient temperature.
r
e
t
e
m
a
r
a
P
l
o
b
m
y
S
s
n
o
i
t
i
d
n
o
C
n
i
M
p
y
T
x
a
M
s
t
i
n
U
e
g
a
t
l
o
V
h
g
i
H
t
u
p
t
u
O
V
T
U
O
5
6
.
2
5
8
.
2
V
t
n
e
r
r
u
C
y
l
p
p
u
S
r
w
P
m
r
e
T
I
C
C
ll
A
a
t
a
d
n
e
p
O
=
s
e
n
il
10
15
A
m
ll
A
a
t
a
d
=
s
e
n
il
V
2
.
0
4
2
4
0
5
4
V
8
.
0
<
s
n
i
P
T
C
E
N
N
O
C
S
I
D
0
5
0
5
1
A
t
n
e
r
r
u
C
t
u
p
t
u
O
I
T
U
O
V
T
U
O
V
5
.
0
=
0
2
2
2
4
2
A
m
t
u
p
n
I
t
c
e
n
n
o
c
s
i
D
t
n
e
r
r
u
C
I
N
I
V
0
=
s
n
i
P
T
C
E
N
N
O
C
S
I
D
0
1
A
t
n
e
r
r
u
C
e
g
a
k
a
e
L
t
u
p
t
u
O
I
L
O
V
,
V
8
.
0
<
s
n
i
P
T
C
E
N
N
O
C
S
I
D
O
V
2
.
0
=
1
A
h
t
d
i
w
d
n
a
B
l
e
n
n
a
h
C
W
B
5
3
z
H
M
l
e
n
n
a
h
C
r
e
p
,
t
n
e
r
r
u
C
k
n
i
S
n
o
i
t
a
n
i
m
r
e
T
I
K
N
I
S
V
T
U
O
V
4
=
7
A
m
s
p
e
.
3
0
t
_
5
2
2
5
IMP5
IMP5
1
1
1
1
1/5
1/5
1
1
1
1
2
2
IMP5225
IMP5225
4
408-432-9100/www.impweb.com
2000 IMP, Inc.
Application Information
Cable transmission theory suggests to optimize signal speed and
quality, the termination should act both as an ideal voltage refer-
ence when the line is released (deasserted) and as an ideal
current source when the line is active (asserted). Common active
terminators which consist of linear regulators in series with resis-
tors (typically 110
) are a compromise. With coventional linear
terminators as the line voltage increases the amount of current
decreases linearly by the equation;
The IMP5225, with its unique new architecture, applies the max-
imum amount of current regardless of line voltage until the
termination high threshold (2.85V) is reached.
Acting as a near ideal line terminator, the IMP5225 closely repro-
duces the optimum case when the device is enabled. To enable
the device the DISC1 and DISC2 pins are pulled HIGH. During
this mode of operation, quiescent current is 10mA, and the
device will respond to line demands by delivering 24mA on
assertion and by imposing 2.85V on deassertion.
In order to disable the device, the DISC1 and DISC2 pins must be
driven LOW. In the disable mode, the device is in a sleep state
with quiescent current less than 150
A. When disabled, all
outputs are in a high impedance state. Sleep mode can be used
for power conservation or to remove the terminator from the
SCSI chain.
An additional feature of the IMP5225 is its compatibility with
active negation drivers.
V
V
R
I
REF
LINE
-
(
)
=
.
1
T
C
E
N
N
O
C
S
I
D
2
T
C
E
N
N
O
C
S
I
D
s
t
u
p
t
u
O
t
n
e
c
s
e
i
u
Q
m
u
m
i
x
a
M
t
n
e
r
r
u
C
H
H
d
e
l
b
a
s
i
D
A
m
5
1
H
L
d
e
l
b
a
n
E
A
m
5
1
L
H
d
e
l
b
a
n
E
A
m
5
1
L
L
d
e
l
b
a
s
i
D
A
0
5
1
n
e
p
O
n
e
p
O
d
e
l
b
a
s
i
D
A
0
5
1
s
p
e
.
4
0
t
_
5
2
2
5
Figure 3.
Table 1. Power Up/ Power Down Function Table
5225_03.eps
DISCONNECT 1
1 Meter, AWG 28
DISCONNECT 2
IMP5225
DISCONNECT 1
Receiver
Driver
DISCONNECT 2
IMP5225
Figure 1. Receiving Waveform 20MHz
Figure 2. Driving Waveform 20MHz
IMP5
IMP5
1
1
1
1
1/5
1/5
1
1
1
1
2
2
IMP5225
IMP5225
2000 IMP, Inc.
Data Communications
5
Figure 4. Application Schematic
Application Information
TERM POWER
~
~
~
~
~
MSG
RST
ACK
DB (1)
DB (0)
5V
DISCONNECT
IMP5225
IMP5225
SCSI CABLE
PERIPHERAL
HOST
4.7
F
5V
TERM POWER
MSG
RST
ACK
DB (1)
DB (0)
V
TERM
V
TERM
4.7
F
DISCONNECT
5225_04.eps
IMP5
IMP5
1
1
1
1
1/5
1/5
1
1
1
1
2
2
IMP5225
IMP5225
2000 IMP, Inc.
Printed in USA
Publication #: 7008
Revision: C
Issue Date: 08/19/02
Type:
Preliminary
s
e
h
c
n
I
s
r
e
t
e
m
i
ll
i
M
n
i
M
x
a
M
n
i
M
x
a
M
*
)
n
i
P
-
8
2
(
B
W
O
S
A
8
9
6
.
0
3
1
7
.
0
0
7
.
7
1
0
1
.
8
1
B
1
9
2
.
0
9
9
2
.
0
0
4
.
7
0
6
.
7
C
3
9
0
.
0
4
0
1
.
0
5
3
.
2
5
6
.
2
D
3
1
0
.
0
8
1
0
.
0
3
3
.
0
1
5
.
0
F
6
1
0
.
0
0
5
0
.
0
0
4
.
0
7
2
.
1
G
C
S
B
0
5
0
.
0
C
S
B
7
2
.
1
J
9
0
0
.
0
3
1
0
.
0
3
2
.
0
2
3
.
0
K
4
0
0
.
0
2
1
0
.
0
0
1
.
0
0
3
.
0
M
0
8
0
8
P
4
9
3
.
0
9
1
4
.
0
0
0
.
0
1
5
6
.
0
1
E
A
3
1
0
-
O
M
g
n
i
w
a
r
D
C
E
D
E
J
*
3
t
a
.
5
0
t
_
5
2
2
5
A
B
P
D
G
F
28
15
14
1
C
K
J
M
SEATING PLANE
28-Pin (SOWB)DWP.eps
Package Dimensions
SOWB (28-Pin)
IMP5225
IMP5225
1
IMP5225
IMP5225
IMP, Inc.
Corporate Headquarters
2830 N. First Street
San Jose, CA 95134-2071
Tel: 408-432-9100
Fax: 408-432-1085
e-mail: info@impinc.com
http://www.impweb.com
The IMP logo is a registered trademark of IMP, Inc.
All other company and product names are trademarks of their respective owners.