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Электронный компонент: ICS8737-11

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background image
8737AG-11
www.icst.com/products/hiperclocks.html
REV. A JULY 13, 2001
1
Integrated
Circuit
Systems, Inc.
ICS8737-11
L
OW
S
KEW

1/

2
D
IFFERENTIAL
-
TO
- 3.3V LVPECL C
LOCK
G
ENERATOR
G
ENERAL
D
ESCRIPTION
The ICS8737-11 is a low skew, high performance
Differential-to-3.3V LVPECL Clock Generator/
Divider and a member of the HiPerClockSTM
family of High Performance Clock Solutions from
ICS. The ICS8737-11 has two selectable clock
inputs. The CLK, nCLK pair can accept most standard differ-
ential input levels. The PCLK, nPCLK pair can accept
LVPECL, CML, or SSTL input levels.The clock enable is
internally synchronized to eliminate runt pulses on the
outputs during asynchronous assertion/deassertion of the
clock enable pin.
Guaranteed output and part-to-part skew characteristics
make the ICS8737-11 ideal for clock distribution applications
demanding well defined performance and repeatability.
F
EATURES
2 divide by 1 differential 3.3V LVPECL outputs;
2 divide by 2 differential 3.3V LVPECL outputs
Selectable CLK, nCLK or LVPECL clock inputs
CLK, nCLK pair can accept the following differential input
levels: LVDS, LVPECL, LVHSTL, SSTL, HCSL
PCLK, nPCLK supports the following input types:
LVPECL, CML, SSTL
Maximum output frequency up to 650MHz
Translates any single ended input signal (LVCMOS, LVTTL,
GTL) to LVPECL levels with resistor bias on nCLK input
Output skew: 60ps (maximum)
Part-to-part skew: 200ps (maximum)
Bank skew: Bank A - 20ps (maximum),
Bank B - 35ps (maximum)
Propagation delay: 1.7ns (maximum)
3.3V operating supply
0C to 70C ambient operating temperature
Industrial temperature information available upon request
B
LOCK
D
IAGRAM
P
IN
A
SSIGNMENT
ICS8737-11
20-Lead TSSOP
6.50mm x 4.40mm x 0.92 package body
G Package
Top View
V
EE
CLK_EN
CLK_SEL
CLK
nCLK
PCLK
nPCLK
nc
MR
V
CC
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
QA0
nQA0
V
CC
QA1
nQA1
QB0
nQB0
V
CC
QB1
nQB1
HiPerClockSTM
,&6
QA0
nQA0
QA1
nQA1
1
2
D
Q
LE
CLK_EN
CLK
nCLK
PCLK
nPCLK
MR
QB0
nQB0
QB1
nQB1
CLK_SEL
0
1
background image
8737AG-11
www.icst.com/products/hiperclocks.html
REV. A JULY 13, 2001
2
Integrated
Circuit
Systems, Inc.
ICS8737-11
L
OW
S
KEW

1/

2
D
IFFERENTIAL
-
TO
- 3.3V LVPECL C
LOCK
G
ENERATOR
T
ABLE
2. P
IN
C
HARACTERISTICS
T
ABLE
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IN
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background image
8737AG-11
www.icst.com/products/hiperclocks.html
REV. A JULY 13, 2001
3
Integrated
Circuit
Systems, Inc.
ICS8737-11
L
OW
S
KEW

1/

2
D
IFFERENTIAL
-
TO
- 3.3V LVPECL C
LOCK
G
ENERATOR
T
ABLE
3A. C
ONTROL
I
NPUT
F
UNCTION
T
ABLE
T
ABLE
3B. C
LOCK
I
NPUT
F
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T
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p
e
c
c
a
Enabled
Disabled
F
IGURE
1: CLK_EN T
IMING
D
IAGRAM
nCLK, nPCLK
CLK, PCLK
CLK_EN
nQA0 - nQA1,
nQB0 - nQB1
QA0 - QA1,
QB0 - QB1
background image
8737AG-11
www.icst.com/products/hiperclocks.html
REV. A JULY 13, 2001
4
Integrated
Circuit
Systems, Inc.
ICS8737-11
L
OW
S
KEW

1/

2
D
IFFERENTIAL
-
TO
- 3.3V LVPECL C
LOCK
G
ENERATOR
A
BSOLUTE
M
AXIMUM
R
ATINGS
Supply Voltage, V
CC
4.6V
Inputs, V
I
-0.5V to V
CC
+ 0.5V
Outputs, V
O
-0.5V to V
CC
+ 0.5V
Package Thermal Impedance,
JA
73.2C/W (0lfpm)
Storage Temperature, T
STG
-65C to 150C
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings
are stress specifications only. Functional operation of product at these conditions or any conditions beyond those listed in the
DC Characteristics or AC Characteristics is not implied. Exposure to absolute maximum rating conditions for extended peri-
ods may affect product reliability.
T
ABLE
4A. P
OWER
S
UPPLY
DC C
HARACTERISTICS
,
V
CC
= 3.3V5%, T
A
= 0C
TO
70C
T
ABLE
4B. LVCMOS / LVTTL DC C
HARACTERISTICS
,
V
CC
= 3.3V5%, T
A
= 0C
TO
70C
T
ABLE
4C. D
IFFERENTIAL
DC C
HARACTERISTICS
,
V
CC
= 3.3V5%, T
A
= 0C
TO
70C
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.
background image
8737AG-11
www.icst.com/products/hiperclocks.html
REV. A JULY 13, 2001
5
Integrated
Circuit
Systems, Inc.
ICS8737-11
L
OW
S
KEW

1/

2
D
IFFERENTIAL
-
TO
- 3.3V LVPECL C
LOCK
G
ENERATOR
T
ABLE
5. AC C
HARACTERISTICS
,
V
CC
= 3.3V5%, T
A
= 0C
TO
70C
T
ABLE
4D. LVPECL DC C
HARACTERISTICS
,
V
CC
= 3.3V5%, T
A
= 0C
TO
70C
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