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Электронный компонент: ICS613

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MDS 613 C
1
Revision 111204
Integrated Circuit Systems, Inc.
525 Race Street, San Jose, CA 95126
tel (408) 297-1201
www.icst.com
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ICS613
Description
The ICS613 is a low cost, low phase noise, high
performance clock synthesizer for any applications that
require low phase noise and low jitter. It is ICS' lowest
phase noise multiplier. Using ICS' patented analog and
digital Phase Locked Loop (PLL) techniques, the chip
can accept a 25MHz crystal or clock input, and
produces output clocks up to 157.5 MHz.
The chip has separate power supplies for the clock
outputs, allowing each output to be run at different
voltages. It also allows the core of the chip to operate at
3.3V, while the output clocks run at either 2.5V or 3.3V.
Features
Packaged in 16 pin SOIC
Available in Pb (lead) free package
Uses a fundamental 25MHz crystal or clock
Operating voltage of 3.3 V
Separate output voltage supplies which can run at
2.5 V or 3.3 V
Output clocks up to 157.5 MHz
Low phase noise: -110 dBc/Hz at 10 kHz
Low jitter of 36 ps (one sigma)
Advanced, low power, sub-micron CMOS process
Block Diagram
GND
5
Reference
Divider
Phase
Comparator,
Charge Pump,
and Loop Filter
VCO
VCO
Divider
Output
Divider
S2:SO
X1/ICLK
X2
Crystal or
clock input
Capacitors must be used
with a crystal input
Crystal
Oscillator
VDDO1
VDD
2
CLK1
CLK2
VDDO2
3
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MDS 613 C
2
Revision 111204
Integrated Circuit Systems, Inc.
525 Race Street, San Jose, CA 95126
tel (408) 297-1201
www.icst.com
ICS613
Pin Assignment
Clock Select Table
Pin Descriptions
12
1
11
2
10
3
9
X 1/IC LK
4
S 0
5
S 2
6
S 1
7
V D D
8
G N D
G N D
V D D
G N D
V D D O 2
V D D O 1
G N D
C LK 2
C LK 1
16
15
14
13
G N D
X 2
16 P in (150 m il) S O IC
S2
S1
S0
Input
Output (CLK1
and CLK2)
0
0
0
25
125
0
0
1
25
156.25
0
1
0
25
143.75
0
1
1
25
150
1
0
0
25
146.875
1
0
1
25
157.5
1
1
0
25
140
1
1
1
25
156.25
Pin
Number
Pin
Name
Pin
Type
Pin Description
1
XI/ICLK
Input
Crystal Connection. Connect to a 25 MHz crystal or clock.
2
S0
Input
Select pin 0. Internal pull-down.
3
S2
Input
Select pin 2. Internal pull-down.
4
VDD
Power
Connect to +3.3V. Must be the same as pin 13.
5
GND
Power
Connect to ground.
6
VDDO2
Power
Output VDD for CLK2. Connect to either +2.5V or +3.3V.
7
CLK2
Output
CLK2 output. Frequency based on table above.
8
GND
Power
Connect to ground.
9
GND
Power
Connect to ground.
10
CLK1
Output
CLK1 output. Frequency based on table above.
11
VDDO1
Power
Output VDD for CLK1. Connect to either +2.5V or +3.3V.
12
GND
Power
Connect to ground.
13
VDD
Power
Connect to +3.3V. Must be the same as pin 4.
14
GND
Power
Conenct to ground.
15
S1
Input
Select pin 1. Internal pull-up.
16
X2
Input
Crystal Connection. Connect to a 25 MHz crystal. Leave
unconnected for clock input.
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MDS 613 C
3
Revision 111204
Integrated Circuit Systems, Inc.
525 Race Street, San Jose, CA 95126
tel (408) 297-1201
www.icst.com
ICS613
External Component Selection
The ICS613 requires a minimum number of external
components for proper operation.
Decoupling Capacitors
Decoupling capacitors of 0.01
F should be connected
between VDD and GND pairs on pins 4 and 5, pins 6
and 8, pins 11 and 9, and pins 13 and 14 as close to
the ICS613 as possible. For optimum device
performance, the decoupling capacitors should be
mounted on the component side of the PCB. Avoid the
use of vias in the decoupling circuit.
Series Termination Resistor
When the PCB traces between the clock outputs and
the loads are over 1 inch, series termination should be
used. To series terminate a 50
trace (a commonly
used trace impedance) place a 33
resistor in series
with the clock line, as close to the clock output pin as
possible. The nominal impedance of the clock output is
20
.
Crystal Tuning Load Capacitors
The device crystal connections should include pads for
small capacitors from X1 to ground and from X2 to
ground. These capacitors are used to adjust the stray
capacitance of the board to match the nominally
required crystal load capacitance. Because load
capacitance can only be increased in this trimming
process, it is important to keep stray capacitance to a
minimum by using very short PCB traces (and no vias)
been the crystal and device. Crystal capacitors must be
connected from each of the pins X1 and X2 to ground.
The value (in pF) of these crystal caps should equal
(C
L
-6pF)*2. In this equation, C
L
= crystal load
capacitance in pF.
Example: For a crystal with a 16 pF load capacitance,
each crystal capacitor would be 20 pF [(16-6) x 2] = 20.
Reducing Jitter and Phase Noise
For applications that only require one output, jitter and
phase noise can be reduced by tying the unused
VDDO to ground. This will stop the output clock low
which will result in less switching noise on the active
output.
Absolute Maximum Ratings
Stresses above the ratings listed below can cause permanent damage to the ICS613. These ratings, which
are standard values for ICS commercially rated parts, are stress ratings only. Functional operation of the
device at these or any other conditions above those indicated in the operational sections of the
specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can
affect product reliability. Electrical parameters are guaranteed only over the recommended operating
temperature range.
Item
Rating
Supply Voltage, VDD
7V
All Inputs and Outputs
-0.5V to VDD+0.5V
Ambient Operating Temperature
0 to +70
C
Storage Temperature
-65 to +150
C
Soldering Temperature
260
C
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MDS 613 C
4
Revision 111204
Integrated Circuit Systems, Inc.
525 Race Street, San Jose, CA 95126
tel (408) 297-1201
www.icst.com
ICS613
Recommended Operation Conditions
DC Electrical Characteristics
VDD=3.3V 5%
, Ambient temperature 0 to +70
C, unless stated otherwise
AC Electrical Characteristics
VDD = 3.3V 5%
, Ambient Temperature 0 to +70
C, unless stated otherwise
Parameter
Min.
Typ.
Max.
Units
Ambient Operating Temperature
0
+70
C
Power Supply Voltage (measured in respect to GND)
+3.15
+3.45
V
Parameter
Symbol
Conditions
Min.
Typ.
Max.
Units
Operating Voltage
VDD
3.15
3.45
V
Output Voltage
VDDO
2.375
VDD
V
Output High Voltage
V
OH
I
OH
= -12 mA
2.4
V
Output Low Voltage
V
OL
I
OL
= 12 mA
0.4
V
Output High Voltage (CMOS
Level)
V
OH
I
OH
= -4 mA
VDD-0.4
V
Input High Voltage (S2:S0)
V
IH
2.5
V
Input Low Voltage (S2:S0)
V
IL
0.5
V
Operating Supply Current
IDD
No load
27
mA
Short Circuit Current
I
OS
50
mA
Parameter
Symbol
Conditions
Min.
Typ.
Max.
Units
Input Frequency
f
in
25
MHz
Output Frequency
f
out
125
157.5
MHz
Output Rise Time
t
OR
20% to 80%, C
L
=15pF,
VDD=3.3V
700
ps
Output Fall Time
t
OF
80% to 20%, C
L
=15pF,
VDD=3.3V
700
ps
Output Rise Time
t
OR
20% to 80%, C
L
=15pF,
VDDO's=2.5V
1.0
ns
Output Fall Time
t
OF
80% to 20%, C
L
=15pF,
VDDO's=2.5V
1.0
ns
Output Clock Duty Cycle
t
D
At VDDO's/2, C
L
=15pF
45
50
55
%
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MDS 613 C
5
Revision 111204
Integrated Circuit Systems, Inc.
525 Race Street, San Jose, CA 95126
tel (408) 297-1201
www.icst.com
ICS613
Maximum Output Jitter,
short term
t
J
C
L
=15pF, 125MHz output
30
60
ps
Maximum one sigma jitter
t
SJ
C
L
=15pF, 125MHz output
8
20
ps
Phase Noise, relative to
carrier, 125 MHz
100 Hz offset
-90
dBc/Hz
Phase Noise, relative to
carrier, 125 MHz
1 kHz offset
-115
dBc/Hz
Phase Noise, relative to
carrier, 125 MHz
10 kHz offset
-120
dBc/Hz
Phase Noise, relative to
carrier, 125 MHz
100 kHz offset
-115
dBc/Hz
Skew
VDDO1=VDDO2
0
250
ps
Parameter
Symbol
Conditions
Min.
Typ.
Max.
Units
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MDS 613 C
6
Revision 111204
Integrated Circuit Systems, Inc.
525 Race Street, San Jose, CA 95126
tel (408) 297-1201
www.icst.com
ICS613
Package Outline and Package Dimensions
(16 pin SOIC, 150 Mil. Narrow Body)
Package dimensions are kept current with JEDEC Publication No. 95
Ordering Information
While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems (ICS)
assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would
result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial
applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary
environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any
circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or
critical medical instruments.
Part / Order Number
Marking
Shipping Packaging
Package
Temperature
ICS613M
ICS613M
Tubes
16 pin SOIC
0 to +70
C
ICS613MT
ICS613M
Tape and Reel
16 pin SOIC
0 to +70
C
ICS613MLF
ICS613MLF
Tubes
16 pin SOIC
0 to +70
C
ICS613MLFT
ICS613MLF
Tape and Reel
16 pin SOIC
0 to +70
C
INDEX
AREA
1 2
16
D
E
SEATING
PLANE
A1
A
e
- C -
B
.10 (.004)
C
C
L
H
h x 45
Millimeters
Inches
Symbol
Min
Max
Min
Max
A
1.35
1.75
.0532
.0688
A1
0.10
0.25
.0040
.0098
B
0.33
0.51
.013
.020
C
0.19
0.25
.0075
.0098
D
9.80
10.00
.3859
.3937
E
3.80
4.00
.1497
.1574
e
1.27 BASIC
0.050 BASIC
H
5.80
6.20
.2284
.2440
h
0.25
0.50
.010
.020
L
0.40
1.27
.016
.050
0
8
0
8