DS04-13512-2E
FUJITSU SEMICONDUCTOR
DATA SHEET
Linear IC converter
CMOS
D/A Converter for Digital Tuning
(8-channel, 8-bit, on-chip OP amp, low-voltage)
MB88347L
s
DESCRIPTION
The MB88347L incorporates eight 8-bit D/A converter modules. This device operates at low supply voltage in
the performance guarantee range from 2.7 to 3.6 V. It also contains an output amplifier, allowing driving at large
current.
Since the MB88347L inputs data in serial mode, it requires only three control lines for data input and two or
more MB88347L units can be cascaded.
The MB88347L is function and pin compatible with the MB88347 (5-volt supply voltage model). The MB88347L
can therefore easily replace the MB88347 in a system, thereby reducing the system's voltage requirement.
The MB88347L is the best replacement for electronic variable resistors or screwdriver control resistors.
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FEATURES
Ultra-low power consumption (0.5 mW/ch: typical)
Low voltage operation (V
CC
= 2.7 to 3.6 V)
Ultra-compact space-saving package (SSOP-16)
Contains 8-channel R-2R type 8-bit D/A converter
On-chip analog output amps (sink current max. 1.0 mA, source current max. 1.0 mA)
Analog output range from 0 V to V
CC
Two separate power supply/ground lines for MCU interface block/operational amplifier output buffer block and
D/A converter block
Serial data input, maximum operating speed 2.5 MHz
CMOS process
Package lineup includes DIP 16-pin, SOP 16-pin, SSOP 16-pin
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PACKAGES
(FPT-16P-M06)
16 pin, Plastic SOP
(DIP-16P-M04)
16 pin, Plastic DIP
16 pin, Plastic SSOP
(FPT-16P-M05)
2
MB88347L
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PIN ASSIGNMENT
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PIN DESCRIPTION
Pin No.
Pin name
I/O
Functions
14
DI
I
Serial data input pin. This pin inputs serial data with a data length of 12
bits. (Do not leave the pin floating.)
11
DO
O
This pin outputs the MSB data in the 12-bit shift register at the CLK falling
edge.
13
CLK
I
Shift clock input pin. The input signal from the DI pin enters the 12-bit shift
register at the rising edge of the shift clock pulse. (Do not leave this pin
floating.)
12
LD
I
When the LD pin inputs the High-level signal, shift register value is loaded
to the decoder and the D/A output register. (Do not leave this pin floating.
When data is not transferred, fix the pin to the "Low" level.)
15
2
3
4
5
6
7
10
AO
1
AO
2
AO
3
AO
4
AO
5
AO
6
AO
7
AO
8
O
8-bit D/A output with op amp.
9
V
CC
--
MCU interface and OP amp power-supply pin.
16
GND
--
MCU interface and OP amp GND pin.
8
V
DD
--
D/A converter reference power (High) input pin.
1
V
SS
--
D/A converter reference power (Low) input pin.
V
SS
AO
3
AO
4
AO
5
AO
6
AO
7
V
DD
GND
AO
1
AO
8
V
CC
DO
LD
CLK
DI
(Top view)
(DIP-16P-M04)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
AO
2
(FPT-16P-M06)
(FPT-16P-M05)
4
MB88347L
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DATA CONFIGURATION
The MB88347L has a 12-bit shift register for chip control.
The 12-bit shift register must be used to set up data in the configuration shown below.
The data configuration has a total of 12 bits, for address selection and eight for D/A data output.
D/A converter control signals
Note: V
LB
= (V
DD
V
SS
)/256
Address selection signals
D0
D1
D2
D3
D4
D5
D6
D7
D/A data output
0
0
0
0
0
0
0
0
V
SS
1
0
0
0
0
0
0
0
V
LB
1 + V
SS
0
1
0
0
0
0
0
0
V
LB
2 + V
SS
0
1
1
1
1
1
1
1
V
LB
254 + V
SS
1
1
1
1
1
1
1
1
V
LB
255 + V
SS
D8
D9
D10
D11
Address selection
0
0
0
0
Don't Care
0
0
0
1
AO
1
Selection
0
0
1
0
AO
2
Selection
0
0
1
1
AO
3
Selection
0
1
0
0
AO
4
Selection
0
1
0
1
AO
5
Selection
0
1
1
0
AO
6
Selection
0
1
1
1
AO
7
Selection
1
0
0
0
AO
8
Selection
1
0
0
1
Don't Care
1
0
1
0
Don't Care
1
0
1
1
Don't Care
1
1
0
0
Don't Care
1
1
0
1
Don't Care
1
1
1
0
Don't Care
1
1
1
1
Don't Care
Last
LSB
First
MSB
D/A output bits
Address selection bits
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
5
MB88347L
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DATA SETTING TIMING CHART
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ANALOG OUTPUT VOLTAGE RANGE
D/A output
LD
CLK
DI
MSB
D11
D10
D9
D8
D2
D1
D0
LSB
DO output
D11
D10
R-2R ladder output
Op amp output
V
DD
V
CC
V
AOH
(V
CC
)
V
AOL
(GND)
D/A output range
(linear area)
GND
V
SS
V
CC
= V
DD
GND = V
SS
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