DS04-13511-2E
FUJITSU SEMICONDUCTOR
DATA SHEET
Linear IC Converter
CMOS
D/A Converter for Digital Tuning
(12-channel, 8-bit, on-chip OP amp, low-voltage)
MB88346L
s
DESCRIPITON
The Fujitsu MB88346L is an 8-bit D/A converter capable of low-voltage operation, and designed with a built-in
amp on each of its 12 analog output lines for large-current drive capability.
The use of serial data input means that only three control lines are required, and enables cascade connection
of multiple MB88346L chips.
The MB88346L is suitable for applications such as electronic volume controls and replacement of semi-fixed
resistors in tuning systems.
In addition, the MB88346L is both function-compatible and pin-compatible with the MB88346B now in use,
allowing easy substitution of the MB88346L for reduced supply voltage.
s
FEATURES
Low voltage operation (V
CC
/V
DD
: 2.7 to 3.6 V)
Ultra-low power consumption (0.5 mW/ch at V
CC
= 3 V)
Ultra-compact space-saving package lineup (SSOP-20)
Contains 12-channel R-2R type 8-bit D/A converter
On-chip analog output amps (sink current max. 1.0 mA, source current max. 1.0 mA)
Analog output range from 0 to V
CC
Two separate power supply/ground lines for MCU interface block/operational amplifier output buffer block and
D/A converter block
Serial data input, maximum operating speed 2.5 MHz
(maximum operating speed in cascade connection is 1.5 MHz)
CMOS process
Package lineup includes DIP 20-pin, SOP 20-pin, SSOP 20-pin.
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PACKAGES
(DIP-20P-M02)
20-pin plastic SOP
(FPT-20P-M01)
(FPT-20P-M03)
20-pin plastic DIP
20-pin plastic SSOP
3
MB88346L
s
PIN DESCRIPTION
Pin No.
Symbol
I/O
Function
17
DI
I
Serial address/data input to the internal 12-bit shift register: The
address/data format is that upper 4 bits (D11 to D8) indicate an
address and lower 8 bits (D7 to D0) indicate data. The D11 (MSB) is
the first-in bit and D0 (LSB) is the last-in bit.
14
DO
O
Outputs MSB bit data from 12-bit shift register.
16
CLK
I
Shift clock input to the internal 12-bit shift register: At the rising edge
of CLK data on the DI pin is shifted into the LSB of the shift register
and contents of the shift register are shifted right (to the MSB).
15
LD
I
Load strobe input for a 12-bit address/data: A high level on the LD pin
latches a 4-bit address (upper 4 bits: D11 to D8) of the internal 12-bit
shift register into the internal address decoder, and writes 8-bit data
(lower 8 bits: D7 to D0) of the shift register into an internal data latch
selected by the latched address.
18
19
2
3
4
5
6
7
8
9
12
13
AO
1
AO
2
AO
3
AO
4
AO
5
AO
6
AO
7
AO
8
AO
9
AO
10
AO
11
AO
12
O
8-bit D/A output pins with OP amps.
11
V
CC
--
MCU interface and OP amp power supply pin.
20
GND
--
MCU interface and OP amp ground pin.
10
V
DD
--
D/A converter power supply pin.
1
V
SS
--
D/A converter ground pin.
5
MB88346L
s
DATA CONFIGURATION
The MB88346L has a 12-bit shift register for chip control functions. The 12-bit shift register must be used to set
up data in the configuration shown below.
The data configuration has a total of 12 bits, four for address selection and eight for D/A data output.
1. Shift Register Control Data Configuration
2. D/A Converter Control Signals
V
LB
= (V
DD
V
SS
)/255
D0
D1
D2
D3
D4
D5
D6
D7
D/A data output
0
0
0
0
0
0
0
0
V
SS
1
0
0
0
0
0
0
0
V
LB
+ V
SS
0
1
0
0
0
0
0
0
V
LB
2 + V
SS
0
1
1
1
1
1
1
1
V
LB
254 + V
SS
1
1
1
1
1
1
1
1
V
DD
Last
LSB
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
First
MSB
Address selection
D/A data output
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