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NM93C46A Rev. F
NM93C46A 1K-Bit Serial CMOS EEPROM
(MICROWIRE
TM
Synchronous Bus)
February 2000
2000 Fairchild Semiconductor International
NM93C46A
1K-Bit Serial CMOS EEPROM
(MICROWIRETM Synchronous Bus)
General Description
NM93C46A is a 1024-bit CMOS non-volatile EEPROM organized
as 64 x 16-bit array. This device features MICROWIRE interface
which is a 4-wire serial bus with chipselect (CS), clock (SK), data
input (DI) and data output (DO) signals. This interface is compat-
ible to many of standard Microcontrollers and Microprocessors.
This device offers a pin (ORG), using which, the user can select
the format of the data (16-bit or 8-bit). If ORG is tied to GND, then
8-bit format is selected, while if ORG is tied to V
CC
, then 16-bit
format is selected. There are 7 instructions implemented on the
NM93C46A for various Read, Write, Erase, and Write Enable/
Disable operations. This device is fabricated using Fairchild
Semiconductor floating-gate CMOS process for high reliability,
high endurance and low power consumption.
"LZ" and "L" versions of NM93C46A offer very low standby current
making them suitable for low power applications. This device is
offered in both SO and TSSOP packages for small space consid-
erations.
Functional Diagram
Features
I Wide V
CC
2.7V - 5.5V
I User selectable organization
x16 (ORG = 1)
x8 (ORG = 0)
I Typical active current of 200A
10
A standby current typical
1
A standby current typical (L)
0.1
A standby current typical (LZ)
I No Erase instruction required before Write instruction
I Self timed write cycle
I Device status during programming cycles
I 40 year data retention
I Endurance: 1,000,000 data changes
I Packages available: 8-pin SO, 8-pin DIP, 8-pin TSSOP
INSTRUCTION
DECODER
CONTROL LOGIC
AND CLOCK
GENERATORS
HIGH VOLTAGE
GENERATOR
AND
PROGRAM
TIMER
INSTRUCTION
REGISTER
ADDRESS
REGISTER
EEPROM ARRAY
READ/WRITE AMPS
DATA IN/OUT REGISTER
16/8 BITS
DECODER
16
16
DATA OUT BUFFER
CS
SK
DI
ORG
DO
V
SS
V
CC
2
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NM93C46A Rev. F
NM93C46A 1K-Bit Serial CMOS EEPROM
(MICROWIRE
TM
Synchronous Bus)
Connection Diagram
Dual-In-Line Package (N)
8Pin SO (M8) and 8Pin TSSOP (MT8)
Top View
Package Number
N08E, M08A and MTC08
Pin Names
CS
Chip Select
SK
Serial Data Clock
DI
Serial Data Input
DO
Serial Data Output
GND
Ground
ORG
Organization
NC
No Connect
V
CC
Power Supply
NOTE:
Pins designated as "NC" are typically unbonded pins. However some of them are bonded for special testing purposes. Hence if a signal is applied to these pins, care
should be taken that the voltage applied on these pins does not exceed the V
CC
applied to the device. This will ensure proper operation.
Ordering Information
NM
93
C
XX
A
T
LZ
E
XXX
Letter Description
Package
N
8-pin DIP
M8
8-pin SO
MT8
8-pin TSSOP
Temp. Range
None
0 to 70
C
V
-40 to +125
C
E
-40 to +85
C
Voltage Operating Range
Blank
4.5V to 5.5V
L
2.7V to 5.5V
LZ
2.7V to 5.5V and
<1
A Standby Current
Blank
Normal Pinout
T
Rotated Pinout
A
x8 or x16 configuration
Density
46
1024 bits
C
CMOS
CS
Data protect and sequential
read
Interface
93
MICROWIRE
Fairchild Memory Prefix
V
CC
ORG
GND
CS
SK
DI
DO
1
2
3
4
8
7
6
5
NC
ORG
DO
DI
NC
VCC
CS
SK
1
2
3
4
8
7
6
5
GND
Normal
Pinout
Rotated
Pinout
3
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NM93C46A Rev. F
NM93C46A 1K-Bit Serial CMOS EEPROM
(MICROWIRE
TM
Synchronous Bus)
Absolute Maximum Ratings
(Note 1)
Ambient Storage Temperature
-65
C to +150C
All Input or Output Voltages
+6.5V to -0.3V
with Respect to Ground
Lead Temperature
(Soldering, 10 sec.)
+300
C
ESD rating
2000V
Operating Conditions
Ambient Operating Temperature
NM93C46A
0
C to +70C
NM93C46AE
-40
C to +85C
NM93C46AV
-40
C to +125C
Power Supply (V
CC
)
4.5V to 5.5V
DC and AC Electrical Characteristics
V
CC
= 4.5V to 5.5V unless otherwise specified
Symbol
Parameter
Conditions
Min
Max
Units
I
CCA
Operating Current
CS = V
IH
, SK=1.0 MHz
1
mA
I
CCS
Standby Current
CS = V
IL
50
A
I
IL
Input Leakage
V
IN
= 0V to V
CC
-1
A
I
OL
Output Leakage
(Note 2)
I
ILO
Input Leakage ORG Pin
ORG tied to V
CC
-1
1
A
ORG tied to V
SS
(Note 3)
-2.5
2.5
V
IL
Input Low Voltage
-0.1
0.8
V
V
IH
Input High Voltage
2
V
CC
+1
V
OL1
Output Low Voltage
I
OL
= 2.1 mA
0.4
V
V
OH1
Output High Voltage
I
OH
= -400
A
2.4
V
OL2
Output Low Voltage
I
OL
= 10
A
0.2
V
V
OH2
Output High Voltage
I
OH
= -10
A
V
CC
- 0.2
f
SK
SK Clock Frequency
(Note 4)
1
MHz
t
SKH
SK High Time
0
C to +70C
250
ns
-40
C to +125C
300
t
SKL
SK Low Time
250
ns
t
SKS
SK Setup Time
50
ns
t
CS
Minimum CS Low Time
(Note 5)
250
ns
t
CSS
CS Setup Time
100
ns
t
DH
DO Hold Time
70
ns
t
DIS
DI Setup Time
100
ns
t
CSH
CS Hold Time
0
ns
t
DIH
DI Hold Time
20
ns
t
PD
Output Delay
500
ns
t
SV
CS to Status Valid
500
ns
t
DF
CS to DO in Hi-Z
CS = V
IL
100
ns
t
WP
Write Cycle Time
10
ms
4
www.fairchildsemi.com
NM93C46A Rev. F
NM93C46A 1K-Bit Serial CMOS EEPROM
(MICROWIRE
TM
Synchronous Bus)
Absolute Maximum Ratings
(Note 1)
Ambient Storage Temperature
-65
C to +150C
All Input or Output Voltages
+6.5V to -0.3V
with Respect to Ground
Lead Temperature
(Soldering, 10 sec.)
+300
C
ESD rating
2000V
Operating Conditions
Ambient Operating Temperature
NM93C46AL/LZ
0
C to +70C
NM93C46ALE/LZE
-40
C to +85C
NM93C46ALV/LZV
-40
C to +125C
Power Supply (V
CC
)
2.7V to 5.5V
DC and AC Electrical Characteristics
V
CC
= 2.7V to 5.5V unless otherwise specified
Symbol
Parameter
Conditions
Min
Max
Units
I
CCA
Operating Current
CS = V
IH
, SK=1.0 MHz
1
mA
I
CCS
Standby Current
CS = V
IL
L
10
A
LZ (2.7V to 4.5V)
1
A
I
IL
Input Leakage
V
IN
= 0V to V
CC
1
A
I
OL
Output Leakage
(Note 2)
I
ILO
Input Leakage ORG Pin
ORG tied to V
CC
-1
1
A
ORG tied to V
SS
(Note 3)
-2.5
2.5
V
IL
Input Low Voltage
-0.1
0.15V
CC
V
V
IH
Input High Voltage
0.8V
CC
V
CC
+1
V
OL
Output Low Voltage
I
OL
= 10
A
0.1V
CC
V
V
OH
Output High Voltage
I
OH
= -10
A
0.9V
CC
f
SK
SK Clock Frequency
(Note 4)
0
250
KHz
t
SKH
SK High Time
1
s
t
SKL
SK Low Time
1
s
t
SKS
SK Setup Time
0.2
s
t
CS
Minimum CS Low Time
(Note 5)
1
s
t
CSS
CS Setup Time
0.2
s
t
DH
DO Hold Time
70
ns
t
DIS
DI Setup Time
0.4
s
t
CSH
CS Hold Time
0
ns
t
DIH
DI Hold Time
0.4
s
t
PD
Output Delay
2
s
t
SV
CS to Status Valid
1
s
t
DF
CS to DO in Hi-Z
CS = V
IL
0.4
s
t
WP
Write Cycle Time
15
ms
Capacitance T
A
= 25
C, f = 1 MHz (Note 6)
Symbol
Test
Typ
Max
Units
C
OUT
Output Capacitance
5
pF
C
IN
Input Capacitance
5
pF
Note 1:
Stress above those listed under "Absolute Maximum Ratings" may cause permanent damage
to the device. This is a stress rating only and functional operation of the device at these or any other
conditions above those indicated in the operational sections of the specification is not implied. Exposure
to absolute maximum rating conditions for extended periods may affect device reliability.
Note 2:
Typical leakage values are in the 20nA range.
Note 3:
ORG pin may draw >1
A when in x8 mode due to the internal pull-up transistor.
Note 4:
The shortest allowable SK clock period = 1/f
SK
(as shown under the f
SK
parameter). Maximum
SK clock speed (minimum SK period) is determined by the interaction of several AC parameters stated
in the datasheet. Within this SK period, both t
SKH
and t
SKL
limits must be observed. Therefore, it is not
allowable to set 1/f
SK
= t
SKHminimum
+ t
SKLminimum
for shorter SK cycle time operation.
Note 5:
CS (Chip Select) must be brought low (to V
IL
) for an interval of t
CS
in order to reset all internal
device registers (device reset) prior to beginning another opcode cycle. (This is shown in the opcode
diagram on the following page.)
Note 6:
This parameter is periodically sampled and not 100% tested.
AC Test Conditions
V
CC
Range
V
IL
/V
IH
V
IL
/V
IH
V
OL
/V
OH
I
OL
/I
OH
Input Levels
Timing Level
Timing Level
2.7V
V
CC
5.5V
0.3V/1.8V
1.0V
0.8V/1.5V
10A
(Extended Voltage Levels)
4.5V
V
CC
5.5V
0.4V/2.4V
1.0V/2.0V
0.4V/2.4V
2.1mA/-0.4mA
(TTL Levels)
Output Load: 1 TTL Gate (C
L
= 100 pF)
5
www.fairchildsemi.com
NM93C46A Rev. F
NM93C46A 1K-Bit Serial CMOS EEPROM
(MICROWIRE
TM
Synchronous Bus)
Pin Description
Chip Select (CS)
This is an active high input pin to NM93C46A EEPROM (the device)
and is generated by a master that is controlling the device. A high
level on this pin selects the device and a low level deselects the
device. All serial communications with the device is enabled only
when this pin is held high. However this pin cannot be permanently
tied high, as a rising edge on this signal is required to reset the
internal state-machine to accept a new cycle and a falling edge to
initiate an internal programming after a write cycle. All activity on the
SK, DI and DO pins are ignored while CS is held low.
Serial Clock (SK)
This is an input pin to the device and is generated by the master that
is controlling the device. This is a clock signal that synchronizes the
communication between a master and the device. All input informa-
tion (DI) to the device is latched on the rising edge of this clock input,
while output data (DO) from the device is driven from the rising edge
of this clock input. This pin is gated by CS signal.
Serial Input (DI)
This is an input pin to the device and is generated by the master
that is controlling the device. The master transfers Input informa-
tion (Start bit, Opcode bits, Array addresses and Data) serially via
this pin into the device. This Input information is latched on the
rising edge of the SCK. This pin is gated by CS signal.
Serial Output (DO)
This is an output pin from the device and is used to transfer Output
data via this pin to the controlling master. Output data is serially
shifted out on this pin from the rising edge of the SCK. This pin is
active only when the device is selected.
Organization (ORG)
This is an input pin to the device and is used to select the format
of data (16-bit or 8-bit). If this pin is tied high, 16-bit format is
selected, while if it is tied low, 8-bit format is selected. Depending
on the format selected, NM93C46A requires 6-bit address field
(for 16-bit data format) or 7-bit address field (for 8-bit data format).
Refer Table 1 and Table 2 for more details. This pin is internally
pulled-up to V
CC
. Hence leaving this pin unconnected would
default to 16-bit data format.
Microwire Interface
A typical communication on the Microwire bus is made through the
CS, SK, DI and DO signals. To facilitate various operations on the
Memory array, a set of 7 instructions are implemented on
NM93C46A. The format of each instruction is listed under Table
1 (for 16-bit format) and Table 2 (for 8-bit format).
Instruction
Each of the above 7 instructions is explained under individual
instruction descriptions.
Start bit
This is a 1-bit field and is the first bit that is clocked into the device
when a Microwire cycle starts. This bit has to be "1" for a valid cycle
to begin. Any number of preceding "0" can be clocked into the
device before clocking a "1".
Opcode
This is a 2-bit field and should immediately follow the start bit.
These two bits (along with 2 MSB of address field) select a
particular instruction to be executed.
Address Field
Depending on the selected organization, this is a 6-bit or 7-bit field
and should immediately follow the Opcode bits. In NM93C46A, all
6 bits (or 7 bits) are used for address decoding during READ,
WRITE and ERASE instructions. During all other instructions, the
MSB 2 bits are used to decode instruction (along with Opcode bits).
Data Field
Depending on the selected organization, this is a 16-bit or 8-bit
field and should immediately follow the Address bits. Only the
WRITE and WRALL instructions require this field. MSB bit (D15 or
D7) is clocked first and LSB bit (D0) is clocked last (both during
writes as well as reads).
Table 1. Instruction set (16-bit organization)
Instruction
Start Bit
Opcode Field
Address Field
Data Field
READ
1
10
A5
A4
A3
A2
A1
A0
WEN
1
00
1
1
X
X
X
X
WRITE
1
01
A5
A4
A3
A2
A1
A0
D15-D0
WRALL
1
00
0
1
X
X
X
X
D15-D0
WDS
1
00
0
0
X
X
X
X
ERASE
1
11
A5
A4
A3
A2
A1
A0
ERAL
1
00
1
0
X
X
X
X
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