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NM27LV210 1,048,576-Bit (64K x 16) Low Voltage EPROM
NM27LV210
1,048,576-Bit (64K x 16) Low Voltage EPROM
General Description
The NM27LV210 is a high performance Low Voltage Electrical
Programmable read only memory. It is manufactured using
Fairchild's latest EPROM technology. This technology allows the
part to operate at high speeds.
This Low Voltage and Low Power EPROM is designed with power
sensitive hand held and portable battery products in mind. This
allows for code storage of firmware for applications like notebook
computers, palm top computers, cellular phones, and HDD.
The NM27LV210 is one member of Fairchild's growing Low
Voltage product family.
Block Diagram
July 1998
Features
s
3.0V to 3.6V operation
s
200 ns, 250 ns maximum access time
s
Low current operation
-- 20mA I
CC
active current @ 5 MHz
-- 50
A I
CC
standby current @ 5 MHz
s
Ultra low power operation
-- 60
A standby power @ 3.3V
-- 50 mW active power @ 3.3V
s
Surface mount package option
-- 44-Pin PLCC
DS011376-1
1998 Fairchild Semiconductor Corporation
Vcc
GND
Vpp
OE
PGM
Output Enable
Chip Enable, and
Program Logic
Y
Decoder
X
Decoder
Output
Buffers
1,048,576-Bit
Cell Matrix
A0 - A15
Address
Inputs
Data Outputs O0 - O15
CE
2
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NM27LV210 1,048,576-Bit (64K x 16) Low Voltage EPROM
Connection Diagrams
PLCC Pin Configuration
Top View
Commercial Temperature Range
(0
C to +70
C) V
CC
= 3.3V
0.3
Parameter/Order Number
Access Time (ns)
NM27LV210 V 200
200
NM27LV210 V 250
250
Pin Names
A0A15
Addresses
CE
Chip Enable
OE
Output Enable
O0O15
Outputs
PGM
Program
XX
Don't Care (During Read)
NC
No Connect
V
PP
Programming Voltage
Extended Temperature Range
(-40
C to +85
C) V
CC
= 3.3V
0.3
Parameter/Order Number
Access Time (ns)
NM27LV210 VE 250
250
All packages conform to JEDEC standard.
All versions are guaranteed to function in slower applica-
tions.
Consult the FSC representative for newly released products/
packages.
O
12
O
11
O
10
O
9
O
8
GND
NC
O
7
O
6
O
5
O
4
A
13
A
12
A
11
A
10
A
9
GND
NC
A
8
A
7
A
6
A
5
O
13
O
14
O
15
XX/V
PP
NC
NC
A
15
A
14
O
3
O
2
O
1
O
0
OE
NC
A
0
A
1
A
2
A
3
A
4
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
40
41
42
43
44
38
37
36
35
34
33
32
31
30
22
21
20
19
18
28
27
26
25
24
23
29
39
CE
V
CC
XX/PGM
O
12
O
11
O
10
O
9
O
8
GND
NC
O
7
O
6
O
5
O
4
A
13
A
12
A
11
A
10
A
9
GND
NC
A
8
A
7
A
6
A
5
O
13
O
14
O
15
XX/V
PP
NC
NC
A
15
A
14
O
3
O
2
O
1
O
0
OE
NC
A
0
A
1
A
2
A
3
A
4
39
40
41
42
43
44
1
2
3
4
5
6
7
8
9
10
11
34
35
36
37
38
32
31
30
29
28
27
26
25
24
16
15
14
13
12
22
21
20
19
18
17
23
33
CE
V
CC
XX/PGM
DS011376-7
DS011376-3
3
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NM27LV210 1,048,576-Bit (64K x 16) Low Voltage EPROM
Absolute Maximum Ratings
(Note 2)
Storage Temperature
-65
C to +150
C
All Input Voltages except A9 with
Respect to Ground (Note 12)
-0.6V to +7V
V
PP
and A9 with Respect to Ground
-0.6V to +14V
V
CC
Supply Voltage with
Respect to Ground
-0.6V to +7V
ESD Protection
>2000V
All Output Voltages with
Respect to Ground (Note 11)
V
CC
+ 1.0V to GND - 0.6V
Operating Range
Range
Temperature
V
CC
Tolerance
Commercial
0
C to +70
C
3.3
0.3
Extended
-40
C to +85
C
3.3
0.3
DC Read Characteristics
Over Operating Range with V
PP
= V
CC
Symbol
Parameter
Test Conditions
Min
Max
Units
V
IL
Input Low Level
-0.3
0.7
V
V
IH
Input High Level
2.0
V
CC
+ 0.3
V
V
OL1
Output Low Voltage (TTL)
0.4
V
V
OH1
Output High Voltage (TTL)
2.4
V
V
OL2
Output Low Voltage (CMOS)
0.2
V
V
OH2
Output High Voltage (CMOS)
V
CC
- 0.3
V
I
SB1
V
CC
Standby Current (TTL)
CE = V
IH
150
A
I
SB2
V
CC
Standby Current (CMOS)
CE = V
CC
0.3V
50
A
I
CC
V
CC
Active Current
CE = OE = V
IL
,
f = 5 MHz
20
mA
I/O = 0
A
I
PP
V
PP
Supply Current
V
PP
= V
CC
10
A
I
LI
Input Load Current
V
IN
= 3.3 or GND
-1
1
A
I
LO
Output Leakage Current
V
OUT
= 3.3V or GND
-1
10
A
AC Read Characteristics
Over Operating Range with V
PP
= V
CC
Symbol
Parameter
200
250
Units
Min
Max
Min
Max
t
ACC
Address to Output Delay
200
250
t
CE
CE to Output Delay
200
250
t
OE
OE to Output Delay
70
75
t
DF
Output Disable to Output Float
0
50
0
60
ns
(Note 3)
t
OH
Output Hold from Addresses,
(Note 3)
CE or OE , Whichever
0
0
Occurred First
Capacitance (Note 3)
T
A
= +25C, f = 1 MHz
Symbol
Parameter
Conditions
Typ
Max
Units
C
IN
Input Capacitance
V
IN
= 0V
12
20
pF
C
OUT
Output Capacitance
V
OUT
= 0V
13
20
pF
4
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NM27LV210 1,048,576-Bit (64K x 16) Low Voltage EPROM
AC Test Conditions
Output Load
1 TTL Gate and C
L
= 100 pF (Note 9)
Input Rise and Fall Times
5 ns
Input Pulse Levels
0.45V to 2.4V
Timing Measurement Reference Level
Inputs
0.8V and 2V
Outputs
0.8V and 2V
AC Waveforms
(Note 7) (Note 8) (Note 10)
Note 2: Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of
the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions
for extended periods may affect device reliability.
Note 3: This parameter is only sampled and is not 100% tested.
Note 4: OE may be delayed up to t
ACC
- t
OE
after the falling edge of CE without impacting t
ACC
.
Note 5: The t
DF
and t
CF
compare level is determined as follows:
High to TRI-STATE
TM
, the measured V
OH1
(DC) - 0.10V;
Low to TRI-STATE, the measured V
OL1
(DC) + 0.10V.
Note 6: TRI-STATE may be attained using OE or CE.
Note 7: The power switching characteristics of EPROMs require careful device decoupling. It is recommended that at least a 0.1
F ceramic capacitor be used on every device
between V
CC
and GND.
Note 8: The outputs must be restricted to V
CC
+ 1.0V to avoid latch-up and device damage.
Note 9: 1 TTL Gate: I
OL
= 1.6 mA, I
OH
= -400
A.
C
L
: 100 pF includes fixture capacitance.
Note 10: V
PP
may be connected to V
CC
except during programming.
Note 11: Inputs and outputs can undershoot to -2.0V for 20 ns Max.
Programming Characteristics
(Note 12) (Note 13) (Note 14) (Note 15)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
t
AS
Address Setup Time
1
s
t
OES
OE Setup Time
1
s
t
CES
CE Setup Time
OE = V
IH
1
s
t
DS
Data Setup Time
1
s
t
VPS
V
PP
Setup Time
1
s
t
VCS
V
CC
Setup Time
1
s
t
AH
Address Hold Time
0
s
t
DH
Data Hold Time
1
s
t
DF
Output Enable to Output Float Delay
CE = V
IL
0
60
ns
,,
Address Valid
Valid Output
2.0V
0.8V
2.0V
0.8V
2.0V
0.8V
ADDRESS
OUTPUT
CE
OE
tCE
2.0V
0.8V
(Note 3)
(Note 3)
tDF
(Note 4, 5)
(Note 4, 5)
tDH
Hi-Z
tOE
ACC
t
CF
t
,
Hi-Z
DS011376-4
5
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NM27LV210 1,048,576-Bit (64K x 16) Low Voltage EPROM
Programming Characteristics
(Note 12) (Note 13) (Note 14) (Note 15) (Continued)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
t
PW
Program Pulse Width
45
50
105
s
t
OE
Data Valid from OE
CE = V
IL
100
ns
I
PP
V
PP
Supply Current during
CE = V
IL
40
mA
Programming Pulse
PGM = V
IL
I
CC
V
CC
Supply Current
50
mA
T
A
Temperature Ambient
20
25
30
C
V
CC
Power Supply Voltage
6.25
6.5
6.75
V
V
PP
Programming Supply Voltage
12.5
12.75
13.0
V
t
FR
Input Rise, Fall Time
5
ns
V
IL
Input Low Voltage
0.0
0.45
V
V
IH
Input High Voltage
2.4
4.0
V
t
IN
Input Timing Reference Voltage
0.8
2.0
V
t
OUT
Output Timing Reference Voltage
0.8
2.0
V
Programming Waveforms
(Note 14)
Note 12: Fairchild's standard product warranty applies only to devices programmed to specifications described herein.
Note 13: V
CC
must be applied simultaneously or before V
PP
and removed simultaneously or after V
PP
. The EPROM must not be inserted into or removed from a board with
voltage applied to V
PP
or V
CC
.
Note 14: The maximum absolute allowable voltage which may be applied to the V
PP
pin during programming is 14V. Care must be taken when switching the V
PP
supply to
prevent any overshoot from exceeding this 14V maximum specification. At least a 0.1
F capacitor is required across V
PP
, V
CC
to GND to suppress spurious voltage transients
which may damage the device.
Note 15: During power up the PGM pin must be brought high (
V
IH
) either coincident with or before power is applied to V
PP
.
t AS
Program
Program Verify
Address N
t DF
Hi-Z
t DS
t DH
t VCS
t VPS
t PW
t OES
t OE
2.0V
0.8V
2.0V
0.8V
6.25V
12.75V
2.0V
0.8V
2.0V
0.8V
Addresses
Data
OE
CE
VCC
VPP
0.8V
PGM
t CES
Data Out Valid
ADD N
Data In Stable
ADD N
DS011376-5
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