2000 Fairchild Semiconductor Corporation
DS006114
www.fairchildsemi.com
September 1986
Revised April 2000
DM74ALS520
DM74ALS521 8-
Bit
Comparat
or
DM74ALS520 DM74ALS521
8-Bit Comparator
General Description
These comparators perform an "equal to" comparison of
two 8-bit words with provision for expansion or external
enabling. The matching of the two 8-bit input plus a logic
LOW on the EN input produces the output A
=
B on the
DM74ALS520 and DM74ALS521. The DM74ALS520 and
DM74ALS521 have totem pole outputs for wire AND cas-
cading. Additionally, the DM74ALS520 is provided with B
input pull up termination resistors for analog or switch data.
Features
s
Switching specifications at 50 pF
s
Switching specifications guaranteed over full tempera-
ture and V
CC
range
s
Advanced oxide-isolated, ion-implanted Schottky TTL
process
s
Functionally and pin for pin compatible with LS family
counterpart
s
Improved output transient handling capability
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter "X" to the ordering code.
Connection Diagram
Function Table
H
=
HIGH Logic Level
L
=
LOW Logic Level
X
=
Don't Care
Ordering Code
Package Number
Package Description
DM74ALS520WM
M20B
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
DM74ALS520N
N20A
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
DM74ALS521WM
M20B
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
SM74ALS521N
N20A
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Inputs
Output
EN
Data
A
=
B
L
A
=
B
L
L
A
B
H
H
X
H
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2
D
M
74ALS520
D
M
74ALS521
Logic Diagram
3
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DM74ALS520
DM74ALS521
Absolute Maximum Ratings
(Note 1)
Note 1: The "Absolute Maximum Ratings" are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum ratings.
The "Recommended Operating Conditions" table will define the conditions
for actual device operation.
Recommended Operating Conditions
Electrical Characteristics
over recommended operating free air temperature range. All typical values are measured at V
CC
=
5V, T
A
=
25
C.
Note 2: I
CC
is measured with EN grounded, A and B inputs at 4.5V and outputs OPEN.
Switching Characteristics
over recommended operating free air temperature range
Supply Voltage
7V
Input Voltage
7V
Operating Free Air Temperature Range
0
C to
+
70
C
Storage Temperature Range
-
65
C to
+
150
C
Typical
JA
N Package
62.0
C/W
M Package
82.0
C/W
Symbol
Parameter
Min
Nom
Max
Units
V
CC
Supply Voltage
4.5
5
5.5
V
V
IH
HIGH Level Input Voltage
2
V
V
IL
LOW Level Input Voltage
0.8
V
I
OH
HIGH Level Output Current
-
2.6
mA
I
OL
LOW Level Output Current
24
mA
T
A
Free Air Operating Temperature
0
70
C
Symbol
Parameter
Conditions
Min
Typ
Max
Units
V
IK
Input Clamp Voltage
V
CC
=
4.5V, I
I
=
-
18 mA
-
1.5
V
V
OH
HIGH Level
V
CC
=
4.5V to 5.5V
V
CC
-
2
V
Output Voltage
I
OH
=
-
400
A
V
CC
=
4.5V
2.4
3.2
V
I
OH
=
Max
V
OL
LOW Level Output Voltage
V
CC
=
4.5V
I
OL
=
24 mA
0.35
0.5
V
I
I
Max HIGH
V
CC
=
5.5V
V
IH
=
5.5V
Input Current
B Input DM74ALS520
0.1
mA
V
IH
=
7V, All Others
I
IH
HIGH Level
V
CC
=
5.5V,
All Others
20
A
Input Current
V
IH
=
2.7V
B Input DM74ALS520
-
200
I
IL
Low Level Input
V
CC
=
5.5V,
B Input DM74ALS520
-
0.6
mA
Current
V
IL
=
0.4V
All Others
-
0.1
mA
I
O
Output Drive Current
V
CC
=
5.5V
V
O
=
2.25V
-
30
-
112
mA
I
CC
Supply Current
V
CC
=
5.5V (Note 2)
12
19
mA
Symbol
Parameter
Conditions
From
To
Min
Max
Units
Input
Output
t
PLH
Propagation Delay Time
V
CC
=
4.5V to 5.5V
A or B
A
=
B
3
12
ns
LOW-to-HIGH Level Output
C
L
=
50 pF
Data
t
PHL
Propagation Delay Time
R
L
=
500
A or B
A
=
B
5
20
ns
HIGH-to-LOW Level Output
Data
t
PLH
Propagation Delay Time
EN
A
=
B
2
12
ns
LOW-to-HIGH Level Output
t
PHL
Propagation Delay Time
EN
A
=
B
5
22
ns
HIGH-to-LOW Level Output
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4
D
M
74ALS520
D
M
74ALS521
Physical Dimensions
inches (millimeters) unless otherwise noted
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
Package Number M20B
5
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DM74ALS520
DM74ALS521
8-
Bit
Comparat
or
Physical Dimensions
inches (millimeters) unless otherwise noted (Continued)
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Package Number N20A
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
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