2001 Fairchild Semiconductor Corporation
DS500101
www.fairchildsemi.com
March 2001
Revised March 2001
7
4
L
V
TH16
501
Low V
o
lt
age
1
8
-Bi
t
Univer
sal Bus T
r
anscei
ver
s
wi
th Bushold and 3-ST
A
T
E
Out
puts
74LVTH16501
Low Voltage 18-Bit Universal Bus Transceivers
with Bushold and 3-STATE Outputs
General Description
The LVTH16501 is an 18-bit universal bus transceiver
combining D-type latches and D-type flip-flops to allow
data flow in transparent, latched, and clocked modes.
Data flow in each direction is controlled by output-enable
(OEAB and OEBA), latch-enable (LEAB and LEBA), and
clock (CLKAB and CLKBA) inputs.
The LVTH16501 data inputs include bushold, eliminating
the need for external pull-up resistors to hold unused
inputs.
The transceiver is designed for low voltage (3.3V) V
CC
applications, but with the capability to provide a TTL inter-
face to a 5V environment. The LVTH16501 is fabricated
with an advanced BiCMOS technology to achieve high
speed operation similar to 5V ABT while maintaining low
power dissipation.
Features
s
Input and output interface capability to systems at
5V V
CC
s
Bushold data inputs eliminate the need for external
pull-up resistors to hold unused inputs
s
Live insertion/extraction permitted
s
Power up/down high impedance provides glitch-free bus
loading
s
Outputs source/sink
-
32 mA/
+
64 mA
s
Functionally compatible with the 74 series 16501
s
ESD Performance:
Human-Body Model
>
2000V
Machine Model
>
200V
Charged-Device Model
>
1000V
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter "X" to the ordering code.
Order Number
Package Number
Package Description
74LVTH16501MEA
MS56A
56-Lead Shrink Small Outline Package (SSOP), JEDEC MO-118, 0.300 Wide
74LVTH16501MTD
MTD56
56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
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2
74L
VTH16501
Connection Diagram
Pin Descriptions
Function Table
(Note 1)
H
=
HIGH Voltage Level
L
=
LOW Voltage Level
X
=
Immaterial
Z
=
High Impedance
=
LOW-to-HIGH Clock Transition
Note 1: A-to-B data flow is shown: B-to-A flow is similar but uses OEBA,
LEBA, and CLKBA. OEBA is active LOW
Note 2: Output level before the indicated steady-state input conditions
were established, provided that CLKAB was HIGH before LEAB went LOW.
Note 3: Output level before the indicated steady-state input conditions
were established.
Functional Description
For A-to-B data flow, the device operates in the transparent
mode when LEAB is HIGH. When LEAB is LOW, the A
data is latched if CLKAB is held at a HIGH or LOW logic
level. If LEAB is LOW, the A bus data is stored in the latch/
flip-flop on the LOW-to-HIGH transition of CLKAB. Output-
enable OEAB is active-HIGH. When OEAB is HIGH, the
outputs are active. When OEAB is LOW, the outputs are in
the high-impedance state.
Data flow for B to A is similar to that of A-to-B but uses
OEBA, LEBA, and CLKBA. The output enables are com-
plementary (OEAB is active-HIGH and OEBA is active-
LOW).
Logic Diagram
Pin Names
Description
A
1
A
18
Data Register A Inputs/3-STATE Outputs
B
1
B
18
Data Register B Inputs/3-STATE Outputs
CLKAB, CLKBA Clock Pulse Inputs
LEAB, LEBA
Latch Enable Inputs
OEAB, OEBA
Output Enable Inputs
Inputs
Output
OEAB
LEAB
CLKAB
A
n
B
n
L
X
X
X
Z
H
H
X
L
L
H
H
X
H
H
H
L
L
L
H
L
H
H
H
L
H
X
B
0
(Note 2)
H
L
L
X
B
0
(Note 3)
3
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4
L
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TH16
501
Absolute Maximum Ratings
(Note 4)
Recommended Operating Conditions
Note 4: Absolute Maximum continuous ratings are those values beyond which damage to the device may occur. Exposure to these conditions or conditions
beyond those indicated may adversely affect device reliability. Functional operation under absolute maximum rated conditions is not implied.
Note 5: I
O
Absolute Maximum Rating must be observed.
Symbol
Parameter
Value
Conditions
Units
V
CC
Supply Voltage
-
0.5 to
+
4.6
V
V
I
DC Input Voltage
-
0.5 to
+
7.0
V
V
O
DC Output Voltage
-
0.5 to
+
7.0 Output in 3-STATE
V
-
0.5 to
+
7.0 Output in HIGH or LOW State (Note 5)
V
I
IK
DC Input Diode Current
-
50
V
I
<
GND
mA
I
OK
DC Output Diode Current
-
50
V
O
<
GND
mA
I
O
DC Output Current
64
V
O
>
V
CC
Output at HIGH State
mA
128
V
O
>
V
CC
Output at LOW State
I
CC
DC Supply Current per Supply Pin
64
mA
I
GND
DC Ground Current per Ground Pin
128
mA
T
STG
Storage Temperature
-
65 to
+
150
C
Symbol
Parameter
Min
Max
Units
V
CC
Supply Voltage
2.7
3.6
V
V
I
Input Voltage
0
5.5
V
I
OH
HIGH-Level Output Current
-
32
mA
I
OL
LOW-Level Output Current
64
mA
T
A
Free-Air Operating Temperature
-
40
85
C
t/
V
Input Edge Rate, V
IN
=
0.8V2.0V, V
CC
=
3.0V
0
10
ns/V
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74L
VTH16501
DC Electrical Characteristics
Note 6: An external driver must source at least the specified current to switch from LOW-to-HIGH.
Note 7: An external driver must sink at least the specified current to switch from HIGH-to-LOW.
Note 8: This is the increase in supply current for each input that is at the specified voltage level rather than V
CC
or GND.
Dynamic Switching Characteristics
(Note 9)
Note 9: Characterized in SSOP package. Guaranteed parameter, but not tested.
Note 10: Max number of outputs defined as (n). n
-
1 data inputs are driven 0V to 3V. Output under test held LOW.
Symbol
Parameter
V
CC
T
A
=
-
40
C to
+
85
C
Units
Conditions
(V)
Min
Max
V
IK
Input Clamp Diode Voltage
2.7
-
1.2
V
I
I
=
-
18 mA
V
IH
Input HIGH Voltage
2.73.6
2.0
V
V
O
0.1V or
V
IL
Input LOW Voltage
2.73.6
0.8
V
O
V
CC
-
0.1V
V
OH
Output HIGH Voltage
2.73.6
V
CC
-
0.2
V
I
OH
=
-
100
A
2.7
2.4
V
I
OH
=
-
8 mA
3.0
2.0
V
I
OH
=
-
32 mA
V
OL
Output LOW Voltage
2.7
0.2
V
I
OL
=
100
A
2.7
0.5
V
I
OL
=
24 mA
3.0
0.4
V
I
OL
=
16 mA
3.0
0.5
V
I
OL
=
32 mA
3.0
0.55
V
I
OL
=
64 mA
I
I(HOLD)
Bushold Input Minimum Drive
3.0
75
A
V
I
=
0.8V
-
75
A
V
I
=
2.0V
I
I(OD)
Bushold Input Over-Drive
3.0
500
A
(Note 6)
Current to Change State
-
500
A
(Note 7)
I
I
Input Current
3.6
10
A
V
I
=
5.5V
Control Pins
3.6
1
A
V
I
=
0V or V
CC
Data Pins
3.6
-
5
A
V
I
=
0V
1
A
V
I
=
V
CC
I
OFF
Power Off Leakage Current
0
100
A
0V
V
I
or V
O
5.5V
I
PU/PD
Power up/down 3-STATE
01.5V
100
A
V
O
=
0.5V to 3.0V
Output Current
V
I
=
GND or V
CC
I
OZL
3-STATE Output Leakage Current
3.6
-
5
A
V
O
=
0.0V
I
OZH
3-STATE Output Leakage Current
3.6
5
A
V
O
=
3.6V
I
OZH
+
3-STATE Output Leakage Current
3.6
10
A
V
CC
<
V
O
5.5V
I
CCH
Power Supply Current
3.6
0.19
mA
Outputs HIGH
I
CCL
Power Supply Current
3.6
5
mA
Outputs LOW
I
CCZ
Power Supply Current
3.6
0.19
mA
Outputs Disabled
I
CCZ
+
Power Supply Current
3.6
0.19
mA
V
CC
V
O
5.5V,
Outputs Disabled
I
CC
Increase in Power Supply Current
3.6
0.2
mA
One Input at V
CC
-
0.6V
(Note 8)
Other Inputs at V
CC
or GND
Symbol
Parameter
V
CC
T
A
=
25
C
Units
Conditions
(V)
Min
Typ
Max
C
L
=
50 pF, R
L
=
500
V
OLP
Quiet Output Maximum Dynamic V
OL
3.3
0.8
V
(Note 10)
V
OLV
Quiet Output Minimum Dynamic V
OL
3.3
-
0.8
V
(Note 10)
5
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4
L
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TH16
501
AC Electrical Characteristics
Note 11: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The
specification applies to any outputs switching in the same direction, either HIGH-to-LOW (t
OSHL
) or LOW-to-HIGH (t
OSLH
).
Capacitance
(Note 12)
Note 12: Capacitance is measured at frequency f
=
1 MHz, per MIL-STD-883, Method 3012.
Symbol
Parameter
T
A
=
-
40
C to
+
85
C, C
L
=
50 pF, R
L
=
500
Units
V
CC
=
3.3
0.3V
V
CC
=
2.7V
Min
Max
Min
Max
f
MAX
CLKAB or CLKBA to B or A
150
150
MHz
t
PLH
Propagation Delay
1.3
5.1
1.3
5.6
ns
t
PHL
Data to Outputs
1.3
4.7
1.3
5.3
t
PLH
Propagation Delay
1.5
5.5
1.5
6.1
ns
t
PHL
LEBA or LEAB to B or A
1.5
5.1
1.5
5.7
t
PLH
Propagation Delay
1.3
56
1.3
6.2
ns
t
PHL
CLKBA or CLKAB to B or A
1.3
5.1
1.3
5.7
t
PZH
Output Enable Time
1.3
4.9
1.3
5.6
ns
t
PZL
1.3
5.4
1.3
6.2
t
PHZ
Output Disable Time
1.7
5.9
1.7
6.6
ns
t
PLZ
1.7
5.8
1.7
6.3
t
S
Setup Time
A before CLKAB
2.1
2.4
ns
B before CLKBA
2.1
2.4
A or B before LE, CLK HIGH
2.4
1.6
A or B before LE, CLK LOW
2.4
1.6
t
H
Hold Time
A or B after CLK
1.0
1.0
ns
A or B after LE
1.7
1.7
t
W
Pulse Width
LE HIGH
3.3
3.3
ns
CLK HIGH or LOW
3.3
3.3
t
OSLH
Output to Output Skew (Note 11)
1.0
1.0
ns
t
OSHL
1.0
1.0
Symbol
Parameter
Conditions
Typical
Units
C
IN
Input Capacitance
V
CC
=
0V, V
I
=
0V or V
CC
4
pF
C
I/O
Input/Output Capacitance
V
CC
=
3.0V, V
O
=
0V or V
CC
8
pF
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