1999 Fairchild Semiconductor Corporation
DS500301
www.fairchildsemi.com
August 1999
Revised October 1999
7
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74ACT16543
16-Bit Registered Transceiver with 3-STATE Outputs
General Description
The ACT16543 contains sixteen non-inverting transceivers
containing two sets of D-type registers for temporary stor-
age of data flowing in either direction. Each byte has sepa-
rate control inputs which can be shorted together for full
16-bit operation. Separate Latch Enable and Output
Enable inputs are provided for each register to permit inde-
pendent input and output control in either direction of data
flow.
Features
s
Independent registers for A and B buses
s
Separate controls for data flow in each direction
s
Back-to-back registers for storage
Multiplexed real-time and stored data transfers
s
Separate control logic for each byte
s
Outputs source/sink 24 mA
s
TTL-compatible inputs
Ordering Code:
Device also available in Tape and Reel. Specify by appending suffix letter "X" to the ordering code.
Logic Symbol
Pin Descriptions
Connection Diagram
FACT
TM
is a trademark of Fairchild Semiconductor Corporation.
Order Number
Package Number
Package Description
74ACT16543SSC
MS56A
56-Lead Shrink Small Outline Package (SSOP), JEDEC MO-118, 0.300" Wide
74ACT16543MTD
MTD56
56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Pin Names
Descriptions
OEAB
n
A-to-B Output Enable Input (Active LOW)
OEBA
n
B-to-A Output Enable Input (Active LOW)
CEAB
n
A-to-B Enable Input (Active LOW)
CEBA
n
B-to-A Enable Input (Active LOW)
LEAB
n
A-to-B Latch Enable Input (Active LOW)
LEBA
n
B-to-A Latch Enable Input (Active LOW)
A
0
A
15
A-to-B Data Inputs or
B-to-A 3-STATE Outputs
B
0
B
15
B-to-A Data Inputs or
A-to-B 3-STATE Outputs
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2
74ACT16543
Functional Description
The ACT16543 contains sixteen non-inverting transceivers
with 3-STATE outputs. The device is byte controlled with
each byte functioning identically, but independent of the
other. The control pins may be shorted together to obtain
full 16-bit operation. The following description applies to
each byte. For data flow from A to B, for example, the A-to-
B Enable (CEAB
n
) input must be LOW in order to enter
data from A
0
A
15
or take data from B
0
B
15
, as indicated in
the Data I/O Control Table. With CEAB
n
LOW, a LOW sig-
nal on the A-to-B Latch Enable (LEAB
n
) input makes the A-
to-B latches transparent; a subsequent LOW-to-HIGH tran-
sition of the LEAB
n
signal puts the A latches in the storage
mode and their outputs no longer change with the A inputs.
With CEAB
n
and OEAB
n
both LOW, the 3-STATE B output
buffers are active and reflect the data present at the output
of the A latches. Control of data flow from B to A is similar,
but using the CEBA
n
, LEBA
n
and OEBA
n
inputs.
Data I/O Control Table
H
=
HIGH Voltage Level
L
=
LOW Voltage Level
X
=
Immaterial
A-to-B data flow shown; B-to-A flow control
is the same, except using CEBA
n
, LEBA
n
and OEBA
n
Logic Diagrams
Byte 1
(0:7)
Byte 2
(8:15)
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
Inputs
Latch Status
(Byte n)
Output
Buffers
(Byte n)
CEAB
n
LEAB
n
OEAB
n
H
X
X
Latched
High Z
X
H
X
Latched
--
L
L
X
Transparent
--
X
X
H
--
High Z
L
X
L
--
Driving
3
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AC
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6543
Absolute Maximum Ratings
(Note 1)
Recommended Operating
Conditions
Note 1: Absolute maximum ratings are those values beyond which damage
to the device may occur. The databook specifications should be met, with-
out exception, to ensure that the system design is reliable over its power
supply, temperature, and output/input loading variables. Fairchild does not
recommend operation of FACT
TM
circuits outside databook specifications.
DC Electrical Characteristics
Note 2: All outputs loaded; thresholds associated with output under test.
Note 3: Maximum test duration 2.0 ms; one output loaded at a time.
Supply Voltage (V
CC
)
-
0.5V to
+
7.0V
DC Input Diode Current (I
IK
)
V
I
=
-
0.5V
-
20 mA
V
I
=
V
CC
+
0.5V
+
20 mA
DC Output Diode Current (I
OK
)
V
O
=
-
0.5V
-
20 mA
V
O
=
V
CC
+
0.5V
+
20 mA
DC Output Voltage (V
O
)
-
0.5V to V
CC
+
0.5V
DC Output Source/Sink Current (I
O
)
50 mA
DC V
CC
or Ground Current
per Output Pin
50 mA
Storage Temperature
-
65
C to
+
150
C
Supply Voltage (V
CC
)
4.5V to 5.5V
Input Voltage (V
I
)
0V to V
CC
Output Voltage (V
O
)
0V to V
CC
Operating Temperature (T
A
)
-
40
C to
+
85
C
Minimum Input Edge Rate (
V/
t)
125 mV/ns
V
IN
from 0.8V to 2.0V
V
CC
@ 4.5V, 5.5V
Symbol
Parameter
V
CC
T
A
=
+
25
C
T
A
=
-
40
C to
+
85
C
Units
Conditions
(V)
Typ
Guaranteed Limits
V
IH
Minimum HIGH
4.5
1.5
2.0
2.0
V
V
OUT
=
0.1V
Input Voltage
5.5
1.5
2.0
2.0
or V
CC
-
0.1V
V
IL
Maximum LOW
4.5
1.5
0.8
0.8
V
V
OUT
=
0.1V
Input Voltage
5.5
1.5
0.8
0.8
or V
CC
-
0.1V
V
OH
Minimum HIGH
4.5
4.49
4.4
4.4
V
I
OUT
=
-
50
A
Output Voltage
5.5
5.49
5.4
5.4
V
IN
=
V
IL
or V
IH
4.5
3.86
3.76
V
I
OH
=
-
24 mA
5.5
4.86
4.76
I
OH
=
-
24 mA (Note 2)
V
OL
Maximum LOW
4.5
0.001
0.1
0.1
V
I
OUT
=
50
A
Output Voltage
5.5
0.001
0.1
0.1
V
IN
=
V
IL
or V
IH
4.5
0.36
0.44
V
I
OL
= 24 mA
5.5
0.36
0.44
I
OL
= 24 mA (Note 2)
I
OZT
Maximum I/O
5.5
0.5
5.0
A
V
I
=
V
IL
, V
IH
Leakage Current
V
O
=
V
CC
, GND
I
IN
Maximum Input
5.5
0.1
1.0
A
V
I
=
V
CC
,
Leakage Current
GND
I
CCT
Maximum I
CC
/Input
5.5
0.6
1.5
mA
V
I
=
V
CC
-
2.1V
I
CC
Max Quiescent
5.5
8.0
80.0
A
V
IN
=
V
CC
Supply Current
or GND
I
OLD
Minimum Dynamic
5.5
75
mA
V
OLD
=
1.65V Max
I
OHD
Output Current (Note 3)
-
75
mA
V
OHD
=
3.85V Min
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4
74ACT16543
AC Electrical Characteristics
Note 4: Voltage Range 5.0 is 5.0V
0.5V.
AC Operating Requirements
Note 5: Voltage Range 5.0 is 5.0V
0.5V
Capacitance
V
CC
T
A
=
+
25
C
T
A
=
-
40
C to
+
85
C
Symbol
Parameter
(V)
C
L
=
50 pF
C
L
=
50 pF
Units
(Note 4)
Min
Typ
Max
Min
Max
t
PLH
Propagation Delay
3.8
5.9
8.3
3.0
9.0
t
PHL
Transparent Mode
5.0
3.5
5.5
7.9
2.6
8.5
ns
A
n
to B
n
or B
n
to A
n
t
PLH
Propagation Delay
4.7
6.9
9.8
3.4
10.8
t
PHL
LEBA
n
, LEAB
n
5.0
3.9
6.3
9.0
3.1
9.8
ns
to A
n
, B
n
t
PZH
Output Enable Time
4.2
6.3
9.2
3.0
9.9
t
PZL
OEBA
n
or OEAB
n
to A
n
or B
n
5.0
4.9
7.3
10.3
3.6
10.3
ns
CEBA
n
or CEAB
n
to A
n
or B
n
t
PHZ
Output Disable Time
2.8
5.2
8.0
2.1
8.3
t
PLZ
OEBA
n
or OEAB
n
to A
n
or B
n
5.0
2.6
5.0
7.6
2.0
8.1
ns
CEBA
n
or CEAB
n
to A
n
or B
n
V
CC
T
A
=
+
25
C
T
A
=
-
40
C to
+
85
C
Symbol
Parameter
(V)
C
L
=
50 pF
C
L
=
50 pF
Units
(Note 5)
Guaranteed Minimum
t
S
Setup Time, HIGH or LOW
5.0
3.0
3.0
ns
A
n
or B
n
to LEBA
n
or LEAB
n
t
H
Hold Time, HIGH or LOW
5.0
1.5
1.5
ns
A
n
or B
n
to LEBA
n
or LEAB
n
t
W
Latch Enable, B to A
5.0
4.0
4.0
ns
Pulse Width, LOW
Symbol
Parameter
Typ
Units
Conditions
C
IN
Input Capacitance
4.5
pF
V
CC
=
5.0V
C
PD
Power Dissipation.Capacitance
95.0
pF
V
CC
=
5.0V
5
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7
4
AC
T1
6543
Physical Dimensions
inches (millimeters) unless otherwise noted
56-Lead Thin Shrink Small Outline Package (SSOP), JEDEC MO-153, 6.1mm Wide
Package Number MS56A
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6
74ACT165
43
16
-Bit
R
e
gist
ered T
r
an
sceive
r
wi
th 3-
S
T
A
T
E O
u
t
puts
Physical Dimensions
inches (millimeters) unless otherwise noted (Continued)
56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
Package Number MTD56
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
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