ChipFind - документация

Электронный компонент: BT2084A

Скачать:  PDF   ZIP
February 28, 2001 BTI Confidential & Proprietary Information Page 1 of 4
R
F
I
C
s

f
o
r

G
S
M

c
e
l
l
u
l
a
r
G
R
T
T
M
OVERVIEW DATA SHEET: BT2084A
DUAL-BAND GSM & DCS SINGLE CHIP RF TRANSCEIVER
PR
EL
IM
IN
AR
Y
DA
TA
S
HE
ET
Features
Highly integrated complete dual-band GSM900 and
DCS1800 / PCS1900 RF Transceiver
Low noise and wide dynamic range receiver
Greater than 35dB on-chip image rejection in
receive mode
Over 90dB overall gain control in 2dB steps in
receive mode
Offset PLL transmitter architecture
Operating supply voltage from 2.7V to 3.3V
Ambient temperature range (-40
C to +85
C)
Low power BiCMOS silicon technology
48L QLP package with exposed ground pad
Functions
Receiver:
Dual Low Noise Amplifier (LNA) w/ Gain Control
Dual Image Reject RxRF Mixer
IF Output Buffer
IF Input Buffer w/ Gain Control
RxIF Mixer
Automatic Gain Control (AGC)
I/Q Demodulator
Baseband Channel Select Filter with tuning
Baseband I/Q Buffer
DC Offset Calibration
Transmitter:
I/Q Modulator
Offset PLL
- Downconversion Mixer
- Phase Detector
IFLO Buffer
RFLO Buffer
Applications
GSM/DCS Handsets & Communication Systems
RF Wireless Modems
RF Wireless Communications Products
General Description
The BT2084A is a highly integrated low power silicon
BiCMOS RF transceiver designed for dual-band
GSM900 and DCS1800/PCS1900 handset applications.
The BT2084A consists of a receiver, transmitter, and
both IF and RFLO buffer sections.
The receiver can be divided into two sections. The first
section is the receiver front-end which consists of a low
noise amplifier (LNA), image-reject downconversion mix-
ers and an IF output buffer. This section provides amplifi-
cation for the incoming signal with low noise and high
linearity. It also provides more than 35dB image sup-
pression and 20dB gain control. The second section con-
sists of an IF input buffer, IF downconversion mixer,
automatic gain control (AGC), I/Q demodulator, base-
band channel select filter, and a baseband buffer. This
section provides second downconversion and I/Q
demodulation to the channel-selected signal and an
additional on-chip channel selection. The IF input buffer
and AGC perform over 90dB gain control in 2dB steps.
Ordering Information
BT2084A
GSM/DCS/PCS Dual-Band RF Transceiver
BTI, 13825 Cerritos Corporate Dr., Cerritos CA. 90703, U.S.A.
Tel (562) 407-0500 Fax (562) 407-0510 sales@betheltronix.com www.betheltronix.com
36
35
34
33
32
31
30
29
28
27
26
25
1
2
3
4
5
6
7
8
9
10
11
12
1
3
1
4
1
5
1
6
1
7
1
8
1
9
2
0
2
1
2
2
2
3
2
4
4
8
4
7
4
6
4
5
4
4
4
3
4
2
4
1
4
0
3
9
3
8
3
7
CLOCK
ENABLE
RESET
VDDCTRL
VDDTXIF
TXVCOIN
VDDRXBB
RXIP
RXIN
RXQP
RXQN
FREF
OUT_GSM
OUTB_GSM
IN_DCS
INB_DCS
TXIP
TXIN
TXQP
TXQN
GNDTXBB
VDDTXBB
VDDIFLO
IFLOIN
O
U
T
_
D
C
S
O
U
T
B
_
D
C
S
V
D
D
L
N
A
I
N
B
_
G
S
M
V
D
D
R
F
M
X
I
F
_
O
U
T
I
F
_
O
U
T
B
V
D
D
R
F
L
O
R
F
L
O
I
N
G
N
D
C
T
R
L
D
A
T
A
V
D
D
A
G
C
V
D
D
R
X
I
F
2
I
F
_
I
N
V
D
D
R
X
I
F
T
X
C
P
O
U
T
V
D
D
I
F
D
G
N
D
I
F
D
R
X
1
O
N
R
X
2
O
N
I
F
_
I
N
B
I
N
_
G
S
M
T
X
O
N
B
A
N
D
S
E
L
BTI
BT2084A
DUAL-BAND GSM & DCS SINGLE CHIP RF TRANSCEIVER
BT2084A
February 28, 2001 BTI Confidential & Proprietary Information Page 2 of 4
R
F
I
C
s

f
o
r

G
S
M

c
e
l
l
u
l
a
r
G
R
T
T
M
PR
EL
IM
IN
AR
Y
DA
TA
S
HE
ET
The transmitter employs an offset PLL architecture and
also consists of two sections. The first section is the I/Q
modulator which upconverts the incoming baseband
signal to the common IF frequency. The second section
is the offset PLL, which consists of a downconversion
mixer and a phase detector. The phase detector com-
pares the downconverted external Tx VCO output and
the upconverted baseband input at the common IF fre-
quency. The output of the phase detector controls the
off-chip Tx VCO to generate the RF transmit signal.
The IFLO section includes buffers and dividers that pro-
vide LO signals for both receiver and transmitter sec-
tions. The input to the IFLO section is generated from an
off-chip VCO. The RFLO section includes buffers that
provide LO signals for both the receiver and transmitter.
The input to the RFLO section is also generated from an
off-chip VCO.
The operation of the transceiver in different modes is
controlled using combinations of the RX1ON, RX2ON,
TXON, and BANDSEL pins (Table #2). The other opera-
tion set-ups such as gain control in the LNA, IF buffer,
and the AGC are provided digitally through a 3-wire
interface with a microcontroller or baseband processor
(Table #3).
Functional Block Diagram
36
35
34
33
32
31
30
29
28
27
26
25
1
2
3
4
5
6
7
8
9
10
11
12
1
3
1
4
1
5
1
6
1
7
1
8
1
9
2
0
2
1
2
2
2
3
2
4
4
8
4
7
4
6
4
5
4
4
4
3
4
2
4
1
4
0
3
9
3
8
3
7
CLOCK
ENABLE
RESET
VDDCTRL
VDDTXIF
TXVCOIN
VDDRXBB
RXIP
RXIN
RXQP
RXQN
FREF
OUT_GSM
OUTB_GSM
IN_DCS
INB_DCS
TXIP
TXIN
TXQP
TXQN
GNDTXBB
VDDTXBB
VDDIFLO
IFLOIN
O
U
T
_
D
C
S
O
U
T
B
_
D
C
S
V
D
D
L
N
A
I
N
B
_
G
S
M
V
D
D
R
F
M
X
I
F
_
O
U
T
I
F
_
O
U
T
B
V
D
D
R
F
L
O
R
F
L
O
I
N
G
N
D
C
T
R
L
D
A
T
A
V
D
D
A
G
C
V
D
D
R
X
I
F
2
I
F
_
I
N
V
D
D
R
X
I
F
T
X
C
P
O
U
T
V
D
D
I
F
D
G
N
D
I
F
D
R
X
1
O
N
R
X
2
O
N
I
F
_
I
N
B
I
N
_
G
S
M
T
X
O
N
B
A
N
D
S
E
L
CP
Digital
Control
Registers
DCS
2
2
4
AGC
4
IR
FLTR
GSM
IR
FLTR
Power
Down
Control
RxRF
RxIF
RxBB
IFLO
RFLO
Tx
February 28, 2001 BTI Confidential & Proprietary Information Page 3 of 4
R
F
I
C
s

f
o
r

G
S
M

c
e
l
l
u
l
a
r
G
R
T
T
M
DUAL-BAND GSM & DCS SINGLE CHIP RF TRANSCEIVER
BT2084A
PR
EL
IM
IN
AR
Y
DA
TA
S
HE
ET
Application Circuit
3
9
3
7
3
8
4
6
4
4
4
2
4
0
4
5
4
3
4
1
4
8
4
7
O
U
T
_
D
C
S
O
U
T
B
_
D
C
S
V
D
D
L
N
A
I
N
_
G
S
M
I
N
B
_
G
S
M
V
D
D
R
F
M
X
I
F
_
O
U
T
I
F
_
O
U
T
B
V
D
D
R
F
L
O
R
F
L
O
I
N
G
N
D
C
T
R
L
D
A
T
A
1
3
5
7
9
10
12
2
4
6
8
11
2
2
2
4
2
3
1
5
1
7
1
9
2
1
1
6
1
8
2
0
1
3
1
4
27
25
26
34
32
30
28
33
31
29
36
35
OUT_GSM
OUTB_GSM
IN_DCS
INB_DCS
TXIP
TXIN
TXQP
TXQN
GNDTXBB
VDDTXBB
VDDIFLO
IFLOIN
CLOCK
ENABLE
RESET
VDDCTRL
VDDTXIF
TXVCOIN
VDDRXBB
RXIP
RXIN
RXQP
RXQN
FREF
V
D
D
A
G
C
V
D
D
R
X
I
F
2
I
F
_
I
N
I
F
_
I
N
B
V
D
D
R
X
I
F
T
X
C
P
O
U
T
V
D
D
I
F
D
G
N
D
I
F
D
R
X
1
O
N
R
X
2
O
N
T
X
O
N
B
A
N
D
S
E
L
BT2084A
BTI
1000pF
0.1
F
VDD
100pF 0.1
F
VDD
100pF 0.1
F
VDD
From GSM
Baseband
68
4.7nF
470pF
150
150pF
10
GSM: 880 ~ 915MHz
Dual Band Tx VCO
10
390
DCS: 1710 ~ 1785MHz
Antenna
GSM DCS
PA
100pF
1805~1880MHz
554 ~ 610MHz
IFLO
-10dBm
1162 ~ 1644MHz
RFLO Input
-8dBm
From
p
225MHz
SAW Filter
IL = 5dB
3dB BW = 200kHz
100pF
To GSM
Baseband
3.3pF
6.8nH
3.3pF
1
5
0
1
5
0
8.2nH
8.2nH
1
5
0
1
5
0
3.3nH
3.3nH
2.2pF
2.2pF
925~960MHz
3.3pF
6.8nH
3.3pF
2.2pF
2.2pF
1000pF
0.1
F
VDD
From
p
100pF 0.1
F
VDD
100pF 0.1
F
VDD
From
p
From
p
100pF
0.1
F
VDD
1000pF
0.1
F
VDD
100pF
0.1
F
VDD
100pF
0.1
F
VDD
100pF
0.1
F
VDD
100pF
0.1
F
VDD
3
6
0
n
H
3
6
0
n
H
1.5pF
1.5pF
February 28, 2001 BTI Confidential & Proprietary Information Page 4 of 4
R
F
I
C
s

f
o
r

G
S
M

c
e
l
l
u
l
a
r
G
R
T
T
M
DUAL-BAND GSM & DCS SINGLE CHIP RF TRANSCEIVER
BT2084A
PR
EL
IM
IN
AR
Y
DA
TA
S
HE
ET
Package Information
The information provided herein is believed to be accurate and correct. BethelTronix, Inc. assumes no responsibility
for the inaccuracies or use of the information or the use of the described product. BethelTronix, Inc. reserves the right
to make changes in circuit design and/or specifications at any time without further notice. No patent rights or licenses
to any of the circuits described herein are implied or granted to any third parties.
Copyright 2001 BethelTronix, Inc. All rights reserved