1
* This specification are subject to be changed without notice.
EM73P461A
EM73P461A
EM73P461A
EM73P461A
EM73P461A
4-BIT MICRO-CONTROLLER FOR LCD PRODUCT
4-BIT MICRO-CONTROLLER FOR LCD PRODUCT
4-BIT MICRO-CONTROLLER FOR LCD PRODUCT
4-BIT MICRO-CONTROLLER FOR LCD PRODUCT
4-BIT MICRO-CONTROLLER FOR LCD PRODUCT
12.27.2001
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GENERAL DESCRIPTION
GENERAL DESCRIPTION
GENERAL DESCRIPTION
GENERAL DESCRIPTION
GENERAL DESCRIPTION
EM73P461A is an advanced single chip CMOS 4-bit one-time programming (OTP) micro-controller. It contains
4K/8K-byte ROM, 244-nibble RAM, 4-bit ALU, 13-level subroutine nesting, 22-stage time base, two 12-bit timer/
counters for the kernel function. EM73P461A also contains 6 interrupt sources, 1 input port, 2 bidirection ports,
LCD display (32x4), and one high speed timer/counter with melody output.
EM73P461A has plentiful operating modes (SLOW, IDLE, STOP) intended to reduce the power consumption.
FEATURES
FEATURES
FEATURES
FEATURES
FEATURES
Operation voltage
: 2.4V to 3.6V.
Clock source
: Dual clock system. Low-frequency oscillator is Crystal or RC oscillator (32K Hz,
connect an external resistor) by mask option and high-frequency oscillator is RC
oscillator (connect an external resistor).
Instruction set
: 109 powerful instructions for 4K ROM / 107 powerful instructoins for 8K ROM.
Instruction cycle time : Up to 2us for 4 MHz (high speed clock).
122 s or 244s by frequency double mask option for 32768 Hz (low speed clock).
ROM capacity
: 4096 X 8 bits / 8192 X 8 bits ROM are choosed by mask option.
RAM capacity
: 244 X 4 bits.
Input port
: 1 port (P0). P0(0..3) and IDLE releasing function are available by mask option.
Bidirection port
: 2 ports (P4, P8). P4.0 and SOUND is available by mask option. P4.1 is shared with
HTC external input. P8(0..3) and IDLE releasing function are available by mask
option.
12-bit timer/counter
: Two 12-bit timer/counters are programmable for timer, event counter and pulse width
measurement.
High speed timer/counter : One 8-bit high speed timer/counters is programmable for auto load timer, melody
output and pulse width measurement.
Built-in time base counter : 22 stages.
Subroutine nesting
: Up to 13 levels.
Interrupt
: External . . . . . 2 input interrupt sources.
Internal . . . . . . 2 Timer overflow interrupts, 1 time base interrupt.
1 high speed timer overflow interrupt.
LCD driver
: 32 X 4 dots, 1/4duty, 1/3duty, 1/2duty, static, 1/2 bias, 1/3 bias; 6 options selectable.
Power saving function : SLOW, IDLE, STOP operation mode.
Package type
: Chip form
61 pins.
QFP
100 pins.
PDIP
42 pins.
APPLICATIONS
APPLICATIONS
APPLICATIONS
APPLICATIONS
APPLICATIONS
EM73P461A is suitable for application in family applicance, consumer products, hand held games and the toy
controller.
2
* This specification are subject to be changed without notice.
EM73P461A
EM73P461A
EM73P461A
EM73P461A
EM73P461A
4-BIT MICRO-CONTROLLER FOR LCD PRODUCT
4-BIT MICRO-CONTROLLER FOR LCD PRODUCT
4-BIT MICRO-CONTROLLER FOR LCD PRODUCT
4-BIT MICRO-CONTROLLER FOR LCD PRODUCT
4-BIT MICRO-CONTROLLER FOR LCD PRODUCT
12.27.2001
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FUNCTION BLOCK DIAGRAM
FUNCTION BLOCK DIAGRAM
FUNCTION BLOCK DIAGRAM
FUNCTION BLOCK DIAGRAM
FUNCTION BLOCK DIAGRAM
PIN ASSIGNMENT
PIN ASSIGNMENT
PIN ASSIGNMENT
PIN ASSIGNMENT
PIN ASSIGNMENT
Interrupt
Control
Time
Base
Timer/Counter
(TA,TB)
System Control
Instruction Decoder
Instruction Register
ROM
PC
Data Bus
Reset
Control
Clock
Generator
Timing
Generator
Sleep Mode
Control
Data pointer
ACC
ALU
Flag
Z
C
S
G
Stack pointer
Stack
ROM
HR
LR
I/O Control
P0.0/WAKEUP0
P0.1/WAKEUP1
P0.2/WAKEUP2
P0.3/WAKEUP3
P4.0/SOUND
P4.1TRGH
P4.2
P4.3
P8.0(INT1)/WAKEUPA
P8.1(TRGB)/WAKEUPB
P8.2(INT0)/WAKEUPC
P8.3(TRGA)/WAKEUPD
RESET
CLK
Clock
Generator
(slow)
LXOUT LXIN
HTC
DP
SP
LCD
VA
VB
V1
V2
V3
COM0~COM3
SOUND
SEG0~SEG31
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
NC
NC
SEG5
SEG4
SEG3
SEG2
SEG1
SEG0
COM3
COM2
COM1
COM0
VB
VA
V3
V2
V1
NC
NC
NC
NC
NC
NC
NC
VSS
CLK
NC
LXOUT
LXIN
VDD
P4.3
P4.2
P4.1
P4.0
SOUND
P8.3
P8.2
P8.1
P8.0
RESET
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
SEG22
SEG23
SEG24
SEG25
SEG26
SEG27
SEG28
SEG29
SEG30
SEG31
P0.0
P0.1
P0.2
P0.3
VPP
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
SEG6
SEG7
SEG8
SEG9
SEG10
SEG11
SEG12
SEG13
SEG14
SEG15
SEG16
SEG17
SEG18
SEG19
SEG20
SEG21
NC
NC
NC
NC
NC
EM73P461A
QFP 100
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
V3
V2
V1
VSS
CLK
LXOUT
LXIN
VDD
P4.3
P4.2
P4.1
P4.0
P8.3
P8.2
P8.1
P8.0
RESET
VPP
P0.3
P0.2
EM73P461A
PDIP42
21
VA
VB
COM0
COM1
COM2
COM3
SEG14
SEG15
SEG16
SEG17
SEG18
SEG19
SEG20
SEG21
SEG22
SEG23
SEG24
SEG25
SEG26
SEG27
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
P0.0
P0.1
3
* This specification are subject to be changed without notice.
EM73P461A
EM73P461A
EM73P461A
EM73P461A
EM73P461A
4-BIT MICRO-CONTROLLER FOR LCD PRODUCT
4-BIT MICRO-CONTROLLER FOR LCD PRODUCT
4-BIT MICRO-CONTROLLER FOR LCD PRODUCT
4-BIT MICRO-CONTROLLER FOR LCD PRODUCT
4-BIT MICRO-CONTROLLER FOR LCD PRODUCT
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Symbol
Symbol
Symbol
Symbol
Symbol
Pin-type
Pin-type
Pin-type
Pin-type
Pin-type
Function
Function
Function
Function
Function
V
D D
Power supply (+)
Power supply (+) for programming OTP
V
SS
Power supply (-)
Power supply (-) for programming OTP
RESET
RESET-A
System reset input signal, low active
Reset input signal for programming OTP
Always internal pull-up
CLK
OSC-I
RC clock source connecting pin
LXIN
OSC-B/OSC-H1 Crystal/RC connecting pin for low speed clock source
LXOUT
OSC-B
Crystal connecting pin for low speed clock source
P0(0..3)/WAKEUP0..3
INPUT-K
4-bit input port with IDLE releasing function
P0.0/ACLK : address counter clock for programming OTP
P0.1/PGMB : program data to OTP cells for programming OTP
P0.2/OEB : data output enable for programming OTP
P0.3/DCLK : data in/out clock signal for programming OTP
mask option :
wakeup enable, negative edge release, pull-up
wakeup enable, negative edge release, none
wakeup enable, positive edge release, pull-down
wakeup enable, positive edge release, none
wakeup disable, pull-up
wakeup disable, pull-down
wakeup disable, none
P4.0/SOUND
I/O-R
1-bit bidirection I/O port or inverse sound effect output
mask option :
SOUND enable, high current push-pull
SOUND disable, open-drain
SOUND disable, low current push-pull
SOUND disable, normal current push-pull
SOUND disable, high current push-pull
P4.1/TRGH
I/O-Q
1-bit bidirection I/O port with HTC external input
mask option :
NMOS open-drain
PMOS open-drain
low current push-pull
normal current push-pull
high current push-pull
P4(2,3)
I/O-Q
2-bit bidirection I/O port with high current source
mask option :
NMOS open-drain
PMOS open-drain
low current push-pull
normal current push-pull
high current push-pull
PIN DESCRIPTIONS
PIN DESCRIPTIONS
PIN DESCRIPTIONS
PIN DESCRIPTIONS
PIN DESCRIPTIONS
4
* This specification are subject to be changed without notice.
EM73P461A
EM73P461A
EM73P461A
EM73P461A
EM73P461A
4-BIT MICRO-CONTROLLER FOR LCD PRODUCT
4-BIT MICRO-CONTROLLER FOR LCD PRODUCT
4-BIT MICRO-CONTROLLER FOR LCD PRODUCT
4-BIT MICRO-CONTROLLER FOR LCD PRODUCT
4-BIT MICRO-CONTROLLER FOR LCD PRODUCT
12.27.2001
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Symbol
Symbol
Symbol
Symbol
Symbol
Pin-type
Pin-type
Pin-type
Pin-type
Pin-type
Function
Function
Function
Function
Function
P8.0(INT1)
I/O-S
2-bit bidirection I/O port with external interrupt source input and IDLE
/WAKEUPA/DIN,
releasing function
P8.2(INT0)/WAKEUPC
P8.0/DIN : data input for programming OTP
mask option :
wakeup enable, low current push-pull
wakeup enable, normal current push-pull
wakeup disable, open-drain
wakeup disable, low current push-pull
wakeup disable, normal current push-pull
P8.1(TRGB)
I/O-S
2-bit bidirection I/O port with time/counter A,B external input and IDLE
/WAKEUPB/DOUT,
releasing function
P8.3(TRGA)
P8.1/DOUT : data output for programming OTP
/WAKEUPD
mask option :
wakeup enable, low current push-pull
wakeup enable, normal current push-pull
wakeup disable, open-drain
wakeup disable, low current push-pull
wakeup disable, normal current push-pull
SOUND
Melody output
VA,VB, V1, V2, V3
Connect the capacitors for LCD bias voltage
COM0~COM3
LCD common output pins
SEG0~SEG31
LCD segment output pins
TEST/VPP
Test pin must be floating
VPP : high vlotage (12V) power source for programming OTP
PIN DESCRIPTIONS
PIN DESCRIPTIONS
PIN DESCRIPTIONS
PIN DESCRIPTIONS
PIN DESCRIPTIONS
FUNCTION DESCRIPTIONS
FUNCTION DESCRIPTIONS
FUNCTION DESCRIPTIONS
FUNCTION DESCRIPTIONS
FUNCTION DESCRIPTIONS
PROGRAM ROM (4K X 8 bits)
PROGRAM ROM (4K X 8 bits)
PROGRAM ROM (4K X 8 bits)
PROGRAM ROM (4K X 8 bits)
PROGRAM ROM (4K X 8 bits)
4 K x 8 bits program ROM contains user's program and some fixed data.
The basic structure of program ROM can be divided into 5 parts.
1. Address 000h: Reset start address.
2. Address 002h - 00Ch : 6 kinds of interrupt service routine entry addresses.
3. Address 00Eh-086h : SCALL subroutine entry address, only available at 00Eh,016h,01Eh,026h, 02Eh,
036h, 03Eh, 046h, 04Eh, 056h, 05Eh, 066h, 06Eh, 076h, 07Eh, 086h.
4. Address 000h - 7FFh : LCALL subroutine entry address.
5. Address 000h - FFFh : Except used as above function, the other region can be used as user's program region.
5
* This specification are subject to be changed without notice.
EM73P461A
EM73P461A
EM73P461A
EM73P461A
EM73P461A
4-BIT MICRO-CONTROLLER FOR LCD PRODUCT
4-BIT MICRO-CONTROLLER FOR LCD PRODUCT
4-BIT MICRO-CONTROLLER FOR LCD PRODUCT
4-BIT MICRO-CONTROLLER FOR LCD PRODUCT
4-BIT MICRO-CONTROLLER FOR LCD PRODUCT
12.27.2001
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address 4096 x 8 bits
000h
Reset start address
002h
INT0; External interrupt service routine entry address
004h
HTCI; High speed timer interrupt service entry address
006h
TRGA; Timer/counterA interrupt service routine entry address
008h
TRGB; Timer/counter B interrupt service routine entry address
00Ah
TBI; Time base interrupt service routine entry address
00Ch
INT1; External interrupt service routine entry address
00Eh
086h
FFFh
User's program and fixed data are stored in the program ROM. User's program is according the PC value
to send next executed instruction code. Fixed data can be read out by two ways.
(1) Table-look-up instruction :
Table -look-up instruction is depended on the Data Pointer (DP) to indicate to ROM address, then to get the
ROM code data.
LDAX
LDAX
LDAX
LDAX
LDAX
Acc
Acc
Acc
Acc
Acc
ROM[DP]
ROM[DP]
ROM[DP]
ROM[DP]
ROM[DP]
L
L
L
L
L
LDAXI
LDAXI
LDAXI
LDAXI
LDAXI
Acc
Acc
Acc
Acc
Acc
ROM[DP]
ROM[DP]
ROM[DP]
ROM[DP]
ROM[DP]
H
H
H
H
H
,DP+1
,DP+1
,DP+1
,DP+1
,DP+1
DP is a 12-bit data register which can store the program ROM address to be the pointer for the ROM code
.
.
.
.
.
.
SCALL, subroutine call entry address
data. First, user load ROM address into DP by instruction "STADPL, STADPM, STADPH", then user can
get the lower nibble of ROM code data by instruction "LDAX" and higher nibble by instruction "LDAXI".
PROGRAM EXAMPLE: Read out the ROM code of address 777h by table-look-up instruction.
LDIA #07h;
STADPL
; DP3-0
07h
STADPM
; DP5-4
07h
STADPH
; DP8-6
07h, Load DP=0777h
:
LDL #00h;
LDH #03h;
LDAX
; ACC
6h
STAMI
; RAM[30]
6h
LDAXI
; ACC
5h
STAM
; RAM[31]
5h
:
ORG 0777h;
DATA 56h;
:
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