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072401

FEATURES

§ 8 or 32 kbytes of user NV RAM

§ Integrated NV SRAM, real time clock,

crystal, power-fail control circuit and lithium
energy source

§ Totally nonvolatile with over 10 years of

operation in the absence of power

§ Watchdog timer restarts an out-of-control

processor

§ Alarm function schedules real-time related

activities such as system wakeup

§ Programmable interrupts and square wave

output

§ All registers are individually addressable via

the address and data bus

§ Interrupt signals are active in power-down

mode

PIN ASSIGNMENT

DS1386/DS1386P

RAMified Watchdog Timekeeper

www.maxim-ic.com

INTB (INTB)

PFO

DQ7

DQ6

DQ5

DQ4

DQ3

DQ2

DQ1

DQ0

GND

SQW

A12

A11

A10

INTA

X1 GND V

BAT

DS1386 8k x 8

34-Pin PowerCap Module Board

(Uses DS9034PCX PowerCap)

INTB (INTB)

PFO

DQ7

DQ6

DQ5

DQ4

DQ3

DQ2

DQ1

DQ0

GND

SQW

A14

A13

A12

A11

A10

INTA

X1 GND V

BAT

DS1386 32k x 8

34-Pin PowerCap Module Board

(Uses DS9034PCX PowerCap)

INTA

1
2
3
4
5
6
7
8
9
10
11
12

DS1386 32k x 8

32-Pin Encapsulated Package

30
29
28
27
26
25
24
23
22
21

15
16

18
17

SQW

WE
A13
A8
A9
A11
OE
A10

DQ7

DQ5

DQ6

DQ4
DQ3

A14

A5
A4
A3
A2
A1
A0

DQ1

DQ0

INTB

A12

DQ2

GND

1
2
3
4
5
6
7
8
9
10
11
12

DS1386 8k x 8

32-Pin Encapsulated Package

A5
A4
A3
A2
A1
A0

DQ1

DQ0

SQW
V

WE
NC
A8
A9
A11
OE
A10

DQ7

DQ5

DQ6

30
29
28
27
26
25
24
23
22
21

INTB

A12

DQ2

GND

15
16

18
17

DQ4
DQ3

DS1386/DS1386P

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ORDERING INFORMATION

DS1386

XX-120

32-pin DIP Module

8k x 8 NV SRAM

32k x 8 NV SRAM

*DS1386P

XX-120

34-pin PowerCap

Module Board

8k x 8 NV SRAM

32k x 8 NV SRAM

*DS9034PCX

PowerCap required
(must be ordered separately)

PIN DESCRIPTION

INTA

- Interrupt Output A (open drain)

INTB

(INTB)

- Interrupt Output B (open drain)

A0-A14 -

Address

Inputs

DQ0-DQ7 -

Data

Input/Output

- Chip Enable

- Output Enable

- Write Enable

+5V

GND -

Ground

SQW

- Square Wave Output

- No Connection

X1, X2

- Crystal Connection

BAT

- Battery Connection

DESCRIPTION

The DS1386 is a nonvolatile static RAM with a full-function Real Time Clock (RTC), alarm, watchdog
timer, and interval timer which are all accessible in a byte-wide format. The DS1386 contains a lithium
energy source and a quartz crystal, which eliminates the need for any external circuitry. Data contained
within 8k or 32k by 8-bit memory and the timekeeping registers can be read or written in the same
manner as bytewide static RAM. The timekeeping registers are located in the first 14 bytes of memory
space. Data is maintained in the RAMified Timekeeper by intelligent control circuitry, which detects the
status of V

and write protects memory when V

is out of tolerance. The lithium energy source can

maintain data and real time for over ten years in the absence of V

. Timekeeper information includes

hundredths of seconds, seconds, minutes, hours, day, date, month, and year. The date at the end of the
month is automatically adjusted for months with less than 31 days, including correction for leap year.
The RAMified Timekeeper operates in either 24-hour or 12-hour format with an AM/PM indicator. The
watchdog timer provides alarm interrupts and interval timing between 0.01seconds and 99.99 seconds.
The real time alarm provides for preset times of up to one week. Interrupts for both watchdog and RTC
will operate when system is powered down. Either can provide system "wake-up" signals.

DS1386/1386P

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PACKAGES

The DS1386 is available in two packages (32-pin DIP module and 34-pin PowerCap module). The 32-pin
DIP style module integrates the crystal, lithium energy source, and silicon all in one package. The 34-pin
PowerCap Module Board is designed with contacts for connection to a separate PowerCap (DS9034PCX)
that contains the crystal and battery. This design allows the PowerCap to be mounted on top of the
DS1386P after the completion of the surface mount process. Mounting the PowerCap after the surface
mount process prevents damage to the crystal and battery due to high temperatures required for solder
reflow. The PowerCap is keyed to prevent reverse insertion. The PowerCap Module Board and PowerCap
are ordered separately and shipped in separate containers. The part number for the PowerCap is
DS9034PCX.

OPERATION - READ REGISTERS

The DS1386 executes a read cycle whenever

(Write Enable) is inactive (High),

(Chip Enable)

and

(Output Enable) are active (Low). The unique address specified by the address inputs (A0-A14)

defines which of the registers is to be accessed. Valid data will be available to the eight data output
drivers within t

ACC

(Access Time) after the last address-input signal is stable, providing that

and

access times are also satisfied. If

and

access times are not satisfied, then data access must be

measured from the latter occurring signal (

) and the limiting parameter is either t

for

rather than address access.

OPERATION - WRITE REGISTERS

The DS1386 is in the write mode whenever the

(Write Enable) and

(Chip Enable) signals are in

the active (Low) state after the address inputs are stable. The latter occurring falling edge of

will determine the start of the write cycle. The write cycle is terminated by the earlier rising edge of

. All address inputs must be kept valid throughout the write cycle.

must return to the high state

for a minimum recovery state (t

) before another cycle can be initiated. Data must be valid on the data

bus with sufficient Data Set-Up (t

) and Data Hold Time (t

) with respect to the earlier rising edge of

. The

control signal should be kept inactive (High) during write cycles to avoid bus

contention. However, if the output bus has been enabled (

and

active), then

will disable the

outputs in t

ODW

from its falling edge.

DATA RETENTION

The RAMified Timekeeper provides full functional capability when V

is greater than 4.5 volts and

write-protects the register contents at 4.25 volts typical. Data is maintained in the absence of V

without

any additional support circuitry. The DS1386 constantly monitors V

. Should the supply voltage decay,

the RAMified Timekeeper will automatically write-protect itself and all inputs to the registers become
"don't care." The two interrupts

INTA

and

INTB

(INTB) and the internal clock and timers continue to run

regardless of the level of V

. However, it is important to insure that the pull-up resistors used with the

interrupt pins are never pulled up to a value that is greater than V

+ 0.3V. As V

falls below

approximately 3.0 volts, a power switching circuit turns the internal lithium energy source on to maintain
the clock and timer data and functionality. It is also required to insure that during this time (battery
backup mode), the voltage present at

INTA

and

INTB

(INTB) never exceeds 3.0V. During power-up,

when V

rises above approximately 3.0 volts, the power switching circuit connects external V

and

disconnects the internal lithium energy source. Normal operation can resume after V

exceeds 4.5 volts

for a period of 200 ms.

DS1386/1386P

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RAMIFIED TIMEKEEPER REGISTERS

The RAMified Timekeeper has 14 registers, which are 8 bits wide that contain all of the timekeeping,
alarm, and watchdog and control information. The clock, calendar, alarm, and watchdog registers are
memory locations, which contain external (user-accessible) copies of the timekeeping data. The external
copies are independent of internal functions except that they are updated periodically by the simultaneous
transfer of the incremented internal copy (see Figure 1). The Command Register bits are affected by both
internal and external functions. This register will be discussed later. The 8 or 32 kbytes of RAM and the
14 external timekeeping registers are accessed from the external address and data bus. Registers 0, 1, 2,
4, 6, 8, 9, and A contain time of day and date information (see Figure 2). Time of day information is
stored in BCD. Registers 3, 5, and 7 contain the Time of Day Alarm information. Time of Day Alarm
information is stored in BCD. Register B is the Command Register and information in this register is
binary. Registers C and D are the Watchdog Alarm Registers and information, which is stored in these
two registers, is in BCD. Registers E through 1FFF or 7FFF are user bytes and can be used to maintain
data at the user's discretion.

CLOCK ACCURACY (DIP MODULE)

The DS1386 is guaranteed to keep time accuracy to within ±1 minute per month at 25°C.

CLOCK ACCURACY (POWERCAP MODULE)

The DS1386P and DS9034PCX are each individually tested for accuracy. Once mounted together, the
module is guaranteed to keep time accuracy to within

±1.53 minutes per month (35 ppm) at 25°C.

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