PROCESS
CP214
Small Signal Transistor
NPN - Silicon RF Transistor Chip
PRINCIPAL DEVICE TYPES
2N5109
Process
EPITAXIAL PLANAR
Die Size
16 x 16 MILS
Die Thickness
7.5 MILS
Base Bonding Pad Area
2.9 x 3.4 MILS
Emitter Bonding Pad Area
2.9 x 3.4 MILS
Top Side Metalization
Al - 20,000
Back Side Metalization
Au - 16,000
PROCESS DETAILS
145 Adams Avenue
Hauppauge, NY 11788 USA
Tel: (631) 435-1110
Fax: (631) 435-1824
www.centralsemi.com
B
E
R1
GEOMETRY
R2 (1-August 2002)
GROSS DIE PER 4 INCH WAFER
44,460
BACKSIDE COLLECTOR
Central
Semiconductor Corp.
TM
Central
Semiconductor Corp.
TM
PROCESS
CP214
Typical Electrical Characteristics
145 Adams Avenue
Hauppauge, NY 11788 USA
Tel: (631) 435-1110
Fax: (631) 435-1824
www.centralsemi.com
R2 (1-August 2002)
Central
Semiconductor Corp.
TM
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