Central
Semiconductor Corp.
TM
PROCESS
CP208
Power Transistor
NPN - Amp/Switch Transistor Chip
PRINCIPAL DEVICE TYPES
CJD31C
MJE182
TIP31C
Process
EPITAXIAL BASE
Die Size
66 X 66 MILS
Die Thickness
12.5
1.0 MILS
Base Bonding Pad Area
12 X 24 MILS
Emitter Bonding Pad Area
11 X 14 MILS
Top Side Metalization
Al - 50,000
Back Side Metalization
Cr/Ni/Ag - 16,000
PROCESS DETAILS
GEOMETRY
BACKSIDE COLLECTOR
145 Adams Avenue
Hauppauge, NY 11788 USA
Tel: (631) 435-1110
Fax: (631) 435-1824
www.centralsemi.com
R2 (1-August 2002)
GROSS DIE PER 4 INCH WAFER
2,630
Central
Semiconductor Corp.
TM
Central
Semiconductor Corp.
TM
PROCESS
CP208
Typical Electrical Characteristics
145 Adams Avenue
Hauppauge, NY 11788 USA
Tel: (631) 435-1110
Fax: (631) 435-1824
www.centralsemi.com
R2 (1-August 2002)
Central
Semiconductor Corp.
TM
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