PA
CLOCK
DATA
CLOCK
DATA
PCI
Backbone
LPF
44 MHz IF
5-42 MHz
VGA
PCI
Interface
Pentium
PC
100mb
Ethernet
BCM3033
QAM
Modulator
BCM3210B
MAC
BCM3137
Burst Demod
1-8 Channels
Full DOCSIS/EuroDOCSIS 1.0 and 1.1 CMTS MAC
including baseline privacy
Supports 64/256 QAM (annex A and B) downstream
and QPSK/16 QAM upstream at
DOCSIS/EuroDOCSIS data rates
Supports one downstream and up to eight upstream
channels simultaneously
Direct interface to
BCM3033 and BCM3034 QAM modulators
BCM3137 and BCM3138 burst QPSK/QAM
demodulators
DMA support for two downstream queues and one
upstream queue
Interfaces to generic i960 CPU or PLX9080 for
bridging to a PCI bus
Serial control interface master SPI compatible
JTAG test interface
3.3V interface
352-pin BGA package
B C M 3 2 1 0 B F E A T U R E S
Provides full DOCSIS/EuroDOCSIS 1.0 and 1.1
compliant CMTS silicon solution for headend line card
or HFC interface.
Reduces overall system cost
Simplifies system, board and software design
Enables Quality of Service (QoS) features
Real-time hardware processing of all media access
control (MAC) functions for DOCSIS/EuroDOCSIS
based CMTS, including:
Master timebase generation
Downstream SYNC message insertion
MAC header HCS and payload CRC-32 generation and
checking
MPEG framing
Extract upstream and downstream parameters
Upstream channel parser and concentrator
On-the-fly demodulator programming
Baseline privacy encryption and decryptionwith
support for 16 SIDs and 56-bit DES encryption keys.
DOCSIS/EuroDOCSIS-Based Cable Modem Headend Block Diagram
DOCSIS/E
URO
DOCSIS CABLE MODEM TERMINATION SYSTEM (MAC)
S U M M A R Y O F B E N E F I T S
PRODUCT
Brief
B C M 3 210 B
Key DRAM
Buffer DRAM
BCM3033
BCM3137
BCM3137
BCM3137
BCM3137
BCM3137
BCM3137
BCM3137
BCM3137
Interface
BCM3137
Interface
BCM3137
Interface
BCM3137
Interface
BCM3137
Interface
BCM3137
Interface
BCM3137
Interface
BCM3137
Interface
RxFIFO
BCM3033
Interface
Down stream
Controller
BCM3137
Timing
Generation
EncFIFO
CRC/HCS
Insertion
Downstream
Parser
DES Encryption Engine
DSFIFO
CRC/HCS
Verification
Upstream
Parser
DES Decryption Engine
RxFIFO
RxFIFO
RxFIFO
RxFIFO
RxFIFO
RxFIFO
RxFIFO
C
han
nel
A
r
bi
te
r
Map SRAM
DRAM Access
USFIFO
L
o
cal B
u
s In
t
e
r
f
ace
DMA
Engine
MIB
Registers
Statistics
SPI
Controller
BRCF
IF
O
Controller
JTAG
The Broadcom BCM3210B is designed to control upstream and
downstream communications channels. It is intended for use in
conjunction with the physical layer devices BCM3033/BCM3034
(QAM modulators) and BCM3137/BCM3138 (burst
demodulators)--by providing the headend control mechanisms
for both the upstream and downstream traffic.
The BCM3210B supports the DOCSIS/EuroDOCSIS 1.0 and
1.1 standards, enabling the deployment of systems that are
capable of supporting multiple datatypes (voice, video, data)
simultaneously and on a prioritized basis. These extensions to the
DOCSIS/EuroDOCSIS specification are supported on the
subscriber side in the BCM3350 (single-chip cable modem).
The BCM3210B also handles these tasks:
Intermediate buffering
Encryption/decryption
Timing control
Communications channel access
System provisioning
Support system debug
The BCM3210B provides a slave port enabling the external
microprocessor to:
Configure parameters
Install encryption/decryption keys
Access status registers in the BCM3033/BCM3034 and
BCM3137/BCM3138
The BCM3210B can also be daisy chained with another (slave)
BCM3210B to enable a higher ratio of upstream to downstream
channels.
Ordering Information:
BCM3210BKTB
B C M 3 2 1 0 B O V E R V I E W
Phone: 949-450-8700
FAX: 949-450-8710
Email: info@broadcom.com
Web: www.broadcom.com
Broadcom
, the pulse logo
, QAMLink
and Connecting Everything
TM
are trademarks of
Broadcom Corporation and/or its subsidiaries in the United States and certain other countries.
All other trademarks are the property of their respective owners.
BROADCOM CORPORATION
16215 Alton Parkway, P.O. Box 57013
Irvine, California 92619-7013
2002 by BROADCOM CORPORATION. All rights reserved.
3210B-PB08-R-4.23.02
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