1
Features
High-performance, Low-power AVR
8-bit Microcontroller
130 Powerful Instructions Most Single Clock Cycle Execution
32 x 8 General Purpose Working Registers
Fully Static Operation
Up to 8 MIPS Throughput at 8 MHz
On-chip 2-cycle Multiplier
Nonvolatile Program and Data Memories
Self-programming In-System Programmable Flash Memory
16K Bytes with Optional Boot Block (256 - 2K Bytes)
Endurance: 1,000 Write/Erase Cycles
Boot Section Allows Reprogramming of Program Code without External
Programmer
Optional Boot Code Section with Independent Lock Bits
512 Bytes EEPROM
Endurance: 100,000 Write/Erase Cycles
1024 Bytes Internal SRAM
Programming Lock for Software Security
Peripheral Features
Two 8-bit Timer/Counters with Separate Prescaler and Compare Mode
One 16-bit Timer/Counter with Separate Prescaler, Compare Mode, and Capture
Mode
Real Time Clock with Separate Oscillator and Counter Mode
Three PWM Channels
8-channel, 10-bit ADC
Byte-oriented Two-wire Serial Interface
Programmable Serial UART
Master/Slave SPI Serial Interface
Programmable Watchdog Timer with Separate On-chip Oscillator
Analog Comparator
Special Microcontroller Features
Power-on Reset and Programmable Brown-out Detection
Internal Calibrated RC Oscillator
External and Internal Interrupt Sources
Four Sleep Modes: Idle, ADC Noise Reduction, Power-save, and Power-down
Power Consumption at 4 MHz, 3.0V, 25
C
Active 5.0 mA
Idle Mode 1.9 mA
Power-down Mode < 1 A
I/O and Packages
32 Programmable I/O Lines
40-pin PDIP and 44-pin TQFP
Operating Voltages
2.7 - 5.5V for ATmega163L
4.0 - 5.5V for ATmega163
Speed Grades
0 - 4 MHz for ATmega163L
0 - 8 MHz for ATmega163
8-bit
Microcontroller
with 16K Bytes
In-System
Programmable
Flash
ATmega163
ATmega163L
Not Recommend for
New Designs. Use
ATmega16.
Rev. 1142EAVR02/03
3
ATmega163(L)
1142EAVR02/03
Description
The ATmega163 is a low-power CMOS 8-bit microcontroller based on the AVR architec-
ture. By executing powerful instructions in a single clock cycle, the ATmega163
achieves throughputs approaching 1 MIPS per MHz allowing the system designer to
optimize power consumption versus processing speed.
Block Diagram
Figure 1. Block Diagram
The AVR core combines a rich instruction set with 32 general purpose working registers.
All the 32 registers are directly connected to the Arithmetic Logic Unit (ALU), allowing
two independent registers to be accessed in one single instruction executed in one clock
PROGRAM
COUNTER
INTERNAL
OSCILLATOR
WATCHDOG
TIMER
STACK
POINTER
PROGRAM
FLASH
MCU CONTROL
REGISTER
SRAM
GENERAL
PURPOSE
REGISTERS
INSTRUCTION
REGISTER
TIMER/
COUNTERS
INSTRUCTION
DECODER
DATA DIR.
REG. PORTB
DATA DIR.
REG. PORTA
DATA DIR.
REG. PORTD
DATA DIR.
REG. PORTC
DATA REGISTER
PORTB
DATA REGISTER
PORTA
ANALOG MUX
ADC
DATA REGISTER
PORTD
DATA REGISTER
PORTC
PROGRAMMING
LOGIC
TIMING AND
CONTROL
OSCILLATOR
OSCILLATOR
INTERRUPT
UNIT
EEPROM
SPI
UART
STATUS
REGISTER
Z
Y
X
ALU
PORTB DRIVERS
PORTA DRIVERS
PORTD DRIVERS
PORTC DRIVERS
PB0 - PB7
PA0 - PA7
RESET
VCC
AVCC
AGND
AREF
GND
XTAL2
XTAL1
CONTROL
LINES
+
-
ANALOG
COMP
ARA
TOR
PD0 - PD7
PC0 - PC7
8-BIT DATA BUS
2-WIRE SERIAL
INTERFACE
INTERNAL
REFERENCE
INTERNAL
CALIBRATED
OSCILLATOR
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ATmega163(L)
1142EAVR02/03
cycle. The resulting architecture is more code efficient while achieving throughputs up to
ten times faster than conventional CISC microcontrollers.
The ATmega163 provides the following features: 16K bytes of In-System Self-Program-
mable Flash, 512 bytes EEPROM, 1024 bytes SRAM, 32 general purpose I/O lines, 32
general purpose working registers, three flexible Timer/Counters with compare modes,
internal and external interrupts, a byte oriented Two-wire Serial Interface, an 8-channel,
10-bit ADC, a programmable Watchdog Timer with internal Oscillator, a programmable
serial UART, an SPI serial port, and four software selectable power saving modes. The
Idle mode stops the CPU while allowing the SRAM, Timer/Counters, SPI port, and inter-
rupt system to continue functioning. The Power-down mode saves the register contents
but freezes the Oscillator, disabling all other chip functions until the next interrupt or
Hardware Reset. In Power-save mode, the asynchronous Timer Oscillator continues to
run, allowing the user to maintain a timer base while the rest of the device is sleeping.
The ADC Noise Reduction mode stops the CPU and all I/O modules except asynchro-
nous timer and ADC, to minimize switching noise during ADC conversions.
The On-chip ISP Flash can be programmed through an SPI serial interface or a conven-
tional programmer. By installing a Self-Programming Boot Loader, the microcontroller
can be updated within the application without any external components. The Boot Pro-
gram can use any interface to download the application program in the Application Flash
memory. By combining an 8-bit CPU with In-System Self-Programmable Flash on a
monolithic chip, the Atmel ATmega163 is a powerful microcontroller that provides a
highly flexible and cost effective solution to many embedded control applications.
The ATmega163 AVR is supported with a full suite of program and system development
tools including: C compilers, macro assemblers, program debugger/simulators, In-Cir-
cuit Emulators, and evaluation kits.
Pin Descriptions
VCC
Digital supply voltage.
GND
Digital ground.
Port A (PA7..PA0)
Port A serves as the analog inputs to the A/D Converter.
Port A also serves as an 8-bit bi-directional I/O port, if the A/D Converter is not used.
Port pins can provide internal pull-up resistors (selected for each bit). The Port A output
buffers can sink 20mA and can drive LED displays directly. When pins PA0 to PA7 are
used as inputs and are externally pulled low, they will source current if the internal pull-
up resistors are activated. The Port A pins are tristated when a reset condition becomes
active, even if the clock is not running.
Port B (PB7..PB0)
Port B is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each
bit). The Port B output buffers can sink 20 mA. As inputs, Port B pins that are externally
pulled low will source current if the pull-up resistors are activated. Port B also serves the
functions of various special features of the ATmega83/163 as listed on page 117. The
Port B pins are tristated when a reset condition becomes active, even if the clock is not
running.
Port C (PC7..PC0)
Port C is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each
bit). The Port C output buffers can sink 20 mA. As inputs, Port C pins that are externally
pulled low will source current if the pull-up resistors are activated. The Port C pins are
tristated when a reset condition becomes active, even if the clock is not running.
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ATmega163(L)
1142EAVR02/03
Port C also serves the functions of various special features of the ATmega163 as listed
on page 124.
Port D (PD7..PD0)
Port D is an 8-bit bidirectional I/O port with internal pull-up resistors (selected for each
bit). The Port D output buffers can sink 20 mA. As inputs, Port D pins that are externally
pulled low will source current if the pull-up resistors are activated. Port D also serves the
functions of various special features of the ATmega163 as listed on page 128. The Port
D pins are tristated when a reset condition becomes active, even if the clock is not
running.
RESET
Reset input. A low level on this pin for more than 500 ns will generate a Reset, even if
the clock is not running. Shorter pulses are not guaranteed to generate a Reset.
XTAL1
Input to the inverting Oscillator amplifier and input to the internal clock operating circuit.
XTAL2
Output from the inverting Oscillator amplifier.
AVCC
This is the supply voltage pin for Port A and the A/D Converter. It should be externally
connected to V
CC
, even if the ADC is not used. If the ADC is used, it should be con-
nected to V
CC
through a low-pass filter. See page 105 for details on operation of the
ADC.
AREF
AREF is the analog reference input pin for the A/D Converter. For ADC operations, a
voltage in the range 2.5V to AVCC can be applied to this pin.
AGND
Analog ground. If the board has a separate analog ground plane, this pin should be con-
nected to this ground plane. Otherwise, connect to GND.
Clock Options
The device has the following clock source options, selectable by Flash Fuse bits as
shown:
Note:
1. "1" means unprogrammed, "0" means programmed.
The various choices for each clocking option give different start-up times as shown in
Table 5 on page 25.
Internal RC Oscillator
The internal RC Oscillator option is an On-chip Oscillator running at a fixed frequency of
nominally 1 MHz. If selected, the device can operate with no external components. The
device is shipped with this option selected. See "EEPROM Read/Write Access" on page
62 for information on calibrating this Oscillator.
Table 1. Device Clocking Options Select
(1)
Device Clocking Option
CKSEL3..0
External Crystal/Ceramic Resonator
1111 - 1010
External Low-frequency Crystal
1001 - 1000
External RC Oscillator
0111 - 0101
Internal RC Oscillator
0100 - 0010
External Clock
0001 - 0000
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