1348DATARM03/04
Features
Incorporates the ARM7TDMI
ARM
Thumb
Processor Core
High-performance 32-bit RISC Architecture
High-density 16-bit Instruction Set
Leader in MIPS/Watt
Embedded ICE (In-circuit Emulation)
8K Bytes On-chip SRAM
32-bit Data Bus, Single-clock Cycle Access
1M Words 16-bit Flash Memory (16 Mbits)
Single Voltage Read/Write
Sector Erase Architecture
Dual-plane Organization Allows Concurrent Read and Program/Erase
Erase Suspend Capability
Low-power Operation
Data Polling, Toggle Bit and Ready/Busy End of Program Cycle Detection
Reset Input for Device Initialization
Sector Program Unlock Command
Factory-programmed AT91 Flash Uploader Software
Fully-programmable External Bus Interface (EBI)
Maximum External Address Space of 64M Bytes
8 Chip Selects, Software-programmable 8/16-bit External Data Bus
8-level Priority, Individually Maskable, Vectored Interrupt Controller
4 External Interrupts, Including a High-priority Low-latency Interrupt Request
32 Programmable I/O Lines
3-channel 16-bit Timer/Counter
3 External Clock Inputs
2 Multi-purpose I/O Pins per Channel
2 USARTs
2 Dedicated Peripheral Data Controller (PDC) Channels per USART
Programmable Watchdog Timer
Advanced Power-saving Features
CPU and Peripherals Can Be Deactivated Individually
Fully Static Operation:
0 Hz to 40 MHz Internal Frequency Range at 3.0V, 85
C
2.7V to 3.6V Operating Range
-40
C to 85
C Temperature Range
Available in a 120-ball BGA Package
Description
The AT91F40816 is a member of the Atmel AT91 16/32-bit microcontroller family,
which is based on the ARM7TDMI processor core. The processor has a high-perfor-
mance 32-bit RISC architecture with a high-density 16-bit instruction set and very low
power consumption. In addition, a large number of internally banked registers result in
very fast exception handling, making the device ideal for real-time control applications.
The eight-level priority-vectored interrupt controller, together with the Peripheral Data
Controller, significantly enhance real-time device performance.
By combining the microcontroller, featuring on-chip SRAM and a wide range of periph-
eral functions, with 16 Mbits of Flash memory in a single compact 120-ball BGA
package, the Atmel AT91F40816 provides a powerful, flexible and cost-effective solu-
tion to many compute-intensive embedded control applications and offers significant
board size reductions.
The Flash memory may be programmed via the JTAG/ICE interface or the factory-pro-
grammed Flash Uploader using a single device supply, making the AT91F40816 ideal
for in-system programmable applications.
AT91 ARM
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Microcontrollers
AT91F40816
3
AT91F40816
1348DATARM03/04
Pin Description
Table 1. AT91F40816 Pin Description
Module
Name
Function
Type
Active
Level
Comments
EBI
A0 - A23
Address Bus
Output
Valid after reset; do not reprogram A20 to
I/O, as it is MSB of Flash address
D0 - D15
Data Bus
I/O
NCS0 - NCS3
External Chip Select
Output
Low
Used to select external devices
CS4 - CS7
External Chip Select
Output
High
A23 - A20 after reset
NWR0
Lower Byte 0 Write Signal
Output
Low
Used in Byte Write option
NWR1
Upper Byte 1 Write Signal
Output
Low
Used in Byte Write option
NRD
Read Signal
Output
Low
Used in Byte Write option
NWE
Write Enable
Output
Low
Used in Byte Select option
NOE
Output Enable
Output
Low
Used in Byte Select option
NUB
Upper Byte Select
Output
Low
Used in Byte Select option
NLB
Lower Byte Select
Output
Low
Used in Byte Select option
NWAIT
Wait Input
Input
Low
BMS
Boot Mode Select
Input
Sampled during reset; must be driven low
during reset for Flash to be used as boot
memory
AIC
FIQ
Fast Interrupt Request
Input
PIO-controlled after reset
IRQ0 - IRQ2
External Interrupt Request
Input
PIO-controlled after reset
Timer
TCLK0 - TCLK2
Timer External Clock
Input
PIO-controlled after reset
TIOA0 - TIOA2
Multi-purpose Timer I/O Pin A
I/O
PIO-controlled after reset
TIOB0 - TIOB2
Multi-purpose Timer I/O Pin B
I/O
PIO-controlled after reset
USART
SCK0 - SCK1
External Serial Clock
I/O
PIO-controlled after reset
TXD0 - TXD1
Transmit Data Output
Output
PIO-controlled after reset
RXD0 - RXD1
Receive Data Input
Input
PIO-controlled after reset
PIO
P0 - P31
Parallel IO Line
I/O
WD
NWDOVF
Watchdog Overflow
Output
Low
Open drain
Clock
MCKI
Master Clock Input
Input
Schmidt trigger
MCKO
Master Clock Output
Output
Reset
NRST
Hardware Reset Input
Input
Low
Schmidt trigger
NTRI
Tri-state Mode Select
Input
Low
Sampled during reset
ICE
TMS
Test Mode Select
Input
Schmidt trigger, internal pull-up
TDI
Test Data Input
Input
Schmidt trigger, internal pull-up
TDO
Test Data Output
Output
TCK
Test Clock
Input
Schmidt trigger, internal pull-up
4
AT91F40816
1348DATARM03/04
Flash
Memory
NCSF
Flash Memory Select
Input
Low
Enables Flash Memory when pulled low
NBUSY
Flash Memory Busy Output
Output
Low
Flash RDY/BUSY signal; open-drain
NRSTF
Flash Memory Reset Input
Input
Low
Resets Flash to standard operating mode
Power
V
DD
Power
Power
All V
DD
and all GND pins MUST be
connected to their respective supplies by
the shortest route
GND
Ground
Ground
VPP
Faster Program/Erase Voltage
Power
See AT49BV/LV1604(T) 16-megabit (1M x
16/2M x 8) 3-volt Only Flash Memory
Datasheet
Table 1. AT91F40816 Pin Description (Continued)
Module
Name
Function
Type
Active
Level
Comments
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