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Электронный компонент: AT73C239

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Features
Main Supply 3.0V to 3.6V
Independent 2.5V to 3.6V Auxiliary Supply for Backup Section
Internal State Machine for Startup
25 mA/1.8V-2.75V Linear Low Drop Out Regulator with High PSRR and Low Noise
(LDO1)
30 mA/1.5V-1.8V Linear Low Drop Out Regulator with High PSRR and Low Noise
(LDO2)
60 mA/1.23V-1.5V-1.8V Linear Low Drop Out Regulator with High PSRR (LDO3)
2 mA/1.2V-1.5V-1.8V Linear Low Drop Out Regulator with Very Low Quiescent Current
(LDO4)
HPBG Economic High Performance Voltage Reference for LDO Supply to RF Sections
LPBG Low Power Voltage Reference to LDO4 During Backup Battery Operation
Internal Oscillator Generates Internal Master Clock
Internal Reset Generator for Main Supply
Additional External Reset Input
Two Wire Interface (TWI) for Independent Activation and Output Voltage Programming
for Each LDO
Available in 3 x 3 x 0.9 mm 16-pin QFN Package
Applications: GPS Modules, WLAN Devices, Wireless Modules
1.
Description
The AT73C239 is a 4-channel Power Supply Power Management Unit (PMU) avail-
able in a QFN 3 x 3 mm package. It is a fully integrated, low cost, combined Power
Management device for wireless modules, GPS and WLAN devices. It integrates four
Linear Low Drop Out (LDO) Regulators, three of which provide high-accuracy RF per-
formance and one (LDO4) with very low quiescent current that is supplied by an
external backup battery. A Low Power Bandgap (LPBG) requiring no external capaci-
tor for decoupling, is used as reference voltage for LDO4 and starts when VBAT is
present. LDO4 regulates output voltage with extremely low quiescent current, maxi-
mizing the lifetime of the backup battery. An Internal State Machine manages the
startup of the other LDOs in the order of LDO3 then LDO1 then LDO2. An economic
High Power Bandgap (HPBG) provides highly accurate, low noise voltage reference
to LDOs 1, 2, 3. HPBG operates in switching mode thereby decreasing its current con-
sumption and becomes inactive when not directly supplied by VIN current. When the
RF LDOs are in idle mode, quiescent current is decreased to a minimum.
The AT73C239 features a Two-wire Interface (TWI) to increase the efficiency of the
system by disabling LDOs when not needed.
Power
Management for
Mobiles (PM)
AT73C239
4-channel Power
Management for
Wireless
Modules
Summary
6201ASPMAAC24-Oct-05
2
6201ASPMAAC24-Oct-05
AT73C239 Summary
2.
Block Diagram
Figure 2-1.
AT73C239 Functional Block Diagram
HPBG
LPBG
Internal Oscillator
Reset Generator
TWI
State Machine
LDO1
VDD
3.0V-3.6V
VOUT
1.8V or 2.75V
ILOAD 25 mA
Fuse1
POR1
Fuse2
POR1
VMON
VDD1
VO1
LDO2
VDD
3.0V-3.6V
VOUT
1.5V or 1.8V
ILOAD 30 mA
VDD2
VO2
LDO3
VDD
3.0V-3.6V
VOUT
1.23V or 1.5V or 1.8V
ILOAD 60 mA
VDD3
VO3
LDO4
VDD
2.5V-3.6V
VOUT
1.2V or 1.5V or 1.8V
ILOAD 2 mA
VBAT
VBG
VO4
GNDA/AVSS
XRESIN
XRESO
TWCK
TWD
GNDD
VZAP
3
6201ASPMAAC24-Oct-05
AT73C239 Summary
Revision History
Doc. Rev
Date
Comments
Change Request Ref.
6201AS
01-Sep-05
First issue
Printed on recycled paper.
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