Features
Stereo Audio DAC
2.7V to 3.3V Analog Supply Operation
2.4V to 3.3V Digital Supply Operation
20-bit Stereo Audio DAC
93 dB SNR Playback Stereo Channels
32 Ohm/20 mW Stereo Headset Drivers with Master Volume and Mute Controls
Stereo Line Level Input with Volume Control/mute and Playback through the
Headset Drivers
Differential Monaural Auxiliary Input, with Volume Control/mute and Playback
through the Headset Drivers
Accepts Mixed Signals from All Signal Paths (Line Inputs, External Mono and DAC
Output)
8, 11.024, 16, 22.05, 24, 32, 44.1 and 48 kHz Sampling Rates
256x or 384xFs Master Clock Frequency
I2S Serial Audio Interface
Mono Audio Power Amplifier
Supply Input from Main Li-Ion Battery
440mW on 8 Ohm Load
Low Power Mode for Earphone
Programmable Volume Control (-22 to +20 dB)
Fully Differential Structure, Input and Output
8 mA Drain Current in Full Power Mode
Power-down mode (Consumption Less than 2uA)
Minimum External Components (Direct Connection of the Loudspeaker)
Applications: Mobile Phones, Digital Cameras, PDAs, SmartPhones, DECT Phones,
Music Players
1.
Description
The AT73C213 is a fully integrated, low-cost, combined stereo audio DAC and audio
power amplifier circuit targeted for Li-Ion or Ni-Mh battery powered devices such as
mobile phones, smartphones, PDA, DECT phones, digital still cameras, music players
or any other type of handheld device where an audio interface is needed.
The stereo DAC section is a complete high performance, stereo audio digital-to-ana-
log converter delivering a 93 dB dynamic range. It comprises a multibit sigma-delta
modulator with dither, continuous time analog filters and analog output drive circuitry.
This architecture provides a high insensitivity to clock jitter. The digital interpolation fil-
ter increases the sample rate by a factor of 8 using 3 linear phase half-band filters
cascaded, followed by a first order SINC interpolator with a factor of 8. This filter elim-
inates the images of baseband audio, retaining only the image at 64x the input sample
rate, which is eliminated by the analog post filter. Optionally, a dither signal can be
added that reduces possible noise tones at the output. However, the use of a multibit
sigma-delta modulator already provides extremely low noise tone energy.
Master clock is from 256 or 384 times the input data rate, allowing choice of input data
rate up to 50 kHz, including standard audio rates of 48, 44.1, 32, 16 and 8 kHz.
The DAC section is followed by a volume and mute control and can be simultaneously
played back directly through a stereo 32 Ohm headset pair of drivers.
Power
Management for
Mobiles (PM)
AT73C213
Audio Interface
for Portable
Handsets
2744APMGMT27-Jan-05
2
2744APMGMT27-Jan-05
AT73C213
The stereo 32 Ohm headset pair of drivers also includes a mixer of a LINEL and LINER pair of
stereo inputs, as well as a differential monaural auxiliary input (line level).
The DAC output can be connected through a buffer stage to the input of the audio power ampli-
fier, using 2x coupling capacitors The mono buffer stage also includes a mixer of the LINEL and
LINER inputs, as well as a differential monaural auxiliary input (line level) which can be, for
example, the output of a voice Codec output driver in mobile phones.
The audio power amplifier is a dual-mode AB class amplifier with differential output and pro-
grammable volume control. In full power mode, it is capable of driving an 8-ohm loudspeaker at
maximum power of 1W at 5V supply and 440 mW at 3.6V supply. In low power mode, it can
drive the same loudspeaker as an earpiece, making it suitable as a handsfree speaker driver in
wireless handset application. The volume, mute, power down, de-emphasis controls and 16-bit,
18-bit and 20-bit audio formats are digitally programmable via a 4-wire SPI bus and the digital
audio data are provided through a multi-format I2S interface.
2.
Block Diagram
Figure 2-1.
AT73C213 Functional Block Diagram
AT73C213
RSTB
SMODE
VDIG
A
VDD
SDIN
LRFS
BCLK
S
e
r
i
al
A
u
di
o
I
/
F
Digital Filter
LINER
LINEL
HSR
HSL
AVDDHS
LOLC: -6 to +6dB
in 3dB step
32
driver
32
driver
Volume
Control
LMPG: -34.5dB to +12dB
in 1.5dB step and mute
VCM
PGA
Digital Filter
Volume
Control
LLIG: -33 to +12dB in
3dB step
+ 20dB and mute
SPI_DOUT
SPI_CLK
SPI_CSB
SPI
SPI_DIN
DAC
+
+
LLOG: -46.5dB to 0dB
in 1.5dB step and mute
+
+
GNDD
MCLK
INGND
V
oltage
Ref
erence
VREF
GNDB
Status
Registers
+
PGA
AUXN
AUXP
MONO
MONOP
MONON
LPHN
HPN
HPP
VBA
T
P
AINN
P
AINP
CBP
DAC
MONO
RLIG: -33 to +12dB in
3dB step
+ 20dB and mute
RMPG: -34.5dB to +12dB
in 1.5dB step and mute
Volume
Control
Volume
Control
RLOG: -46.5dB to 0dB
in 1.5dB step and mute
A
udio P
A
ROLC: -6 to +6dB
in 3dB
step
AUXG: -33 to +12dB in
3dB step
+20 dB and mute
APAGAIN -22 to +20dB in
3dB step
3
2744APMGMT27-Jan-
AT73C213
2744APMGMT27-Jan-05
3.
Pin Description
Table 3-1.
Pin Description
Pin Name
I/O
Pin
Type
Function
LPHN
O
10
Analog
Low power audio stage output
HPN
O
11
Analog
Negative speaker output
VBAT
I
12
Supply
Audio amplifier supply
HPP
O
13
Analog
Positive speaker output
CBP
O
14
Analog
Audio amplifier common mode voltage decoupling
PAINN
I
15
Analog
Audio amplifier negative input
PAINP
I
16
Analog
Audio amplifier positive input
SDIN
I
17
Digital
Audio interface serial data input
BCLK
I
18
Digital
Audio interface bit clock
LRFS
I
19
Digital
Audio interface left/right channel synchronization frame pulse
MCLK
I
20
Digital
Audio interface master clock input
RSTB
I
21
Digital
Master reset (active low)
SMODE
I
22
Digital
Serial interface selection (to connect to ground)
GNDD
GND
23
Ground
Digital ground
VDIG
I
24
Supply
Digital supply
SPI_DOUT
O
25
Digital
SPI data output
SPI_DIN
I/O
26
Digital
SPI data input
SPI_CLK
I
27
Digital
SPI clock
SPI_CSB
I
28
Digital
SPI chip select
MONON
O
29
Analog
Negative monaural driver output
MONOP
O
30
Analog
Positive monaural driver output
AUXP
I
31
Analog
Audio mono auxiliary positive input
AUXN
I
32
Analog
Audio mono auxiliary negative input
VREF
I
1
Analog
Voltage reference pin for decoupling
AVDD
I
2
Supply
Analog supply (DAC + Line in + Aux + Mono out)
HSL
O
3
Analog
Left channel headset driver output
HSR
O
4
Analog
Right channel headset driver output
AVDDHS
I
5
Supply
Headset driver analog supply
LINEL
I
6
Analog
Left channel line in
LINER
I
7
Analog
Right channel line in
INGND
I
8
Analog
Line signal ground pin for decoupling
VCM
I
9
Analog
Common mode reference for decoupling
GNDB
GND
33 (Bottom)
Ground
Analog ground
4
2744APMGMT27-Jan-05
AT73C213
4.
Electrical Characteristics
5.
Digital IOs
All the digital IOs: SDIN, BCLK, LRFS, MCLK, RSTB, SMODE, SPI_DOUT, SPI_DIN, SPI_CLK, SPI_CSB are referred to
as VDIG.
6.
Audio Power Amplifier
6.1
Electrical Specifications
VBAT = 3.6V, T
A
= 25C unless otherwise noted. High power mode, 100 nF capacitor connected between CBP and GND
Audio, 470 nF input capacitors, load = 8 Ohms.
Table 4-1.
Absolute Maximum Ratings*
Operating Temperature (Industrial)...............-40
C to +85
C
*NOTICE:
Stresses beyond those listed under "Absolute Maximum
Ratings" may cause permanent damage to the device.
This is a stress rating only and functional operation of
the device at these or other conditions beyond those
indicated in the operational sections of this specification
is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reli-
ability.
Storage Temperature ................................... -55C to +150C
Power Supply Input
on VBAT.......................................................... -0.3V to +5.5V
on VDIG, AVDD .............................................. -0.3V to +3.6V
Table 5-1.
Digital IOs
Symbol
Parameter
Conditions
VDIG
Min
Max
Unit
VIL
Low level input voltage
Guaranteed input low Voltage
from 2.4Vto 3.3 V
-0.3
0.2 x VDIG
V
VIH
High level input voltage
Guaranteed input high Voltage
from 2.4Vto 3.3 V
0.8 x VDIG
VDIG + 0.3
V
VOL
Low level output voltage
IOL = 2 mA
from 2.4Vto 3.3 V
0.4
V
VOH
High level output voltage
IOH = 2 mA
from 2.4Vto 3.3 V
VDIG - 0.5V
V
Table 6-1.
Audio Power Amplifier Electrical Specifications
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
V
DD
Supply voltage
Unloaded, 100 nF decoupling capacitor
to GND
3
3.6
5.5
V
I
DD
Quiescent current
Inputs shorted, no load
6
8
mA
I
DDstby
Standby current
2
A
V
Cbp
DC reference
VDD/2
V
VOS
Output differential offset
Full gain
-20
0
20
mV
Z
IN
Input impedance
Active state
12K
20k
30k
Ohm
Z
LFP
Output load
Full Power mode
6
8
32
Ohm
Z
LLP
Output load
Low-Power mode, including R1
100
150
300
Ohm
C
L
Capacitive load
100
pF
PSRR
Power supply rejection ratio
200 to 2 kHz differential output
60
dB
5
2744APMGMT27-Jan-
AT73C213
2744APMGMT27-Jan-05
BW
min
Low Frequency Cutoff
1 kHz reference frequency
3 dB attenuation
470 nF input coupling capacitors
50
Hz
BW
max
High Frequency Cutoff
1 KHz reference frequency
3 dB attenuation
470 nF input coupling capacitors
20
kHz
t
UP
Output setup time
Off to on mode
Voltage already settled
Input capacitors precharged
10
ms
V
N
Output noise
Max gain, A weighted
120
500
V
RMS
THD
HP
Output distortion
High power mode, V
DD
= 3.6V, 1 kHz,
Pout = 100 mW, gain = 0dB
0.3
%
THD
LP
Output distortion
Low power mode, V
DD
= 3.6V, 1KHz,
Vout = 100m Vpp, Max gain, load 8
ohms in series with 200 ohms
1
%
P
max
Maximum power
Low power mode, V
DD
= 3.6V, 1 KHz,
Vout = 100 mVpp, Max gain, load 8
ohms in series with 200 ohms
440
mW
G
ACC
Overall Gain accuracy
-2
0
2
dB
G
STEP
Gain Step Accuracy
-0.7
0
0.7
dB
Table 6-1.
Audio Power Amplifier Electrical Specifications
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
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