ChipFind - документация

Электронный компонент: AK61584

Скачать:  PDF   ZIP
ASAHI KASEI
[AK61584]
0185-E-00 98/04
-1-
AK61584
Dual Low Power T1/E1 Line Interface
Features
- Provides Dual Analog PCM Line Interface
for short-haul,T1 and E1 applications
- Jitter Tolerance: Compliant with AT&T62411
TR-NWT-000499 Category I,II ITU-T G.823
-
Transmitter Pulse Shape: Compliant with
AT&T62411,CB119, TR-NWT-000499,
ITU-T G.703
- Jitter Transfer: AT&T62411, ITU-T G.736
- Operating mode fully software configurable.
No external quartz crystal
is required.
- Support of JTAG boundary scan
- Low Power Consumption
- 3.3Volt operation
- Small Plastic Package 64pin LQFP(
10*10*
1.4mm
)
General Description
The AK61584 is a universal line interface for T1/E1 applica-
tions, designed for high-volume cards where low power,
high density and universal operation is required. One board
design can support all T1/E1 modes.
The AK61584 is a low-power CMOS device available
in 3.3 Volt.
Preliminary Product Information
This document contains information for a new product. AKM
reserves the right to modify this product without notice.
TCLK1
(
TDATA1)TPOS1
Hardware mode
RLOOP2 ATTEN0 ATTEN1 RLOOP1 LLOOP1 LLOOP2 TAOS1 TAOS2
CON01 CON02 CON11 CON12 CON21 CON22 CODER1 CODER2 CLKE
Serial Port
IPOL
(Note)
CS
INT
SCLK
SDO
SDI
SPOL
CONTROL
CONTROL
JTAG
CLOCK GENERATOR
JITTER
ATTENUATOR
JITTER
ATTENUATOR
TAOS
TAOS
DETECT
LOS&
AIS
LOS&
AIS
DETECT
PULSE
SHAPING
CIRCUITRY
PULSE
SHAPING
CIRCUITRY
CLOCK&
DATA
RECOVERY
CLOCK&
DATA
RECOVERY
DRIVER
DRIVER
RE
M
O
T
E
L
OOP
B
A
CK
E
N
CO
DER
D
EC
OR
DE
R
L
O
CA
L
L
OOP
B
A
C
K
1
L
O
CA
L
L
OOP
B
A
CK
2
4
2
2
2
2
3
REFCLK
1XCLK
TV+
TGND
RV+
RGND
DV+
DGND
AV+
AGND BGREF
PD1
PD2 LOS1 LOS2
(AIS1)TNEG1
RCLK1
(
RDATA1)RPOS1
(BPV1)RNEG1
TCLK2
(
TDATA2)TPOS2
(AIS2)TNEG2
RCLK2
(
RDATA2)RPOS2
(BPV2)RNEG2
TTIP1
TRING1
RTIP1
RRING1
TTIP2
TRING2
RTIP2
RRING2
RESET
MODE
Note) In host mode, this pin must be tied to GND.
E
N
CO
DE
R
D
EC
OR
D
E
R
RE
M
O
T
E
L
OOP
B
A
CK
L
O
CA
L
L
OOP
B
A
CK
1
LO
C
A
L
L
O
O
PB
A
C
K
2
ASAHI KASEI
[AK61584]
0185-E-00 98/04
-2-
Table of Contents
Block Diagram................................................................................ 1
Specifications
Absolute Maximum Ratings ............................................ 3
Recommended Operating Conditions .............................. 3
Digital Characteristics ..................................................... 4
Analog Specifications
Receiver.............................................................. 4
Jitter Attenuator .................................................. 4
Transmitter ......................................................... 5
Switching Characteristics
T1 Clock/Data .................................................... 6
E1 Clock/Data .................................................... 6
Serial Port........................................................... 8
JTAG .................................................................. 9
General Description
Overview........................................................................10
Operating Options ..........................................................11
Overview of Applications...............................................12
Transmitter.....................................................................13
Receiver .........................................................................15
Jitter Attenuator..............................................................16
Coder Mode ...................................................................17
Reference Clock.............................................................17
Loopbacks ......................................................................17
Power Down ..................................................................17
Reset ..............................................................................18
Power-On Reset .............................................................18
Control ...........................................................................18
Registers ........................................................................21
Host-Mode Register Access ...........................................23
Arbitrary Waveform Generation .....................................24
Power Supply .................................................................24
JTAG Boundary Scan .....................................................24
Pin Description ..............................................................................32
ASAHI KASEI
[AK61584]
0185-E-00 98/04
-3-
ABSOLUTE MAXIMUM RATINGS
Parameter
Symbol
Min
Max
Units
DC Supply(TV+1,TV+2,RV+1,RV+2,AV+,DV+)(Note 1)
-
6.0
V
Input Voltage Any Pin
Vin
RGND-0.3
(RV+)+0.3
V
Input Current Any Pin (Note 2)
Iin
-10
10
mA
Ambient Operating Temperature
TA
-40
85
o
C
Storage Temperature
Tstg
-65
150
o
C
WARNING:
Operations at or beyond these limits may result in permanent damage to the device.
Normal operation is not guaranteed at these extremes.
Notes:
1. Referenced to RGND1,RGND2,TGND1,TGND2,AGND,DGND at 0V.
2. Transient currents of up to 100 mA will not cause SCR latch-up.
RECOMMENDED OPERATING CONDITIONS
Parameter
Symbol
Min
Typ
Max
Units
DC Supply(TV+1,TV+2,RV+1,RV+2,AV+,DV+)
(Note 3)
3.135
3.3
3.465
V
Ambient Operating Temperature
TA
-40
25
85
o
C
Power Consumption T1
(Notes 4 and 5)
(Each Channel) T1
(Notes 4 and 6)
E1,75ohm (Notes 4 and 5)
E1,120ohm (Notes 4 and 5)
PC
-
-
-
-
292
167
180
170
380
220
210
200
MW
MW
MW
MW
REFCLK Frequency
T1 1XCLK=1
1.544-
100ppm
1.544
1.544+
100ppm
MHz
T1 1XCLK=0
12.352-
100ppm
12.352
12.352+
100ppm
MHz
E1 1XCLK=1
2.048-
100ppm
2.048
2.048+
100ppm
MHz
E1 1XCLK=0
16.384-
100ppm
16.384
16.384+
100ppm
MHz
Notes:
3. TV+1,TV+2,AV+,DV+,RV+1,RV+2 should be connected together.TGND1,TGND2,RGND1,
RGND2,DGND1,DGND2,DGND3 should be connected together.
4. Power consumption while driving line load over operating temperature range. lncludes IC and load.
Digital input levels are within 10% of the supply rails and digital outputs are driving a 50 pF
capacitive load.
5. Assumes 100% ones density and maximum line length at 3.465V.
6. Assumes 50% ones density and 300ft. line length at 3.3V.
ASAHI KASEI
[AK61584]
0185-E-00 98/04
-4-
DIGITAL CHARACTERISTICS
(T
A
=-40 to 85
o
C;power supply pins within +/-5% of nominal)
Parameter
Symbol
Min
Typ
Max
Units
High-Level input Voltage (Note 7)
V
IH
(DV+)-0.5
-
-
V
Low-Level input Voltage (Note 7)
V
IL
-
-
0.5
V
High-Level Output Voltage (Note 8)
IOUT=-40uA
V
OH
(DV+)-0.3
-
-
V
Low-Level Output Voltage (Note 8)
IOUT=1.6mA
V
OL
-
-
0.4
V
Input Leakage Current
(Digital pins except INT, J_TMS, and J_TDI)
-
-
+/-10
uA
Notes:
7. Digital inputs are designed for CMOS logic levels.
8. Digital outputs are TTL compatible and drive CMOS levels into a CMOS load.
ANALOG SPECIFICATIONS
(T
A
=-40 to 85
o
C;power supply pins within +/-5% of nominal)
Parameter
Min
Typ
Max
Units
Receiver
Input Impedance between RTIP/RRING
-
20k
-
ohm
Sensitivity Below DSX-1(0 dB=2.4V)
-13.6
-
-
DB
Loss of signal threshold, Short Haul
T1
E1
-
-
0.23
0.15
-
-
V
0p
V
0p
Data Decision Threshold T1,DSX-1 (Note 9)
(Note 10)
E1 (Note 11)
(Note 12)
60
55
45
40
65
-
50
-
70
75
55
60
% of
Peak
Allowable Consecutive Zeros before LOS
160
175
190
bits
Receiver Input Jitter 10 Hz and below (Note 13)
Tolerance(DSX-1,E1) 2 kHz
10 kHz-100 kHz
300
6.0
0.4
-
-
-
-
-
-
UI
pp
UI
pp
UI
pp
Jitter Attenuator
Jitter Attenuation Curve Corner Frequency (Note 14 and 15)
T1
E1
-
-
4
5.5
-
-
Hz
Hz
Attenuation at 10 kHz Jitter frequency (Note 14 and 15)
-
60
-
dB
Attenuator Input Jitter Tolerance (Note 14)
(Before Onset of FIFO Overflow or Underflow Protection)
28
43
-
UI
pp
Notes:
9. For input amplitude of 1.2Vpk to 4.14Vpk
10. For input amplitude of 0.5Vpk to 1.2Vpk, and 4.14Vpk to 5.0Vpk
11. For input amplitude of 1.07Vpk to 4.14Vpk
12. For input amplitude of 4.14Vpk to 5.0Vpk
13. Jitter tolerance increases at lower frequencies. See Figure 11.
14. Not production tested. parameters guaranteed by design and characterization.
15. Attenuation measured with sinusoidal input jitter equal to 3/4 of measured jitter tolerance.
Circuit attenuates jitter at 20 dB/decade above the corner frequency. See Figure 16. Output jitter
can increase significantly when more than 28 UI's are input to the attenuator. See discussion in
jitter Attenuator section.
ASAHI KASEI
[AK61584]
0185-E-00 98/04
-5-
ANALOG SPECIFICATIONS
(T
A
=-40 to 85
o
C;power supply pins within +/-5% of nominal)
Parameter
Min
Typ
Max
Units
Transmitter
AMI Output Pulse Amplitudes (Note 16)
E1,75ohm (Note 17)
E1,120ohm (Note 18)
T1,DSX-1 (Note 19)
2.14
2.7
2.4
2.37
3.0
3.0
2.6
3.3
3.6
V
0p
V
0p
V
0p
Recommended Transmitter Output Load (Note 16)
T1,
E1,75ohm
E1,120ohm
-
-
-
25
43
68.9
-
-
-
ohm
ohm
ohm
Jitter Added
by the Transmitter 8kHz 40kHz
10Hz 40kHz
Broad Band (Note 20)
-
-
-
0.013
0.016
0.027
-
-
-
UI
pp
UI
pp
UI
pp
Power in 2 kHz band about 772 kHz (Notes 14 and 21)
(DSX-1 only)
12.6
15
17.9
dBm
Power in 2 kHz band about 1.544 MHz (Notes 14 and 21)
(referenced to power in 2 kHz band at 772 kHz) (DSX-1 only)
-29
-38
-
dB
Positive to Negative Pulse Imbalance (Notes 14 and 21)
T1,DSX-1
E1,amplitude at center of pulse interval
E1,width at 50% of nominal amplitude
-
-5
-5
0.2
-
-
0.5
+5
+5
dB
%
%
Transmitter Return Loss (Notes 14, 21, and 22)
51 kHz - 102 kHz
102 kHz - 2.048 MHz
2.048 MHz - 3.072 MHz
8
14
10
-
-
-
-
-
-
dB
dB
dB
E1 Short Circuit Current (Note 23)
-
-
50
mArms
E1 and DSX-1 Output Pulse Rise/Fall Times (Note 24)
-
25
-
ns
E1 Pulse Width (at 50% of peak amplitude)
-
244
-
ns
E1 Pulse Amplitude E1, 75ohm
for a space
E1,120ohm
-0.237
-0.3
-
-
0.237
0.3
V
0p
V
0p
Notes:
16. Using a transformer that meets the specifications in Table 2.
17. Measured across 75ohm at the output of the transmit transformer for CON2/1/0=0/0/0.
18. Measured across 120ohm at the output of the transmit transformer for CON2/1/0=0/0/1.
19. Measured at the DSX-1 Cross-Connect for line length settings CON2/1/0=0/1/0, 0/1/1,
1/0/0, 1/0/1, and 1/1/0 after the length of #22 ABAM cable specified in Table 1.
20. Input signal to TCLK is jitter free.
21. Typical performance with a 0.47 uF capacitor in series with primary of transmitter output transformer.
22. Return loss = 20 log
10
ABS ((z1+z0)/(z1-z0)) where z1 = impedance of the transmitter, and
Z
0
=cable impedance.
23. Transformer secondaries shorted with 0.5ohm resistor.
24. At transformer secondary. From 10% to 90% of amplitude.