AIC3842
Current-Mode PWM Controller
Analog Integrations Corporation
4F, 9 Industry E. 9th Rd, Science-Based Industrial Park, Hsinchu, Taiwan
DS-3842-01 012102
TEL: 886-3-5772500
FAX: 886-3-5772510
www.analog.com.tw
1
n
FEATURES
l
Low Start-Up Current (300
A Typical)
l
Internal Precision Reference.
l
500KHz Current-Mode Operation.
l
Pulse-by-Pulse Current Limiting.
l
Automatic Feed-Forward Compensation.
l
Optimized for Off-Line and DC/DC Converters.
l
Undervoltage Lockout with Hysteresis.
l
Double Pulse Suppression.
l
High Current Totem-Pole Output.
n
APPLICATIONS
l
Off-Line Converter.
l
DC/DC Converter.
n
DESCRIPTION
The AIC3842 control IC provides the features
that are necessary to implement off-line or
DC/DC Converter fixed-frequency current-mode
schemes with a minimum number of external
components. This integrated circuits features
an
undervoltage lockout (UVLO) with
approximately 300
A start-up current, a
precision reference trimmed for accuracy at the
error amplifier input, high gain error amplifier,
current sensing comparator, logic to insure
latched operation, and a totem-pole output
stage designed to source or sink high peak
current. The output stage, suitable for driving N
channel MOSFETs, is low in the off state.
n
TYPICAL APPLICATION CIRCUIT
M1
C3
1000P
C2
300pF
C6
300P
RS
0.33
R2
20K
R4
7.5K
R1
10
R5
390
R3
51K
C5
0.1
F
C4
2.2nF
C7
1nF
+
C1
47
F
COMP
VREF
AIC3842
INDUCTOR
FEEDBACK
SIGNAL
VCC
7
6
5
3
4
8
1
2
VCC
OUTPUT
RT/CT
GND
ISENSE
VFB
Current Mode PWM Control Circuit
AIC3842
2
n
ORDERING INFORMATION
DIP-8
SO-8
TOP VIEW
PIN CONFIGURATION
ISENSE
1
3
2
4
COMP
VFB
RT/CT
GND
VREF
VCC
OUTPUT
5
8
7
6
PACKING TYPE
TR: TAPE & REEL
TB: TUBE
PACKAGE TYPE
N: PLASTIC DIP
S: SMALL OUTLINE
AIC3842CXXX
Example: AIC3842CSTR
in SO-8 Package & Taping & Reel Packing Type
(CN is not available in TR packing type.)
n
ABSOLUTE MAXIMUM RATINGS
Supply Voltage (Low Impedance Source )
... ............. ... ... ... ................ ... ... ........................ 30V
Supply Voltage (I
CC
<30mA)
...................... ..... ... ... ... .... ... ... ..... ................... ... ... .......... Self Limiting
Output Current ................. ... ... ... ... ... ... ... ... ....... ... ... ... ....................... ... ... .... ... ... ............ .........
1A
Output Energy (Capacitive Load) ...................... ........... ... ... ... ... .... ............ ... ... .... ...................... 5
J
Analog Inputs (Pins 2, 3) ... ........ ... ... ... ... ... ... ... ...... ......... ... ... ... .................... ... ... .... -0.3V to +6.3V
Error Amp Output Sink Current ......... ....... .... ... ...... ... ... ... ................... ... ... .... ... ... ... ............... 10mA
Operation Temperature Range ......... ....... .... ... ...... ... ... ... .................... ... ... ... ............... -40
C~85
C
Power Dissipation at T
A
25
C DIP Package ......... ... ... ... ... ... ... ... ... ....... ... ... ... ..... ... ............... 1W
SOIC Package
............ ... .... ..... ........ ... ... ... ... ... ... ............. 725mW
Storage Temperature Range
........ ... ...... ... ... ... .............................. ... ......... ... ... ... -65
C to +150
C
Lead Temperature (Soldering, 10 seconds) ........ ... ...... ... ... ... ..... ... ... ... ... .... ... ....... ... ........... 300
C
Note 1: All voltages are with respect to Pin 5.
All currents are positive into the specified terminal.
n
TEST CIRCUIT
R5
4.7K
A
R4
100K
Error Amp.
Adjust
R7
4.7K
ISENSE
Adjust
Q2
2N2222
R6
10K
R3
5K
RT
C2
0.1
F
OUTPUT
AIC3842
CT
GROUND
S1
VCC
V
REF
R1
1K
1W
C1
0.1
F
COMP
VREF
VFB
VCC
ISENSE
GND
RT/CT
OUTPUT
AIC3842
3
n
ELECTRICAL CHARACTERISTICS
{V
CC
= 15V (see Note 2), -40
C
T
A
85
C, unless
otherwise specified.}
PARAMETERS
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Reference Section
Output Voltage
I
O
=1mA
4.9
5
5.1
V
Line Regulation
V
CC
=12V to 25V
5
20
mV
Load Regulation
I
O
=1mA to 20mA
5
25
mV
Temperature Coefficient of
Output Voltage
0.2
0.4
mV/
C
Output Noise Voltage
f=10Hz to 10KHz
50
V
Output Voltage Long-Term
Drift
After 1000H at T
A
=25
C
5
25
mV
Short-Circuit Output Current
-30
-85
-180
mA
Oscillator Section
Oscillator Frequency (see
Note 3)
47
52
57
KHz
Frequency Change with
Supply Voltage
VCC=12V to 25V
0.2
1
%
Frequency Change with
Temperature
TA=TLOW to THIGH
5
%
Peak-to-Peak Amplitude at
RT/CT
1.7
V
Error Amplifier Section
Feedback Input Voltage
COMP at 2.5V
2.42
2.50
2.58
V
Input Bias Current
-0.3
-2
A
Open-Loop Voltage
Amplification
V
O
=2V to 4V
65
90
dB
Gain-Bandwidth Product
0.7
1
MHz
Supply Voltage Rejection
Ratio
V
CC
=12V to 25V
60
70
dB
Output Sink Current
V
FB
at 2.7V, COMP at 1.1V
2
10
mA
Output Source Current
V
FB
at 2.3V, COMP at 5V
-0.5
-1
mA
High-Level Output Voltage
V
FB
at 2.3V, R
L
=15K
to GND
5
6.2
V
Low-Level Output Voltage
V
FB
at 2.7V, R
L
=15
to VREF
0.8
1.1
V
AIC3842
4
n
ELECTRICAL CHARACTERISTICS
(Continued)
PARAMETERS
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Current Sense Section
Voltage Amplification
See Note 3 and 4
2.77
3
3.22
V/V
Current Sense Comparator
Threshold
COMP at 5V, See Note 3
0.9
1
1.1
V
Supply Voltage Rejection
Ratio
V
CC
=12V to 25V, See Note 3
70
dB
Input Bias Current
-2
-10
A
Delay Time to Output
150
300
nS
Output Section
I
SOURCE
=20mA
13
13.5
V
High-Level Output Voltage
I
SOURCE
=200mA
12
13.4
V
I
SINK
=20mA
0.1
0.4
V
Low-Level Output Voltage
I
SINK
=200mA
1.5
2.2
V
Rise Time
C
L
=1nF
50
150
nS
Fall Time
C
L
=1nF
50
150
nS
Undervoltage Lockout Section
Start Threshold Voltage
14.5
16
17.5
V
Minimum Operating Voltage
after Start-Up
8.5
10
11.5
V
Pulse-Width-Modulator Section
Maximum Duty Cycle
95
96
100
%
Minimum Duty Cycle
0
%
Supply Voltage
Start-Up Current
0.3
0.5
mA
Operating Supply Current
V
FB
and I
SENSE
at 0V
12
17
mA
Limiting Voltage
I
CC
=25mA
30
34
V
Note: 2: Adjust VCC above the start threshold before setting it to 15V.
3. These parameters are measured at the trip point of the latch with VFB at 0V.
4. Voltage amplification is measured between ISENSE and COMP with the input changing from 0V to
0.8V.
AIC3842
5
Error AMP Configuration
Z
F
1
2
+
-
V
FB
COMP
0.5mA
2.50V
Error Amp can Source or Sink up to 0.5mA
Z
I
Fig. 1
Under-Voltage Lockout
7
V
ON
V
OFF
AIC3842
16V
10V
17mA
500
A
V
OFF
V
ON
V
CC
I
CC
During under-voltage lockout, the output driver is biased to sink minor amounts of
current. Pin 6 should be shunted to ground with a bleeder resistor to prevent
activating the power switch with extraneous leakage currents.
Fig. 2-1
Fig. 2-2
Current Sense Circuit
R
C
R
S
I
S
2R
R
1V
GND
Current Sense
COMP
Error AMP
Current Sense
Comparator
Peak Current (Is) is Determined By The Formula
A small RC filter may be required to suppress switch transients.
I
SMAX
1.0V
R
S
Fig. 3
AIC3842
6
Oscillator Section
4
5
R
T
C
T
R
T
/C
T
V
REF
GND
For RT>5k, f
T
T
C
*
R
72
.
1
8
td (
s)
CT (nF)
1
10
100
0.3
1
3
0
10
30
RT (K
)
Frequency (Hz)
10
2
10
3
10
4
10
5
10
6
3
10
100
CT=100nF
47nF
22nF
10nF
2.2nF
1.0nF
4.7nF
30
Fig. 4-1
Fig. 4-2 Deadtime vs CT (RT>5K
)
Fig. 4-3 Timing Resistance vs. Frequency
Saturation Voltage - (V)
Output Current, Source or Sink - (A)
0.01
0.1
1
0
1
2
3
5
6
7
SOURCE SAT
(Vcc-VoH)
SINK SAT (Vol)
Vcc=15
V
TA=+25
solid line
TA=-55
dash line
10
100
1k
10k
100k
1M
-20
0
20
40
60
80
Phase (degree)
Voltage Gain (dB)
Frequency (Hz)
-200
-150
-100
-50
0
Fig. 4-4 Output saturation characteristics
Fig. 4-5 Error Amplifier Open-Loop Frequency Response
Open-Loop Laboratory Fixture
1
2
3
4
5
6
7
8
COMP
V FB
I
SENSE
R
T
/C
T
VREF
VCC
OUTPUT
GND
A
4.7K
1K
ERROR
AMP
ADJUST
4.7K
I
SENSE
ADJUST
100K
2N2222
R1
AIC3842
0.1
F
0.1
F
1k
1W
VREF
VCC
OUTPUT
GND
5K
C
T
High peak currents associated with capacitive loads necessitate careful grounding techniques.
Timing and bypass capacitors should be connected close to pin 5 in a single point ground. The
transistor and 5k potentiometer are used to sample the oscillator waveform and apply an adjustable
ramp to pin 3.
Fig. 5
AIC3842
7
Open-Loop Laboratory Fixture
8
3
1
V
REF
I
SENSE
1k
330O
500
SHUTDOWN
TO CURRENT SENSE
RESISTOR
SHUTDOWN
COMP
Fig. 6-1
Fig. 6-2
Shutdown of the AIC3842 can be accomplished by two methods; either raise pin 3 above 1V or pull pin 1 below a voltage two-diode
drops above ground. Either method causes the output of the PWM comparator to be high (refer to block diagram). The PWM latch
is reset dominant so that the output will remain low until the next clock cycle after the shutdown condition at pin 1 and/or 3 is
removed. In one example, an externally latched shutdown may be accomplished by adding an SCR, which will be reset by cycling
Vcc below the lower UVLO threshold. At this point the reference turns off, allowing the SCR to reset.
Offline Flyback Regulator
1
2
3
4 5
6
7
8
VARO
VM68
117 VAC
C1
250
F
250V
R2
56K
2W
R
12
2W
4.7K
C9
3300pF
600V
D4
1N3613
Np
T1
N5
N12
N12
Nc
D6
USD945
C10
4700
F
10V
C11
4700
F
10V
+
5V
COM
+12V
12V COM
-12V
C12
2200
F
16V
C13
2200
F
16V
D7
UFS1002
D8
UES1002
R11
2.7k
2W
C8
680pF
16V
D5
1N3613
Q1
UFN833
R7
22
R13
10K
C7
470pF
R8
1k
USD1120
R10
0.55
1W
D4
1N3613
D2
1N3612
C3
22
F
C2
100
F
25V
C4
47
F
25V
R9
68
3W
R3
20k
R4
4.7k
R5 150k
C14 100pF
R6
10k
C6
0.0022
F
C5
0.01
F
AIC3842
1. Input Voltage
95VAC to 130VA
(50Hz/60Hz)
2. Line Isolation
3750V
3. Switching Frequency
40kHz
4. Efficiency @ Full Load 70%
5. Output Voltage:
A. +5V, 5%; 1A to 4A load
Ripple voltage: 50mV P-P Max
B. +12V, 3%; 0.1A to 0.3A load
Ripple voltage: 100mV P-P Max
C. -12V, 3%; 0.1A to 0.3A load
Ripple voltage: 100mV P-P Max
Power Supply Specifications
L1
10
H
R1
5
1W
Fig. 7
AIC3842
8
Slope compensation
AIC3842
0.1
F
R2
C
R
SENSE
A fraction of the oscillator ramp can be
resistively summed with the current sense
signal to proved slope compensation for
converters requiring duty cycles over 50%
Note that capacitor, C forms a filter with R2 to
suppress the leading edge switch spikes.
V
REF
I
SENSE
C
T
R
T
/ C
T
I
SENSE
R1
R
T
8
4
3
Fig. 8
n
BLOCK DIAGRAM
8
6
R
S
VCC
GND
V
REF
5V/50mA
COMP
OUTPUT
VFB
ISENSE
RT/CT
VREF
Good
Logic
UVLO
PWM
Latch
OSC
ZD
34V
Current
Sense
comparator
Internal Bias
Error Amp.
D1
Z1
1V
D2
2R
2.50V
S/R
5V
REF
Q2
Q1
7
5
4
1
2
3
+
-
R
T
AIC3842
9
n
PIN DESCRIPTIONS
PIN 1: COMP
- This pin is the error amplifier
output and is made available
for loop compensation.
PIN 2: VFB
- This is the inverting input of
the error amplifier. It is
normally connected to the
switching power supply output
through a resistor divider.
PIN 3: ISENSE - A voltage proportional to
inductor current is connected
to this input. The PWM uses
this information to terminate
the output switch conduction.
PIN 4: RT/CT
- The oscillator frequency and
maximum output duty cycle
are programmed by
connecting resistor R
T
to V
REF
and capacitor C
T
to ground.
Operation to 500KHz is
feasible.
PIN 5: GND-
This pin is the combined
control circuitry and power
ground.
PIN 6: OUTPUT- This output directly drives the
gate of a power MOSFET.
Peak currents up to 1A are
sourced and sunk by this pin.
PIN 7: VCC -
This pin is the positive supply
of the control IC.
PIN 8: VREF -
This is the reference output. It
provides charging current for
capacitor CT through resistor
RT.
n
APPLICATION INFORMATIONS
Undervoltage Lockout
There are two separate undervoltage lockout
comparators incorporated to make sure that the
IC is fully functional before the output stage is
enabled. One is for power supply voltage (VCC)
and the other is for reference output voltage
(VREF). Each has a built in hysteresis to prevent
erratic output behavior when their respective
thresholds are crossed. For VCC comparator the
upper and lower thresholds are 16V and 10V,
respectively. The large hysteresis and low start up
current (0.3mA) of the AIC3842 make it ideally
suited in off-line converter applications where
efficient bootstrap startup techniques are required.
A 34V zener is connected as a shunt regulator
from VCC to ground. Its purpose is to protect the
IC from excessive voltage that can occur during
system start-up.
Reference Output
The 5.0V reference output is trimmed to
2.0%
tolerance at T
A
=25
C. It supplies charging current
to the oscillator timing capacitor and is capable of
providing current in excess of 20mA for powering
additional control system circuitry. In case of
overload, the reference is short-circuit protected at
AIC3842
10
about 85mA.
Error Amplifier
A fully compensated error amplifier is provided
with inverting input and output externally
accessible. The noninverting input is internally
biased at 2.5V. The converter output voltage is
usually divided down and connected to the
inverting input.
The output of the error amplifier is accessible for
external loop compensation, with an offset at two
diode drops (
1.4V) and divided by three, before
connected to the inverting input of the current
sense comparator. This guarantees that no drive
pulse appears at the output (pin 6).
Oscillator
The oscillator frequency can be programmed
through the setting of timing components R
T
and
C
T
. Capacitor C
T
is charged from the 5.0V
reference output through R
T
to about 2.8V and
discharged to about 1.2V by the internal
discharge current. When C
T
is discharged the
output (pin 6) must be in the low state, thus
producing a controlled amount of output
deadtime. Note that many values of R
T
and C
T
can produce the same frequency but only one
combination will yield a specific output deadtime
at a given frequency.
Current Sense Comparator and PWM
Latch
The output switch of AIC3842 is initiated by the
oscillator and terminated when the peak inductor
current reaches the threshold level established by
the error amplifier output (pin 1). The AIC3842 is
operated at a current mode since the inductor
current is monitored cycle-by-cycle and decides
the duty cycle.
The inductor current is converted to a voltage by
inserting the ground referenced sense resistor R
S
in series with the source of output switch M1.
This voltage is monitored by the current sense
input (pin 3) and is compared to a level derived
from the error amplifier output. In the normal
operating conditions the peak inductor current is
controlled by the voltage at pin 1 where
3RS
1.4V
-
1)
PIN
(
V
I
PK
=
PWM Latch is used to ensure that only a single
pulse appears at the output during any given
oscillator cycle. However, a narrow spike on the
leading edge of the current waveform can usually
be observed and may cause the power supply to
exhibit an instability when the output is tightly
loaded.
Output Switch
The AIC3842 contains a single totem-pole output
stage that was specifically designed for direct
drive of power MOSFET. If any undervoltage
lockout is deetected, internal circuitry will keep
the output switch in a sinking current mode, no
external pull down resistor is needed.
AIC3842
11
n
PHYSICAL DIMENSIONS
l
8 LEAD PLASTIC SO (unit: mm)
SYMBOL
MIN
MAX
A
1.35
1.75
A1
0.10
0.25
B
0.33
0.51
C
0.19
0.25
D
4.80
5.00
E
3.80
4.00
e
1.27(TYP)
H
5.80
6.20
L
0.40
1.27
D
H
e
A
B
A1
C
E
L
l
8 LEAD PLASTIC DIP (unit: mm)
SYMBOL
MIN
MAX
A1
0.381
--
A2
2.92
4.96
b
0.35
0.56
C
0.20
0.36
D
9.01
10.16
E
7.62
8.26
E1
6.09
7.12
e
2.54 (TYP)
eB
--
10.92
b
e
L
A2
A1
eB
E
C
E1
D
L
2.92
3.81
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