FUNCTIONAL BLOCK DIAGRAM
R
A
B
DI
DE
RE
RO
ADM485
D
2
3
4
5
6
7
8
1
V
CC
GND
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
a
+5 V Low Power
EIA RS-485 Transceiver
ADM485
FEATURES
Meets EIA RS-485 Standard
5 Mb/s Data Rate
Single +5 V Supply
7 V to +12 V Bus Common-Mode Range
High Speed, Low Power BiCMOS
Thermal Shutdown Protection
Short Circuit Protection
Zero Skew Driver
Driver Propagation Delay: 10 ns
Receiver Propagation Delay: 25 ns
High Z Outputs with Power Off
Superior Upgrade for LTC485
APPLICATIONS
Low Power RS-485 Systems
DTE-DCE Interface
Packet Switching
Local Area Networks
Data Concentration
Data Multiplexers
Integrated Services Digital Network (ISDN)
PRODUCT DESCRIPTION
The ADM485 is a differential line transceiver suitable for high
speed bidirectional data communication on multipoint bus
transmission lines. It is designed for balanced data transmission
and complies with both EIA Standards RS-485 and RS-422.
The part contains a differential line driver and a differential line
receiver. Both the driver and the receiver may be enabled inde-
pendently. When disabled, the outputs are tristated.
The ADM485 operates from a single +5 V power supply.
Excessive power dissipation caused by bus contention or by out-
put shorting is prevented by a thermal shutdown circuit. This
feature forces the driver output into a high impedance state if
during fault conditions a significant temperature increase is
detected in the internal driver circuitry.
Up to 32 transceivers may be connected simultaneously on a
bus, but only one driver should be enabled at any time. It is im-
portant, therefore, that the remaining disabled drivers do not
load the bus. To ensure this, the ADM485 driver features high
output impedance when disabled and also when powered down.
This minimizes the loading effect when the transceiver is not
being utilized. The high impedance driver output is maintained
over the entire common-mode voltage range from 7 V to +12 V.
The receiver contains a fail safe feature which results in a logic
high output state if the inputs are unconnected (floating).
The ADM485 is fabricated on BiCMOS, an advanced mixed
technology process combining low power CMOS with fast
switching bipolar technology. All inputs and outputs contain
protection against ESD; all driver outputs feature high source
and sink current capability. An epitaxial layer is used to guard
against latch-up.
The ADM485 features extremely fast switching speeds. Minimal
driver propagation delays permit transmission at data rates up to
5 Mbits/s while low skew minimizes EMI interference.
The part is fully specified over the commercial and industrial
temperature range and is available in an 8-lead DIL/SOIC package.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
Analog Devices, Inc., 2000
ADM485SPECIFICATIONS
Parameter
Min
Typ
Max
Units
Test Conditions/Comments
DRIVER
Differential Output Voltage, V
OD
5.0
V
R =
, Figure 1
2.0
5.0
V
V
CC
= 5 V, R = 50
(RS-422), Figure 1
1.5
5.0
V
R = 27
(RS-485), Figure 1
V
OD3
1.5
5.0
V
V
TST
= 7 V to +12 V, Figure 2
|V
OD
| for Complementary Output States
0.2
V
R = 27
or 50 , Figure 1
Common-Mode Output Voltage V
OC
3
V
R = 27
or 50 , Figure 1
|V
OC
| for Complementary Output States
0.2
V
R = 27
or 50
Output Short Circuit Current (V
OUT
= High)
35
250
mA
7 V
V
O
+12 V
Output Short Circuit Current (V
OUT
= Low)
35
250
mA
7 V
V
O
+12 V
CMOS Input Logic Threshold Low, V
INL
0.8
V
CMOS Input Logic Threshold High, V
INH
2.0
V
Logic Input Current (DE, DI)
1.0
A
RECEIVER
Differential Input Threshold Voltage, V
TH
0.2
+0.2
V
7 V
V
CM
+12 V
Input Voltage Hysteresis,
V
TH
70
mV
V
CM
= 0 V
Input Resistance
12
k
7 V
V
CM
+12 V
Input Current (A, B)
+1
mA
V
IN
= 12 V
0.8
mA
V
IN
= 7 V
Logic Enable Input Current (
RE)
1
A
CMOS Output Voltage Low, V
OL
0.4
V
I
OUT
= +4.0 mA
CMOS Output Voltage High, V
OH
4.0
V
I
OUT
= 4.0 mA
Short Circuit Output Current
7
85
mA
V
OUT
= GND or V
CC
Tristate Output Leakage Current
1.0
A
0.4 V
V
OUT
+2.4 V
POWER SUPPLY CURRENT
I
CC
(Outputs Enabled)
1.35
2.2
mA
Outputs Unloaded, Digital Inputs = GND or V
CC
I
CC
(Outputs Disabled)
0.7
1
mA
Outputs Unloaded, Digital Inputs = GND or V
CC
Specifications subject to change without notice.
TIMING SPECIFICATIONS
Parameter
Min
Typ
Max
Units
Test Conditions/Comments
DRIVER
Propagation Delay Input to Output T
PLH
, T
PHL
2
10
15
ns
R
L
Diff = 54
C
L1
= C
L2
= 100 pF, Figure 3
Driver O/P to
O/P T
SKEW
0
5
ns
R
L
Diff = 54
C
L1
= C
L2
= 100 pF, Figure 3
Driver Rise/Fall Time T
R
, T
F
2
10
ns
R
L
Diff = 54
C
L1
= C
L2
= 100 pF, Figure 3
Driver Enable to Output Valid
10
25
ns
Driver Disable Timing
10
25
ns
RECEIVER
Propagation Delay Input to Output T
PLH
, T
PHL
18
25
40
ns
C
L
= 15 pF, Figure 5
Skew |T
PLH
T
PHL
|
0
5
ns
Receiver Enable T
EN1
15
25
ns
Figure 6
Receiver Disable T
EN2
15
25
ns
Figure 6
Specifications subject to change without notice.
REV. A
2
(V
CC
= +5 V 5%. All specifications T
MIN
to T
MAX
unless otherwise noted)
(V
CC
= +5 V 5%. All specifications T
MIN
to T
MAX
unless otherwise noted.)
ADM485
REV. A
3
ABSOLUTE MAXIMUM RATINGS*
(T
A
= +25
C unless otherwise noted)
V
CC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +7 V
Inputs
Driver Input (DI) . . . . . . . . . . . . . . . . 0.3 V to V
CC
+ 0.3 V
Control Inputs (DE, RE) . . . . . . . . . . 0.3 V to V
CC
+ 0.3 V
Receiver Inputs (A, B) . . . . . . . . . . . . . . . . . 14 V to +14 V
Outputs
Driver Outputs . . . . . . . . . . . . . . . . . . . . . . . 14 V to +14 V
Receiver Output . . . . . . . . . . . . . . . . . 0.5 V to V
CC
+0.5 V
Power Dissipation 8-Pin DIP . . . . . . . . . . . . . . . . . . . 500 mW
JA
, Thermal Impedance . . . . . . . . . . . . . . . . . . +130
C/W
Power Dissipation 8-Pin SOIC . . . . . . . . . . . . . . . . . 450 mW
JA
, Thermal Impedance . . . . . . . . . . . . . . . . . . +170
C/W
Power Dissipation 8-Pin Cerdip . . . . . . . . . . . . . . . . 500 mW
JA
, Thermal Impedance . . . . . . . . . . . . . . . . . . +125
C/W
Operating Temperature Range
Commercial (J Version) . . . . . . . . . . . . . . . . . 0
C to +70C
Industrial (A Version) . . . . . . . . . . . . . . . . 40
C to +85C
Storage Temperature Range . . . . . . . . . . . 65
C to +150C
Lead Temperature (Soldering, 10 sec) . . . . . . . . . . . . +300
C
Vapour Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . +215
C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . . +220
C
*Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum ratings
for extended periods may affect device reliability.
Table I. Transmitting
INPUTS
OUTPUT
RE
DE
DI
B
A
X
1
1
0
1
X
1
0
1
0
X
0
X
Z
Z
Table II. Receiving
INPUTS
OUTPUT
RE
DE
A-B
RO
0
0
+0.2 V
1
0
0
0.2 V
0
0
0
Inputs Open
1
1
0
X
Z
PIN FUNCTION DESCRIPTION
Pin Mnemonic Function
1
RO
Receiver Output. When enabled if A > B by
200 mV, then RO = High. If A < B by
200 mV, then RO = Low.
2
RE
Receiver Output Enable. A low level enables
the receiver output, RO. A high level places it
in a high impedance state.
3
DE
Driver Output Enable. A high level enables
the driver differential outputs, A and B. A
low level places it in a high impedance state.
4
DI
Driver Input. When the driver is enabled a
logic Low on DI forces A low and B high
while a logic High on DI forces A high and B
low.
5
GND
Ground Connection, 0 V.
6
A
Noninverting Receiver Input A/Driver
Output A.
7
B
Inverting Receiver Input B/Driver Output B.
8
V
CC
Power Supply, 5 V
5%.
PIN CONFIGURATION
RO
RE
DE
DI
GND
A
B
V
CC
1
2
3
4
8
7
6
5
TOP VIEW
(Not to Scale)
ADM485
ORDERING GUIDE
Model
Temperature Range
Package Option
ADM485JN
0
C to +70C
N-8
ADM485JR
0
C to +70C
SO-8
ADM485AN
40
C to +85C
N-8
ADM485AR
40
C to +85C
SO-8
ADM485AQ
40
C to +85C
Q-8
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the ADM485 features proprietary ESD protection circuitry, permanent damage may occur on
devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are
recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
ADM485
REV. A
4
Test Circuits
R
R
V
OC
V
OD
Figure 1. Driver Voltage Measurement Test Circuit
375
V
OD3
V
TST
375
60
Figure 2. Driver Voltage Measurement Test Circuit 2
A
B
R
LDIFF
C
L1
C
L2
Figure 3. Driver Propagation Delay Test Circuit
V
OUT
C
L
A
B
V
CC
S2
R
L
S1
0V OR 3V
DE IN
DE
Figure 4. Driver Enable/Disable Test Circuit
C
L
V
OUT
RE
A
B
Figure 5. Receiver Propagation Delay Test Circuit
V
OUT
V
CC
S2
R
L
S1
RE IN
RE
C
L
+1.5V
1.5V
Figure 6. Receiver Enable/Disable Test Circuit
T
PLH
T
PHL
0V
0V
1.5V
1.5V
AB
RO
V
OL
V
OH
Figure 9. Receiver Propagation Delay
T
ZH
1.5V
1.5V
3V
0V
1.5V
T
HZ
V
OH
V
OH
0.5V
0V
R
V
OL
+ 0.5V
T
ZL
1.5V
T
LZ
V
OL
R
RE
O/P LOW
O/P HIGH
Figure 10. Receiver Enable/Disable Timing
Switching Characteristics
VO
VO
1/2VO
0V
3V
1.5V
1.5V
T
PLH
T
SKEW
VO
0V
90% POINT
10% POINT
90% POINT
10% POINT
T
PHL
B
A
T
SKEW
T
R
T
F
Figure 7. Driver Propagation Delay, Rise/Fall Timing
T
ZH
1.5V
DE
1.5V
3V
0V
2.3V
T
HZ
V
OH
V
OH
0.5V
0V
A, B
V
OL
+ 0.5V
T
ZL
2.3V
T
LZ
V
OL
A, B
Figure 8. Driver Enable/Disable Timing
Typical Performance CharacteristicsADM485
REV. A
5
40
0
2.0
12
4
8
0.0
24
16
20
28
32
36
1.0
0.5
1.5
OUTPUT VOLTAGE Volts
OUTPUT CURRENT
mA
Figure 11. Receiver Output Low
Voltage vs. Output Current
0.4
0.1
50
125
0.3
0.2
25
50
100
25
0
75
TEMPERATURE
C
OUTPUT VOLTAGE
Volts
I = 8mA
Figure 14. Receiver Output Low
Voltage vs. Temperature
100
0
4
30
10
20
0
60
40
50
70
80
90
2
1
3
OUTPUT VOLTAGE Volts
OUTPUT CURRENT
mA
Figure 17. Driver Output Low
Voltage vs. Output Current
OUTPUT VOLTAGE Volts
OUTPUT CURRENT
mA
0
20
5.0
14
18
16
3.5
8
12
10
6
4
2
4.5
4.0
Figure 12. Receiver Output High
Voltage vs. Output Current
OUTPUT VOLTAGE Volts
OUTPUT CURRENT
mA
96
0
24
12
0
48
36
60
72
84
4
3
2
1
Figure 15. Driver Differential Out-
put Voltage vs. Output Current
0
100
5
70
90
80
0
40
60
50
30
20
10
3
2
4
1
OUTPUT VOLTAGE Volts
OUTPUT CURRENT
mA
Figure 18. Driver Output High
Voltage vs. Output Current
5.0
4.5
125
4.8
4.6
25
4.7
50
4.9
100
75
50
25
0
TEMPERATURE
C
OUTPUT VOLTAGE
Volts
I = 8mA
Figure 13. Receiver Output High
Voltage vs. Temperature
2.4
2.0
50
125
2.3
2.1
25
2.2
100
75
50
25
0
TEMPERATURE
C
DIFFERENTIAL VOLTAGE
Volts
Figure 16. Driver Differential Output
Voltage vs. Temperature, R
L
= 54
1.00
0.60
125
0.70
0.65
25
50
0.80
0.75
0.85
0.90
0.95
100
75
50
25
0
TEMPERATURE C
SUPPLY CURRENT
mA
DRIVER ENABLED
DRIVER DISABLED
Figure 19. Supply Current vs.
Temperature
PDF 
ZIP