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Электронный компонент: ADG707

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ADG706/ADG707
a
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
Analog Devices, Inc., 2000
CMOS, 2.5 Low-Voltage,
8-/16-Channel Multiplexers
FEATURES
1.8 V to 5.5 V Single Supply
3 V Dual Supply
2.5 On Resistance
0.5 On-Resistance Flatness
100 pA Leakage Currents
40 ns Switching Times
Single 16-to-1 Multiplexer ADG706
Differential 8-to-1 Multiplexer ADG707
28-Lead TSSOP Package
Low-Power Consumption
TTL/CMOS-Compatible Inputs
APPLICATIONS
Data Acquisition Systems
Communication Systems
Relay Replacement
Audio and Video Switching
Battery-Powered Systems
GENERAL DESCRIPTION
The ADG706 and ADG707 are low-voltage, CMOS analog
multiplexers comprising 16 single channels and eight differential
channels respectively. The ADG706 switches one of 16 inputs
(S1S16) to a common output, D, as determined by the 4-bit
binary address lines A0, A1, A2, and A3. The ADG707 switches
one of eight differential inputs to a common differential output as
determined by the 3-bit binary address lines A0, A1, and A2.
An EN input on both devices is used to enable or disable the
device. When disabled, all channels are switched OFF.
Low-power consumption and operating supply range of 1.8 V to
5.5 V make the ADG706 and ADG707 ideal for battery-powered,
portable instruments. All channels exhibit break-before-make
switching action preventing momentary shorting when switch-
ing channels. These devices are also designed to operate from a
dual supply of
3 V.
These multiplexers are designed on an enhanced submicron
process that provides low-power dissipation yet gives high-
switching speed, very low on resistance and leakage currents.
On resistance is in the region of a few ohms and is closely
matched between switches and very flat over the full signal
range. These parts can operate equally well as either multiplexers
or demultiplexers and have an input signal range which extends
to the supplies.
The ADG706 and ADG707 are available in small 28-lead TSSOP
packages.
FUNCTIONAL BLOCK DIAGRAMS
S1
S16
A0
D
A3
A1
ADG706
S1A
A0
DA
A1
S8A
S1B
S8B
DB
EN
ADG707
EN
A2
A2
1-OF-16
DECODER
1-OF-8
DECODER
PRODUCT HIGHLIGHTS
1. Single/Dual Supply Operation. The ADG706 and ADG707
are fully specified and guaranteed with 3 V and 5 V single
supply and
3 V dual supply rails.
2. Low On Resistance (2.5
typical).
3. Low-Power Consumption (<0.01
W).
4. Guaranteed Break-Before-Make Switching Action.
5. Small 28-Lead TSSOP Package.
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2
REV. 0
ADG706/ADG707SPECIFICATIONS
1
(V
DD
= 5 V 10%, V
SS
= 0 V, GND = 0 V, unless otherwise noted.)
B Version
40 C
Parameter
25 C
to +85 C
Unit
Test Conditions/Comments
ANALOG SWITCH
Analog Signal Range
0 V to V
DD
V
On Resistance (R
ON
)
2.5
typ
V
S
= 0 V to V
DD
, I
DS
= 10 mA;
4.5
5
max
Test Circuit 1
On Resistance Match Between
0.3
typ
V
S
= 0 V to V
DD,
I
DS
= 10 mA
Channels (
R
ON
)
0.8
max
On-Resistance Flatness (R
FLAT(ON)
)
0.5
typ
V
S
= 0 V to V
DD
, I
DS
= 10 mA
1.2
max
LEAKAGE CURRENTS
V
DD
= 5.5 V
Source OFF Leakage I
S
(OFF)
0.01
nA typ
V
D
= 4.5 V/1 V, V
S
= 1 V/4.5 V;
0.1
0.3
nA max
Test Circuit 2
Drain OFF Leakage I
D
(OFF)
0.01
nA typ
V
D
= 4.5 V/1 V, V
S
= 1 V/4.5 V;
ADG706
0.4
1.5
nA max
Test Circuit 3
ADG707
0.1
1
nA max
Channel ON Leakage I
D
, I
S
(ON)
0.01
nA typ
V
D
= V
S
= 1 V, or 4.5 V;
ADG706
0.4
1.5
nA max
Test Circuit 4
ADG707
0.1
1
nA max
DIGITAL INPUTS
Input High Voltage, V
INH
2.4
V min
Input Low Voltage, V
INL
0.8
V max
Input Current
I
INL
or I
INH
0.005
A typ
V
IN
= V
INL
or V
INH
0.1
A max
C
IN
, Digital Input Capacitance
5
pF typ
DYNAMIC CHARACTERISTICS
2
t
TRANSITION
40
ns typ
R
L
= 300
, C
L
= 35 pF, Test Circuit 5;
60
ns max
V
S1
= 3 V/0 V, V
S16
= 0 V/3 V
Break-Before-Make Time Delay, t
D
30
ns typ
R
L
= 300
, C
L
= 35 pF;
1
ns min
V
S
= 3 V, Test Circuit 6
t
ON
(EN)
32
ns typ
R
L
= 300
, C
L
= 35 pF;
50
ns max
V
S
= 3 V, Test Circuit 7
t
OFF
(EN)
10
ns typ
R
L
= 300
, C
L
= 35 pF;
14
ns max
V
S
= 3 V, Test Circuit 7
Charge Injection
5
pC typ
V
S
= 1 V, R
S
= 0
, C
L
= 1 nF;
Test Circuit 8
Off Isolation
60
dB typ
R
L
= 50
, C
L
= 5 pF, f = 10 MHz;
80
dB typ
R
L
= 50
, C
L
= 5 pF, f = 1 MHz;
Test Circuit 9
Channel-to-Channel Crosstalk
60
dB typ
R
L
= 50
, C
L
= 5 pF, f = 10 MHz;
80
dB typ
R
L
= 50
, C
L
= 5 pF, f = 1 MHz;
Test Circuit 10
3 dB Bandwidth
ADG706
25
MHz typ
R
L
= 50
, C
L
= 5 pF, Test Circuit 9
ADG707
36
MHz typ
R
L
= 50
, C
L
= 5 pF, Test Circuit 9
C
S
(OFF)
13
pF typ
C
D
(OFF)
ADG706
180
pF typ
ADG707
90
pF typ
C
D
, C
S
(ON)
ADG706
200
pF typ
ADG707
100
pF typ
POWER REQUIREMENTS
V
DD
= 5.5 V
I
DD
0.001
A typ
Digital Inputs = 0 V or 5.5 V
1.0
A max
NOTES
1
Temperature range is as follows: B Version: 40
C to +85C.
2
Guaranteed by design, not subject to production test.
Specifications subject to change without notice.
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3
REV. 0
ADG706/ADG707
B Version
40 C
Parameter
25 C
to +85 C
Unit
Test Conditions/Comments
ANALOG SWITCH
Analog Signal Range
0 V to V
DD
V
On Resistance (R
ON
)
6
typ
V
S
= 0 V to V
DD
, I
DS
= 10 mA;
11
12
max
Test Circuit 1
On-Resistance Match Between
0.4
typ
V
S
= 0 V to V
DD,
I
DS
= 10 mA
Channels (
R
ON
)
1.2
max
On-Resistance Flatness (R
FLAT(ON)
)
3
typ
V
S
= 0 V to V
DD
, I
DS
= 10 mA
LEAKAGE CURRENTS
V
DD
= 3.3 V
Source OFF Leakage I
S
(OFF)
0.01
nA typ
V
S
= 3 V/1 V, V
D
= 1 V/3 V;
0.1
0.3
nA max
Test Circuit 2
Drain OFF Leakage I
D
(OFF)
0.01
nA typ
V
S
= 3 V/1 V, V
D
= 1 V/3 V;
ADG706
0.4
1.5
nA max
Test Circuit 3
ADG707
0.1
1
nA max
Channel ON Leakage I
D
, I
S
(ON)
0.01
nA typ
V
S
= V
D
= 1 V or 3 V;
ADG706
0.4
1.5
nA max
Test Circuit 4
ADG707
0.1
1
nA max
DIGITAL INPUTS
Input High Voltage, V
INH
2.0
V min
Input Low Voltage, V
INL
0.4
V max
Input Current
I
INL
or I
INH
0.005
A typ
V
IN
= V
INL
or V
INH
0.1
A max
C
IN
, Digital Input Capacitance
5
pF typ
DYNAMIC CHARACTERISTICS
2
t
TRANSITION
45
ns typ
R
L
= 300
, C
L
= 35 pF, Test Circuit 5
75
ns max
V
S1
= 2 V/0 V, V
S16
= 0 V/2 V
Break-Before-Make Time Delay, t
D
30
ns typ
R
L
= 300
, C
L
= 35 pF;
1
ns min
V
S
= 2 V, Test Circuit 6
t
ON
(EN)
40
ns typ
R
L
= 300
, C
L
= 35 pF;
70
ns max
V
S
= 2 V, Test Circuit 7
t
OFF
(EN)
20
ns typ
R
L
= 300
, C
L
= 35 pF;
28
ns max
V
S
= 2 V, Test Circuit 7
Charge Injection
5
pC typ
V
S
= 1 V, R
S
= 0
, C
L
= 1 nF;
Test Circuit 8
Off Isolation
60
dB typ
R
L
= 50
, C
L
= 5 pF, f = 10 MHz;
80
dB typ
R
L
= 50
, C
L
= 5 pF, f = 1 MHz;
Test Circuit 9
Channel-to-Channel Crosstalk
60
dB typ
R
L
= 50
, C
L
= 5 pF, f = 10 MHz;
80
dB typ
R
L
= 50
, C
L
= 5 pF, f = 1 MHz;
Test Circuit 10
3 dB Bandwidth
ADG706
25
MHz typ
R
L
= 50
, C
L
= 5 pF, Test Circuit 9
ADG707
36
MHz typ
R
L
= 50
, C
L
= 5 pF, Test Circuit 9
C
S
(OFF)
13
pF typ
C
D
(OFF)
ADG706
180
pF typ
ADG707
90
pF typ
C
D
, C
S
(ON)
ADG706
200
pF typ
ADG707
100
pF typ
POWER REQUIREMENTS
V
DD
= 3.3 V
I
DD
0.001
A typ
Digital Inputs = 0 V or 3.3 V
1.0
A max
NOTES
1
Temperature ranges are as follows: B Versions: 40
C to +85C.
2
Guaranteed by design, not subject to production test.
Specifications subject to change without notice.
(V
DD
= 3 V 10%, V
SS
= 0 V, GND = 0 V, unless otherwise noted)
SPECIFICATIONS
1
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4
REV. 0
ADG706/ADG707
B Version
40 C
Parameter
25 C
to +85 C
Unit
Test Conditions/Comments
ANALOG SWITCH
Analog Signal Range
V
SS
to V
DD
V
On Resistance (R
ON
)
2.5
typ
V
S
= V
SS
to V
DD
, I
DS
= 10 mA;
4.5
5
max
Test Circuit 1
On-Resistance Match Between
0.3
typ
V
S
= V
SS
to V
DD
, I
DS
= 10 mA
Channels (
R
ON
)
0.8
max
On-Resistance Flatness (R
FLAT(ON)
)
0.5
typ
V
S
= V
SS
to V
DD
, I
DS
= 10 mA
1.2
max
LEAKAGE CURRENTS
V
DD
= +3.3 V, V
SS
= 3.3 V
Source OFF Leakage I
S
(OFF)
0.01
nA typ
V
S
= +2.25 V/1.25 V, V
D
= 1.25 V/+2.25 V;
0.1
0.3
nA max
Test Circuit 2
Drain OFF Leakage I
D
(OFF)
0.01
nA typ
V
S
= +2.25 V/1.25 V, V
D
= 1.25 V/+2.25 V;
ADG706
0.4
1.5
nA max
Test Circuit 3
ADG707
0.1
1
nA max
Channel ON Leakage I
D
, I
S
(ON)
0.01
nA typ
V
S
= V
D
= +2.25 V/1.25 V, Test Circuit 4
ADG706
0.4
1.5
nA max
ADG707
0.1
1
nA max
DIGITAL INPUTS
Input High Voltage, V
INH
2.0
V min
Input Low Voltage, V
INL
0.4
V max
Input Current
I
INL
or I
INH
0.005
A typ
V
IN
= V
INL
or V
INH
0.1
A max
C
IN
, Digital Input Capacitance
5
pF typ
DYNAMIC CHARACTERISTICS
2
t
TRANSITION
40
ns typ
R
L
= 300
, C
L
= 35 pF, Test Circuit 5
60
ns max
V
S1
= 1.5 V/0 V, V
S16
= 0 V/1.5 V
Break-Before-Make Time Delay, t
D
15
ns typ
R
L
= 300
, C
L
= 35 pF;
1
ns min
V
S
= 1.5 V, Test Circuit 6
t
ON
(EN)
32
ns typ
R
L
= 300
, C
L
= 35 pF;
50
ns max
V
S
= 1.5 V, Test Circuit 7
t
OFF
(EN)
16
ns typ
R
L
= 300
, C
L
= 35 pF;
26
ns max
V
S
= 1.5 V, Test Circuit 7
Charge Injection
8
pC typ
V
S
= 0 V, R
S
= 0
, C
L
= 1 nF;
Test Circuit 8
Off Isolation
60
dB typ
R
L
= 50
, C
L
= 5 pF, f = 10 MHz;
80
dB typ
R
L
= 50
, C
L
= 5 pF, f = 1 MHz;
Test Circuit 9
Channel-to-Channel Crosstalk
60
dB typ
R
L
= 50
, C
L
= 5 pF, f = 10 MHz;
80
dB typ
R
L
= 50
, C
L
= 5 pF, f = 1 MHz;
Test Circuit 10
3 dB Bandwidth
ADG706
25
MHz typ
R
L
= 50
, C
L
= 5 pF, Test Circuit 9
ADG707
36
MHz typ
R
L
= 50
, C
L
= 5 pF, Test Circuit 9
C
S
(OFF)
13
pF typ
C
D
(OFF)
ADG706
180
pF typ
ADG707
90
pF typ
C
D
, C
S
(ON)
ADG706
200
pF typ
ADG707
100
pF typ
POWER REQUIREMENTS
I
DD
0.001
A typ
V
DD
= +3.3 V
1.0
A max
Digital Inputs = 0 V or 3.3 V
I
SS
0.001
A typ
V
SS
= 3.3 V
1.0
A max
Digital Inputs = 0 V or 3.3 V
NOTES
1
Temperature range is as follows: B Version: 40
C to +85C.
2
Guaranteed by design, not subject to production test.
Specifications subject to change without notice.
(V
DD
= +3 V 10%, V
SS
= 3 V 10%, GND = 0 V, unless otherwise noted.)
Dual Supply
1
background image
ADG706/ADG707
5
REV. 0
ABSOLUTE MAXIMUM RATINGS
1
(T
A
= 25
C unless otherwise noted)
V
DD
to V
SS
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
V
DD
to GND . . . . . . . . . . . . . . . . . . . . . . . . . . 0.3 V to +7 V
V
SS
to GND . . . . . . . . . . . . . . . . . . . . . . . . . . +0.3 V to 3.5 V
Analog Inputs
2
. . . . . . . . . . . . . . V
SS
0.3 V to V
DD
+ 0.3 V or
30 mA, Whichever Occurs First
Digital Inputs
2
. . . . . . . . . . . . . . . . . 0.3 V to V
DD
+ 0.3 V or
30 mA, Whichever Occurs First
Peak Current, S or D . . . . . . . . . . . . . . . . . . . . . . . . . . 100 mA
(Pulsed at 1 ms, 10% Duty Cycle max)
Continuous Current, S or D . . . . . . . . . . . . . . . . . . . . . 30 mA
Operating Temperature Range
Industrial (B Version) . . . . . . . . . . . . . . . . 40
C to +85C
ORDERING GUIDE
Model
Temperature Range
Package Description
Package Option
ADG706BRU
40
C to +85C
Thin Shrink Small Outline Package (TSSOP)
RU-28
ADG707BRU
40
C to +85C
Thin Shrink Small Outline Package (TSSOP)
RU-28
PIN CONFIGURATIONS
28-Lead TSSOP
Storage Temperature Range . . . . . . . . . . . . 65
C to +150C
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . 150
C
TSSOP Package
JA
Thermal Impedance . . . . . . . . . . . . . . . . . . . . 97.9
C/W
JC
Thermal Impedance . . . . . . . . . . . . . . . . . . . . . . 14
C/W
Lead Temperature, Soldering (10 seconds) . . . . . . . . . . 300
C
IR Reflow, Peak Temperature . . . . . . . . . . . . . . . . . . . . 220
C
NOTES
1
Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only, functional operation of the
device at these or any other conditions above those listed in the operational sections
of this specification is not implied. Exposure to absolute maximum rating condi-
tions for extended periods may affect device reliability. Only one absolute maximum
rating may be applied at any one time.
2
Overvoltages at IN, S or D will be clamped by internal diodes. Current should be
limited to the maximum ratings given.
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the ADG706/ADG707 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
TOP VIEW
(Not to Scale)
28
27
26
25
24
23
22
21
20
19
18
17
16
15
1
2
3
4
5
6
7
8
9
10
11
12
13
14
ADG706
NC = NO CONNECT
A3
NC
GND
S9
S10
S11
S12
V
DD
NC
NC
S16
S13
S14
S15
A2
A1
A0
EN
S1
S2
S3
D
V
SS
S8
S7
S4
S5
S6
TOP VIEW
(Not to Scale)
28
27
26
25
24
23
22
21
20
19
18
17
16
15
1
2
3
4
5
6
7
8
9
10
11
12
13
14
ADG707
NC = NO CONNECT
NC
NC
GND
S1B
S2B
S3B
S4B
V
DD
DB
NC
S8B
S5B
S6B
S7B
A2
A1
A0
EN
S1A
S2A
S3A
DA
V
SS
S8A
S7A
S4A
S5A
S6A
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6
REV. 0
ADG706/ADG707
Table I. ADG706 Truth Table
A3
A2
A1
A0
EN
ON Switch
X
X
X
X
0
NONE
0
0
0
0
1
1
0
0
0
1
1
2
0
0
1
0
1
3
0
0
1
1
1
4
0
1
0
0
1
5
0
1
0
1
1
6
0
1
1
0
1
7
0
1
1
1
1
8
1
0
0
0
1
9
1
0
0
1
1
10
1
0
1
0
1
11
1
0
1
1
1
12
1
1
0
0
1
13
1
1
0
1
1
14
1
1
1
0
1
15
1
1
1
1
1
16
X = Don't Care.
Table II. ADG707 Truth Table
A2
A1
A0
EN
ON Switch Pair
X
X
X
0
NONE
0
0
0
1
1
0
0
1
1
2
0
1
0
1
3
0
1
1
1
4
1
0
0
1
5
1
0
1
1
6
1
1
0
1
7
1
1
1
1
8
X = Don't Care.
TERMINOLOGY
V
DD
Most Positive Power Supply Potential.
V
SS
Most Negative Power Supply in a Dual Sup-
ply Application. In single supply applications,
this should be tied to ground at the device.
I
DD
Positive Supply Current.
I
SS
Negative Supply Current.
GND
Ground (0 V) Reference.
S
Source Terminal. May be an input or output.
D
Drain Terminal. May be an input or output.
IN
Logic Control Input.
V
D
(V
S
)
Analog Voltage on Terminals D, S.
R
ON
Ohmic Resistance Between D and S.
R
ON
On Resistance Match Between any Two Chan-
nels, i.e., R
ON
max R
ON
min.
R
FLAT(ON)
Flatness is defined as the difference between
the maximum and minimum value of on
resistance as measured over the specified analog
signal range.
I
S
(OFF)
Source Leakage Current with the Switch
"OFF."
I
D
(OFF)
Drain Leakage Current with the Switch "OFF."
I
D
, I
S
(ON)
Channel Leakage Current with the Switch
"ON."
V
INL
Maximum Input Voltage for Logic "0."
V
INH
Minimum Input Voltage for Logic "1."
I
INL
(I
INH
)
Input Current of the Digital Input.
C
S
(OFF)
"OFF" Switch Source Capacitance. Measured
with reference to ground.
C
D
(OFF)
"OFF" Switch Drain Capacitance. Measured
with reference to ground.
C
D
, C
S
(ON)
"ON" Switch Capacitance. Measured with
reference to ground.
C
IN
Digital Input Capacitance.
t
TRANSITION
Delay Time Measured Between the 50% and
90% Points of the Digital Inputs and the Switch
"ON" Condition when Switching from One
Address State to Another.
t
ON
(EN)
Delay Time Between the 50% and 90% Points
of the EN Digital Input and the Switch "ON"
Condition.
t
OFF
(EN)
Delay Time Between the 50% and 90% Points
of the EN Digital Input and the Switch "OFF"
Condition.
t
OPEN
"OFF" Time Measured Between the 80%
Points of Both Switches when Switching from
One Address State to Another.
Charge
A Measure of the Glitch Impulse Transferred
Injection
from the Digital Input to the Analog Output
During Switching.
Off Isolation
A Measure of Unwanted Signal Coupling
through an "OFF" Switch.
Crosstalk
A Measure of Unwanted Signal which is
Coupled through from One Channel to
Another as a Result of Parasitic Capacitance.
Bandwidth
The Frequency at which the Output Is
Attenuated by 3 dBs.
On Response
The Frequency Response of the "ON" Switch.
Insertion
The Loss Due to the ON Resistance of the
Loss
Switch.
background image
Typical Performance CharacteristicsADG706/ADG707
7
REV. 0
V
D
, V
S
, DRAIN OR SOURCE VOLTAGE V
ON RESISTANCE
0
0
1
5
2
3
4
1
T
A
= 25 C
V
SS
= GND
V
DD
= 2.7V
V
DD
= 3.3V
V
DD
= 4.5V
V
DD
= 5.5V
2
3
4
5
6
7
8
Figure 1. On Resistance as a Function
of V
D
(V
S
) for Single Supply
V
D
OR V
S
/DRAIN OR SOURCE VOLTAGE V
0
3
0
T
A
= 25 C
2
1
1
2
3
V
DD
= +2.7V
V
SS
= 2.7V
V
DD
= +3.3V
V
SS
= 3.3V
V
DD
= +3.0V
V
SS
= 3.0V
ON RESISTANCE
8
7
6
5
4
1
2
3
Figure 4. On Resistance as a Function
of V
D
(V
S
) for Dual Supply
V
D
(V
S
)
Volts
CURRENT
nA
0.3
0.2
0.2
0
1
5
2
3
4
0.1
0
0.1
V
DD
= 3V
V
SS
= 0V
T
A
= 25 C
I
D
, I
S
(ON)
I
S
(OFF)
I
D
(OFF)
0.3
Figure 7. Leakage Currents as a Func-
tion of V
D
(V
S
)
V
D
OR V
S
/DRAIN OR SOURCE VOLTAGE V
ON RESISTANCE
8
7
0
0
1
5
2
3
4
6
5
4
+85 C
40 C
V
DD
= 5V
V
SS
= 0V
1
2
3
+25 C
Figure 2. On Resistance as a Function
of V
D
(V
S
) for Different Temperatures,
Dual Supply
V
D
OR V
S
DRAIN OR SOURCE VOLTAGE V
0
0.5
7
6
5
4
3
2
1
0
ON RESISTANCE
1.0
1.5
2.0
2.5
3.0
8
40 C
+25 C
+85 C
V
DD
= 3V
V
SS
= 0V
Figure 5. On Resistance as a Function
of V
D
(V
S
) for Different Temperatures,
Single Supply
VOLTAGE
Volts
CURRENT
nA
0.3
0.2
0.3
3
0.1
0
0.2
V
DD
= +3V
V
SS
= 3V
T
A
= 25 C
I
D
, I
S
(ON)
I
S
(OFF)
I
D
(OFF)
0.1
2
1
0
1
2
3
Figure 8. Leakage Currents as a Func-
tion of V
D
(V
S
)
+85 C
+25 C
40 C
V
D
OR V
S
/DRAIN OR SOURCE VOLTAGE V
ON RESISTANCE
5
4
0
3
0
3
2
1
2
1
1
2
3
V
DD
= +3.0V
V
SS
= 3.0V
6
7
8
Figure 3. On Resistance as a Function
of V
D
(V
S
) for Different Temperatures,
Single Supply
V
D
(V
S
)
Volts
CURRENT
nA
0.3
0.2
0.2
0
1
5
2
3
4
0.1
0
0.1
V
DD
= 5V
V
SS
= 0V
T
A
= 25 C
I
D
, I
S
(ON)
I
S
(OFF)
I
D
(OFF)
Figure 6. Leakage Currents as a Func-
tion of V
D
(V
S
)
TEMPERATURE
C
CURRENT
nA
0.3
0.2
0.1
5
0
I
D
, I
S
(ON)
I
S
(OFF)
I
D
(OFF)
0.1
15
25
35
45
55
65
75
85
0.4
0.5
0.6
0.7
0.8
V
DD
= +3V
V
SS
= 3V
V
D
= +2.25V/1.25V
V
S
= 1.25V/+2.25V
V
DD
= 5V
V
SS
= GND
V
D
= 4.5V/1V
V
S
= 1V/4.5V
Figure 9. Leakage Currents as a Func-
tion of Temperature
background image
8
REV. 0
ADG706/ADG707
FREQUENCY Hz
ATTENUATION
dB
0
10
10k
ADG706
ADG707
100k
1M
10M
100M
8
6
4
2
Figure 11. On Response vs.
Frequency
VOLTAGE V
QINJ
pC
40
3
0
2
1
1
2
3
30
20
10
0
10
20
4
5
V
DD
= +3.0V
V
SS
= 3.0V
V
DD
= 5V
V
SS
= GND
V
DD
= 3V
V
SS
= GND
Figure 14. Charge Injection vs.
Source Voltage
FREQUENCY Hz
10k
100k
1M
10M
10m
10
CURRENT
A
1m
100
10
1
100n
10n
1n
100
1k
T
A
= 25 C
V
DD
= +3.0V
V
SS
= 3.0V
V
DD
= +3V
V
DD
= +5V
Figure 12. Supply Currents vs. Input
Switching Frequency
FREQUENCY Hz
100k
1M
10M
100M
0
30k
ATTENUATION
dB
20
40
60
80
100
120
V
DD
= 5V
T
A
= 25 C
Figure 15. Crosstalk vs. Frequency
TEMPERATURE
C
CURRENT
nA
0.3
0.2
0.1
5
0
I
D
, I
S
(ON)
I
S
(OFF)
I
D
(OFF)
0.1
15
25
35
45
55
65
75
85
0.4
0.5
0.6
0.7
0.8
V
DD
= 3V
V
SS
= GND
V
D
= 3V/1V
V
S
= 1V/3V
Figure 10. Leakage Currents as a
Function of Temperature
FREQUENCY Hz
100k
1M
10M
100M
0
30k
ATTENUATION
dB
20
40
60
80
100
120
V
DD
= 5V
T
A
= 25 C
Figure 13. Off Isolation vs. Frequency
background image
ADG706/ADG707
9
REV. 0
S
D
V1
V
S
I
DS
R
ON
= V
1
/V
DS
Test Circuit 1. On Resistance
S1
D
V
S
V
DD
V
SS
V
D
S2
S16
GND
0.8V
EN
V
DD
V
SS
A
I
S
OFF
Test Circuit 2. I
S
(OFF)
TEST CIRCUITS
S1
D
V
DD
V
SS
V
S
S2
S16
GND
0.8V
EN
V
DD
V
SS
A
I
D
OFF
V
DD
Test Circuit 3. I
D
(OFF)
D
V
DD
V
SS
V
S
S1
S16
GND
2.4V
EN
V
DD
V
SS
A
I
D
ON
V
D
Test Circuit 4. I
D
(ON)
S1
D
V
IN
V
DD
V
SS
GND
D
V
DD
V
SS
EN
A0
A1
A2
A3
50
V
S1
S16
V
S16
V
OUT
R
L
300
C
L
35pF
ADG706*
S1 THRU S15
*SIMILAR CONNECTION FOR ADG707
2.4V
V
S1
V
S16
0V
3V
V
OUT
ADDRESS
DRIVE (V
IN
)
t
TRANSITION
t
TRANSITION
50%
50%
90%
90%
Test Circuit 5. Switching Time of Multiplexer, t
TRANSITION
S1
D
V
IN
V
DD
V
SS
GND
D
V
DD
V
SS
EN
A0
A1
A2
A3
50
V
S
S16
V
OUT
R
L
300
C
L
35pF
ADG706*
S1 THRU S15
*SIMILAR CONNECTION FOR ADG707
2.4V
ADDRESS
DRIVE (V
IN
)
V
OUT
3V
0V
V
S
80%
80%
t
OPEN
Test Circuit 6. Break-Before-Make Delay, t
OPEN
background image
10
REV. 0
ADG706/ADG707
S1
V
IN
V
DD
V
SS
GND
D
V
DD
V
SS
EN
A0
A1
A2
A3
50
V
S
V
OUT
R
L
300
C
L
35pF
ADG706*
S2 THRU S16
*SIMILAR CONNECTION FOR ADG707
50%
50%
t
OFF
(EN)
0.9V
O
V
O
0V
3V
OUTPUT
ENABLE
DRIVE (V
IN
)
0V
0.9V
O
t
ON
(EN)
Test Circuit 7. Enable Delay, t
ON
(EN), t
OFF
(EN)
V
IN
V
DD
V
SS
GND
D
V
DD
V
SS
EN
A0
A1
A2
A3
V
OUT
C
L
1nF
ADG706*
*SIMILAR CONNECTION FOR ADG707
V
S
R
S
S
0V
3V
V
OUT
Q
INJ
= C
L
V
OUT
V
OUT
LOGIC
INPUT (V
IN
)
Test Circuit 8. Charge Injection
S1
V
S
V
DD
GND
D
V
DD
V
SS
EN**
A0
A1
A2
A3
V
OUT
R
L
50
ADG706*
S16
*SIMILAR CONNECTION FOR ADG707
**CONNECT TO 2.4V FOR BANDWIDTH MEASUREMENTS
OFF ISOLATION = 20LOG
10
(V
OUT
/V
S
)
OFF ISOLATION = 20LOG
10
V
OUT
WITH SWITCH
( )
V
OUT
WITHOUT SWITCH
V
SS
Test Circuit 9. OFF Isolation and Bandwidth
S2
V
S
V
DD
GND
D
V
DD
V
SS
A0
A1
A2
A3
V
OUT
R
L
50
ADG706*
S16
*SIMILAR CONNECTION FOR ADG707
CHANNEL-TO-CHANNEL CROSSTALK = 20LOG
10
(V
OUT
/V
S
)
V
SS
EN
S1
2.4V
50
Test Circuit 10. Channel-to-Channel Crosstalk
background image
ADG706/ADG707
11
REV. 0
28-Lead TSSOP
(RU-28)
28
15
14
1
0.386 (9.80)
0.378 (9.60)
0.256 (6.50)
0.246 (6.25)
0.177 (4.50)
0.169 (4.30)
PIN 1
SEATING
PLANE
0.006 (0.15)
0.002 (0.05)
0.0118 (0.30)
0.0075 (0.19)
0.0256 (0.65)
BSC
0.0433 (1.10)
MAX
0.0079 (0.20)
0.0035 (0.090)
0.028 (0.70)
0.020 (0.50)
8
0
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
PRIN
TED IN U
.S.A.
C383284/0
0
(rev
.
0)